[llvm] 026ddce - R600: Remove broken atomicrmw patterns
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 4 16:14:10 PDT 2022
Author: Matt Arsenault
Date: 2022-11-04T16:14:04-07:00
New Revision: 026ddced176e66657e51ffb73b26019b45485db0
URL: https://github.com/llvm/llvm-project/commit/026ddced176e66657e51ffb73b26019b45485db0
DIFF: https://github.com/llvm/llvm-project/commit/026ddced176e66657e51ffb73b26019b45485db0.diff
LOG: R600: Remove broken atomicrmw patterns
inc/dec are not add/sub of 1.
Added:
Modified:
llvm/lib/Target/AMDGPU/EvergreenInstructions.td
llvm/test/CodeGen/AMDGPU/r600.global_atomics.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/EvergreenInstructions.td b/llvm/lib/Target/AMDGPU/EvergreenInstructions.td
index a9a3421e8192..3d4f8d52fdc6 100644
--- a/llvm/lib/Target/AMDGPU/EvergreenInstructions.td
+++ b/llvm/lib/Target/AMDGPU/EvergreenInstructions.td
@@ -310,14 +310,6 @@ multiclass AtomicPat<Instruction inst_noret,
(EXTRACT_SUBREG (inst_noret
(INSERT_SUBREG (v4i32 (IMPLICIT_DEF)), $data, sub0), $ptr), sub1)>;
}
-multiclass AtomicIncDecPat<Instruction inst_noret,
- SDPatternOperator node_noret, int C> {
- // FIXME: Add _RTN version. We need per WI scratch location to store the old value
- // EXTRACT_SUBREG here is dummy, we know the node has no uses
- def : EGOrCaymanPat<(i32 (node_noret i32:$ptr, C)),
- (EXTRACT_SUBREG (inst_noret
- (INSERT_SUBREG (v4i32 (IMPLICIT_DEF)), (MOV_IMM_I32 -1), sub0), $ptr), sub1)>;
-}
// CMPSWAP is pattern is special
// EXTRACT_SUBREG here is dummy, we know the node has no uses
@@ -349,14 +341,6 @@ defm AtomicOrPat : AtomicPat <RAT_ATOMIC_OR_NORET,
atomic_load_or_global_noret_32>;
defm AtomicXorPat : AtomicPat <RAT_ATOMIC_XOR_NORET,
atomic_load_xor_global_noret_32>;
-defm AtomicIncAddPat : AtomicIncDecPat <RAT_ATOMIC_INC_UINT_NORET,
- atomic_load_add_global_noret_32, 1>;
-defm AtomicIncSubPat : AtomicIncDecPat <RAT_ATOMIC_INC_UINT_NORET,
- atomic_load_sub_global_noret_32, -1>;
-defm AtomicDecAddPat : AtomicIncDecPat <RAT_ATOMIC_DEC_UINT_NORET,
- atomic_load_add_global_noret_32, -1>;
-defm AtomicDecSubPat : AtomicIncDecPat <RAT_ATOMIC_DEC_UINT_NORET,
- atomic_load_sub_global_noret_32, 1>;
// Should be predicated on FeatureFP64
// def FMA_64 : R600_3OP <
diff --git a/llvm/test/CodeGen/AMDGPU/r600.global_atomics.ll b/llvm/test/CodeGen/AMDGPU/r600.global_atomics.ll
index 1ddc41feb006..3d2f1b4fb9f4 100644
--- a/llvm/test/CodeGen/AMDGPU/r600.global_atomics.ll
+++ b/llvm/test/CodeGen/AMDGPU/r600.global_atomics.ll
@@ -505,36 +505,36 @@ entry:
ret void
}
-; FUNC-LABEL: {{^}}atomic_inc_add
-; EG: MEM_RAT ATOMIC_INC_UINT
-define amdgpu_kernel void @atomic_inc_add(i32 addrspace(1)* %out) {
+; FUNC-LABEL: {{^}}atomic_add_1
+; EG: MEM_RAT ATOMIC_ADD
+define amdgpu_kernel void @atomic_add_1(i32 addrspace(1)* %out) {
entry:
%gep = getelementptr i32, i32 addrspace(1)* %out, i64 4
%val = atomicrmw volatile add i32 addrspace(1)* %gep, i32 1 seq_cst
ret void
}
-; FUNC-LABEL: {{^}}atomic_dec_add
-; EG: MEM_RAT ATOMIC_DEC_UINT
-define amdgpu_kernel void @atomic_dec_add(i32 addrspace(1)* %out) {
+; FUNC-LABEL: {{^}}atomic_add_neg1
+; EG: MEM_RAT ATOMIC_ADD
+define amdgpu_kernel void @atomic_add_neg1(i32 addrspace(1)* %out) {
entry:
%gep = getelementptr i32, i32 addrspace(1)* %out, i64 4
%val = atomicrmw volatile add i32 addrspace(1)* %gep, i32 -1 seq_cst
ret void
}
-; FUNC-LABEL: {{^}}atomic_inc_sub
-; EG: MEM_RAT ATOMIC_INC_UINT
-define amdgpu_kernel void @atomic_inc_sub(i32 addrspace(1)* %out) {
+; FUNC-LABEL: {{^}}atomic_sub_neg1
+; EG: MEM_RAT ATOMIC_SUB
+define amdgpu_kernel void @atomic_sub_neg1(i32 addrspace(1)* %out) {
entry:
%gep = getelementptr i32, i32 addrspace(1)* %out, i64 4
%val = atomicrmw volatile sub i32 addrspace(1)* %gep, i32 -1 seq_cst
ret void
}
-; FUNC-LABEL: {{^}}atomic_dec_sub
-; EG: MEM_RAT ATOMIC_DEC_UINT
-define amdgpu_kernel void @atomic_dec_sub(i32 addrspace(1)* %out) {
+; FUNC-LABEL: {{^}}atomic_sub_1
+; EG: MEM_RAT ATOMIC_SUB
+define amdgpu_kernel void @atomic_sub_1(i32 addrspace(1)* %out) {
entry:
%gep = getelementptr i32, i32 addrspace(1)* %out, i64 4
%val = atomicrmw volatile sub i32 addrspace(1)* %gep, i32 1 seq_cst
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