[PATCH] D137465: [AArch64]Combine BFXIL to ORR with right shift for ISD::OR instruction selection

[Mingming Liu via Phabricator via llvm-commits]

mingmingl created this revision.
mingmingl added reviewers: dmgreen, fhahn.
Herald added subscribers: hiraditya, kristof.beyls.
Herald added a project: All.
mingmingl requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

- This extends the existing helper function 'isWorthFoldingIntoOrrWithLeftShift' into 'isWorthFoldingIntoOrrWithShift', and encode right-shift imm (the encoding of left-shift imm is no-op).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D137465

Files:
  llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
  llvm/test/CodeGen/AArch64/fcopysign.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D137465.473337.patch
Type: text/x-patch
Size: 5467 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20221104/419adcb6/attachment.bin>