[PATCH] D137422: [DAGCombine] Generalize foldSelectCCToShiftAnd

[Mikhail Gudim via Phabricator via llvm-commits]

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[DAGCombine] Generalize foldSelectCCToShiftAnd

There are many equivalent ways to express the pattern `select_cc setlt
X, 0, A, 0". In this PR we extend the code in `foldSelectCCToShiftAnd`
to work on all such patterns.

All the patterns can be divided into two groups:

  (1) those which return zero if the sign bit is 0:
    select_cc setgt X, -1, 0, A -> and (sra X, size(X)-1), A
    select_cc setge X, 0, 0, A -> and (sra X, size(X)-1), A
    select_cc setlt X, 0, A, 0 -> and (sra X, size(X)-1), A
    select_cc setle X, -1, A, 0 -> and (sra X, size(X)-1), A
  (2) those which return zero if the sign bit is 1:
    select_cc setgt X, -1, A, 0 -> and (not (sra X, size(X)-1)), A
    select_cc setge X, 0, A, 0 -> and (not (sra X, size(X)-1)), A
    select_cc setlt X, 0, 0, A -> and (not (sra X, size(X)-1)), A
    select_cc setle X, -1, 0, A -> and (not (sra X, size(X)-1)), A

When X == A there are additional patterns:

  (1) those which return zero if the sign bit is 0:
    select_cc setgt X, 0, 0, X -> and (sra X, size(X)-1), X
    select_cc setge X, 1, 0, X -> and (sra X, size(X)-1), X
    select_cc setlt X, 1, X, 0 -> and (sra X, size(X)-1), X
    select_cc setle X, 0, X, 0 -> and (sra X, size(X)-1), X
  (2) those which return zero if the sign bit is 1:
    select_cc setgt X, 0, X, 0 -> and (not (sra X, size(X)-1)), X
    select_cc setge X, 1, X, 0 -> and (not (sra X, size(X)-1)), X
    select_cc setlt X, 1, 0, X -> and (not (sra X, size(X)-1)), X
    select_cc setle X, 0, 0, X -> and (not (sra X, size(X)-1)), X

Before this patch, we didn't handle all of the above patterns. In particular, none of the "inverted" patterns where the
"true op" of the select is zero were handled.


https://reviews.llvm.org/D137422

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/RISCV/select-to-shift-and.ll

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