[llvm] 5144133 - [AMDGPU] Fix GCNDownwardRPTracker::advanceBeforeNext at the end of MBB

Valery Pykhtin via llvm-commits llvm-commits at lists.llvm.org
Thu Nov 3 03:53:09 PDT 2022


Author: Valery Pykhtin
Date: 2022-11-03T11:52:56+01:00
New Revision: 5144133f6fd50d6067c808b83af90437995e441d

URL: https://github.com/llvm/llvm-project/commit/5144133f6fd50d6067c808b83af90437995e441d
DIFF: https://github.com/llvm/llvm-project/commit/5144133f6fd50d6067c808b83af90437995e441d.diff

LOG: [AMDGPU] Fix GCNDownwardRPTracker::advanceBeforeNext at the end of MBB

The problem with GCNDownwardRPTracker::advanceBeforeNext is that it doesn't allow to get register pressure
after the last instruction in a MBB.

However when we track RP through the boundary of a MBB we need the state that is after the last instruction
of the MBB and before the first instruction of the successor MBB. Currently we stop traking RP in the state
 'at' the last instruction of the MBB which is incorrect.

This patch fixes 27 lit tests with EXPENSIVE_CHECKS enabled.

Reviewed By: rampitec, arsenm

Differential Revision: https://reviews.llvm.org/D136927

Added: 
    

Modified: 
    llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
    llvm/lib/Target/AMDGPU/GCNRegPressure.h
    llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp b/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
index 2f38f7f65f80b..f9bed9a76c6fb 100644
--- a/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
@@ -325,12 +325,14 @@ bool GCNDownwardRPTracker::reset(const MachineInstr &MI,
 
 bool GCNDownwardRPTracker::advanceBeforeNext() {
   assert(MRI && "call reset first");
+  if (!LastTrackedMI)
+    return NextMI == MBBEnd;
 
-  NextMI = skipDebugInstructionsForward(NextMI, MBBEnd);
-  if (NextMI == MBBEnd)
-    return false;
+  assert(NextMI == MBBEnd || !NextMI->isDebugInstr());
 
-  SlotIndex SI = LIS.getInstructionIndex(*NextMI).getBaseIndex();
+  SlotIndex SI = NextMI == MBBEnd
+                     ? LIS.getInstructionIndex(*LastTrackedMI).getDeadSlot()
+                     : LIS.getInstructionIndex(*NextMI).getBaseIndex();
   assert(SI.isValid());
 
   // Remove dead registers or mask bits.
@@ -355,7 +357,9 @@ bool GCNDownwardRPTracker::advanceBeforeNext() {
 
   MaxPressure = max(MaxPressure, CurPressure);
 
-  return true;
+  LastTrackedMI = nullptr;
+
+  return NextMI == MBBEnd;
 }
 
 void GCNDownwardRPTracker::advanceToNext() {
@@ -379,9 +383,9 @@ void GCNDownwardRPTracker::advanceToNext() {
 }
 
 bool GCNDownwardRPTracker::advance() {
-  // If we have just called reset live set is actual.
-  if ((NextMI == MBBEnd) || (LastTrackedMI && !advanceBeforeNext()))
+  if (NextMI == MBBEnd)
     return false;
+  advanceBeforeNext();
   advanceToNext();
   return true;
 }

diff  --git a/llvm/lib/Target/AMDGPU/GCNRegPressure.h b/llvm/lib/Target/AMDGPU/GCNRegPressure.h
index b6ad960a8a65f..72e18acc1b8e4 100644
--- a/llvm/lib/Target/AMDGPU/GCNRegPressure.h
+++ b/llvm/lib/Target/AMDGPU/GCNRegPressure.h
@@ -172,8 +172,8 @@ class GCNDownwardRPTracker : public GCNRPTracker {
   // Returns false if block is empty except debug values.
   bool reset(const MachineInstr &MI, const LiveRegSet *LiveRegs = nullptr);
 
-  // Move to the state right before the next MI. Returns false if reached
-  // end of the block.
+  // Move to the state right before the next MI or after the end of MBB.
+  // Returns false if reached end of the block.
   bool advanceBeforeNext();
 
   // Move to the state at the MI, advanceBeforeNext has to be called first.

diff  --git a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
index 1577c1761aadd..25fcf422bfbe7 100644
--- a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
@@ -538,7 +538,6 @@ void GCNScheduleDAGMILive::computeBlockPressure(unsigned RegionIdx,
       RPTracker.advanceToNext();
       RPTracker.advance(MBB->end());
     }
-    RPTracker.reset(*OnlySucc->begin(), &RPTracker.getLiveRegs());
     RPTracker.advanceBeforeNext();
     MBBLiveIns[OnlySucc] = RPTracker.moveLiveRegs();
   }


        


More information about the llvm-commits mailing list