[llvm] 78466a9 - [InstCombine] Add tests for memset -> load forwarding (NFC)
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 3 02:16:07 PDT 2022
Author: Nikita Popov
Date: 2022-11-03T10:15:59+01:00
New Revision: 78466a9f8730fee1feabcdae92576f77df6e775d
URL: https://github.com/llvm/llvm-project/commit/78466a9f8730fee1feabcdae92576f77df6e775d
DIFF: https://github.com/llvm/llvm-project/commit/78466a9f8730fee1feabcdae92576f77df6e775d.diff
LOG: [InstCombine] Add tests for memset -> load forwarding (NFC)
We currently only forward store -> load, but could do the same
for memset as well.
Added:
Modified:
llvm/test/Transforms/InstCombine/load-store-forward.ll
Removed:
################################################################################
diff --git a/llvm/test/Transforms/InstCombine/load-store-forward.ll b/llvm/test/Transforms/InstCombine/load-store-forward.ll
index 767c370e2614..bfdbbf6bdb0e 100644
--- a/llvm/test/Transforms/InstCombine/load-store-forward.ll
+++ b/llvm/test/Transforms/InstCombine/load-store-forward.ll
@@ -104,8 +104,8 @@ define i32 @load_i32_store_nxv4i32(ptr %a) {
; CHECK-LABEL: @load_i32_store_nxv4i32(
; CHECK-NEXT: entry:
; CHECK-NEXT: store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr [[A:%.*]], align 16
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 4
-; CHECK-NEXT: ret i32 [[TMP1]]
+; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: ret i32 [[TMP0]]
;
entry:
store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr %a, align 16
@@ -156,8 +156,8 @@ define float @load_f32_store_nxv4f32(ptr %a) {
; CHECK-LABEL: @load_f32_store_nxv4f32(
; CHECK-NEXT: entry:
; CHECK-NEXT: store <vscale x 4 x float> shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float 1.000000e+00, i64 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer), ptr [[A:%.*]], align 16
-; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr [[A]], align 4
-; CHECK-NEXT: ret float [[TMP1]]
+; CHECK-NEXT: [[TMP0:%.*]] = load float, ptr [[A]], align 4
+; CHECK-NEXT: ret float [[TMP0]]
;
entry:
store <vscale x 4 x float> shufflevector (<vscale x 4 x float> insertelement (<vscale x 4 x float> poison, float 1.0, i64 0), <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer), ptr %a, align 16
@@ -182,8 +182,8 @@ define <4 x i32> @load_v4i32_store_nxv4i32(ptr %a) {
; CHECK-LABEL: @load_v4i32_store_nxv4i32(
; CHECK-NEXT: entry:
; CHECK-NEXT: store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr [[A:%.*]], align 16
-; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, ptr [[A]], align 16
-; CHECK-NEXT: ret <4 x i32> [[TMP2]]
+; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[A]], align 16
+; CHECK-NEXT: ret <4 x i32> [[TMP0]]
;
entry:
store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr %a, align 16
@@ -195,8 +195,8 @@ define <4 x i16> @load_v4i16_store_nxv4i32(ptr %a) {
; CHECK-LABEL: @load_v4i16_store_nxv4i32(
; CHECK-NEXT: entry:
; CHECK-NEXT: store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr [[A:%.*]], align 16
-; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i16>, ptr [[A]], align 16
-; CHECK-NEXT: ret <4 x i16> [[TMP2]]
+; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i16>, ptr [[A]], align 16
+; CHECK-NEXT: ret <4 x i16> [[TMP0]]
;
entry:
store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr %a, align 16
@@ -224,8 +224,8 @@ define <vscale x 4 x i8> @load_nxv4i8_store_nxv4i32(ptr %a) {
; CHECK-LABEL: @load_nxv4i8_store_nxv4i32(
; CHECK-NEXT: entry:
; CHECK-NEXT: store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr [[A:%.*]], align 16
-; CHECK-NEXT: [[TMP2:%.*]] = load <vscale x 4 x i8>, ptr [[A]], align 16
-; CHECK-NEXT: ret <vscale x 4 x i8> [[TMP2]]
+; CHECK-NEXT: [[TMP0:%.*]] = load <vscale x 4 x i8>, ptr [[A]], align 16
+; CHECK-NEXT: ret <vscale x 4 x i8> [[TMP0]]
;
entry:
store <vscale x 4 x i32> shufflevector (<vscale x 4 x i32> insertelement (<vscale x 4 x i32> poison, i32 1, i64 0), <vscale x 4 x i32> poison, <vscale x 4 x i32> zeroinitializer), ptr %a, align 16
@@ -253,3 +253,62 @@ define i1 @load_i1_store_i8(ptr %a) {
%v = load i1, ptr %a
ret i1 %v
}
+
+define i32 @load_after_memset_0(ptr %a) {
+; CHECK-LABEL: @load_after_memset_0(
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: ret i32 [[V]]
+;
+ call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)
+ %v = load i32, ptr %a
+ ret i32 %v
+}
+
+define i32 @load_after_memset_1(ptr %a) {
+; CHECK-LABEL: @load_after_memset_1(
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 1, i64 16, i1 false)
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: ret i32 [[V]]
+;
+ call void @llvm.memset.p0.i64(ptr %a, i8 1, i64 16, i1 false)
+ %v = load i32, ptr %a
+ ret i32 %v
+}
+
+define i32 @load_after_memset_unknown(ptr %a, i8 %byte) {
+; CHECK-LABEL: @load_after_memset_unknown(
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 [[BYTE:%.*]], i64 16, i1 false)
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: ret i32 [[V]]
+;
+ call void @llvm.memset.p0.i64(ptr %a, i8 %byte, i64 16, i1 false)
+ %v = load i32, ptr %a
+ ret i32 %v
+}
+
+define i32 @load_after_memset_0_clobber(ptr %a) {
+; CHECK-LABEL: @load_after_memset_0_clobber(
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
+; CHECK-NEXT: store i8 1, ptr [[A]], align 1
+; CHECK-NEXT: [[V:%.*]] = load i32, ptr [[A]], align 4
+; CHECK-NEXT: ret i32 [[V]]
+;
+ call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)
+ store i8 1, ptr %a
+ %v = load i32, ptr %a
+ ret i32 %v
+}
+
+define i256 @load_after_memset_0_too_small(ptr %a) {
+; CHECK-LABEL: @load_after_memset_0_too_small(
+; CHECK-NEXT: call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(16) [[A:%.*]], i8 0, i64 16, i1 false)
+; CHECK-NEXT: [[V:%.*]] = load i256, ptr [[A]], align 4
+; CHECK-NEXT: ret i256 [[V]]
+;
+ call void @llvm.memset.p0.i64(ptr %a, i8 0, i64 16, i1 false)
+ %v = load i256, ptr %a
+ ret i256 %v
+}
+
+declare void @llvm.memset.p0.i64(ptr, i8, i64, i1)
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