[PATCH] D137280: [RISCV] Prevent autovectorization using vscale with Zvl32b.

[Craig Topper via Phabricator via llvm-commits]

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RVVBitsPerBlock is 64. If VLen==32, VLen/RVVBitsPerBlock is 0.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D137280

Files:
  clang/lib/Basic/Targets/RISCV.cpp
  clang/test/CodeGen/riscv-vector-bits-vscale-range.c
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
  llvm/test/Transforms/LoopVectorize/RISCV/zvl32b.ll

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