[PATCH] D137066: [AMDGPU] Add amdgcn_s_buffer_load_imm intrinsic
Piotr Sobczak via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 2 06:33:43 PDT 2022
piotr added a comment.
In D137066#3902068 <https://reviews.llvm.org/D137066#3902068>, @nhaehnle wrote:
> I think the question is really: what IR examples are there that could use scalar loads with immediate offsets but don't because instruction selection fails to extract the constant; and why does extracting the constant fail?
All cases of isel not being able to extract the constant I looked at were due to the nodes scattered over different basic blocks.
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https://reviews.llvm.org/D137066/new/
https://reviews.llvm.org/D137066
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