[PATCH] D136442: [GISel] Add (fsub +-0.0, X) -> fneg combine

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fsub-fneg.mir:367
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arsenm wrote:
> Test for the undef vector element case
There's already a test "test_v4f32_negzero_undef_nofold". Do we want that to fold or not?
I guess so, since undef can be anything we can consider it to be identical to other other elements 

I updated it and added another one for poszero.


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D136442