[PATCH] D136663: Handling ADD|SUB U64 decomposed Pseudos not getting lowered to SDWA form

[Christudasan Devadasan via Phabricator via llvm-commits]

cdevadas added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp:873
+  if (!TII->canShrink(MISucc, *MRI) &&
+      !TII->getNamedOperand(MI, AMDGPU::OpName::src1)->isReg())
     return;
----------------
Need a comment here for allowing non-register vsrc1 cases.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136663/new/

https://reviews.llvm.org/D136663