[PATCH] D136730: [RISCV][CodeGen] Account for LMUL for Vector Integer Arithmetic Instructions

[Michael Maitland via Phabricator via llvm-commits]

michaelmaitland added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVScheduleV.td:117
 // 11.5. Vector Bitwise Logical Instructions
-def WriteVIALUV       : SchedWrite;
-def WriteVIALUX       : SchedWrite;
-def WriteVIALUI       : SchedWrite;
+defm "" : LMULSchedWrites<"WriteVIALUV">;
+defm "" : LMULSchedWrites<"WriteVIALUX">;
----------------
craig.topper wrote:
> Is the empty string needed?
We do need the double quotes. According to the [[ https://llvm.org/docs/TableGen/ProgRef.html#defm-invoke-multiclasses-to-define-multiple-records | docs ]], 

```
The name is parsed in the same special mode used by def. If the name is not included, an unspecified but globally unique name is provided. That is, the following examples end up with different names:
defm    : SomeMultiClass<...>;   // A globally unique name.
defm "" : SomeMultiClass<...>;   // An empty name.
```
Its no good if we have an empty name because it would generate something like `<globally_unique_name>WriteVIALUV_UpperBound` when we really want `WriteVIALUV_UpperBound`


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https://reviews.llvm.org/D136730