[PATCH] D124195: [AMDGPU] Separate out SGPR spills to VGPR lanes during PEI

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

In D124195#3892023 <https://reviews.llvm.org/D124195#3892023>, @nhaehnle wrote:

> - How about renaming `allocateSGPRSpillToVGPR` to `allocateSGPRSpillToVGPRLanes`? This accounts for the fact that an SGPR spill is neither allocated to an entire VGPR, nor is an SGPR spill necessarily allocated to a single VGPR (it could cross multiple VGPRs depending on how the lane allocation works out)

I believe this is actually an optimization we're regressing on with the switch to spilling to virtual VGPRs. It will need to be reimplemented as a new optimization



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Comment at: llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp:350-353
+    for (MachineBasicBlock &MBB : MF) {
+      MBB.addLiveIn(LaneVGPR);
+      MBB.sortUniqueLiveIns();
+    }
----------------
Can we defer this until after all the spills are handled?


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  https://reviews.llvm.org/D124195/new/

https://reviews.llvm.org/D124195