[llvm] 0837bc1 - [AArch64] SME2 remove comma from the regression tests
Caroline Concatto via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 1 10:48:11 PDT 2022
Author: Caroline Concatto
Date: 2022-11-01T17:44:41Z
New Revision: 0837bc1d041517ab29f86792288113409b7c6672
URL: https://github.com/llvm/llvm-project/commit/0837bc1d041517ab29f86792288113409b7c6672
DIFF: https://github.com/llvm/llvm-project/commit/0837bc1d041517ab29f86792288113409b7c6672.diff
LOG: [AArch64] SME2 remove comma from the regression tests
This patch replaces:
CHECK, INST by CHECK-INST
the comma(,) by dash line(-) in the binary encoding
The mistake was introduced when we had to use pintVectoList and the test's
automated update was not checking that a comma should not replace these
parts of the test.
Added:
Modified:
llvm/test/MC/AArch64/SME2/add.s
llvm/test/MC/AArch64/SME2/bfmlal.s
llvm/test/MC/AArch64/SME2/bfmlsl.s
llvm/test/MC/AArch64/SME2/fmla.s
llvm/test/MC/AArch64/SME2/fmlal.s
llvm/test/MC/AArch64/SME2/fmls.s
llvm/test/MC/AArch64/SME2/fmlsl.s
llvm/test/MC/AArch64/SME2/smlal.s
llvm/test/MC/AArch64/SME2/smlall.s
llvm/test/MC/AArch64/SME2/smlsl.s
llvm/test/MC/AArch64/SME2/smlsll.s
llvm/test/MC/AArch64/SME2/sub.s
llvm/test/MC/AArch64/SME2/sumlall.s
llvm/test/MC/AArch64/SME2/umlal.s
llvm/test/MC/AArch64/SME2/umlall.s
llvm/test/MC/AArch64/SME2/umlsl.s
llvm/test/MC/AArch64/SME2/umlsll.s
llvm/test/MC/AArch64/SME2/usmlall.s
Removed:
################################################################################
diff --git a/llvm/test/MC/AArch64/SME2/add.s b/llvm/test/MC/AArch64/SME2/add.s
index 82f11c92671c0..5b658afcb8827 100644
--- a/llvm/test/MC/AArch64/SME2/add.s
+++ b/llvm/test/MC/AArch64/SME2/add.s
@@ -119,6 +119,7 @@ add za.s[w10, 0], {z18.s, z19.s} // 11000001-10100000-01011110-01010000
// CHECK-INST: add za.s[w10, 0, vgx2], { z18.s, z19.s }
// CHECK-ENCODING: [0x50,0x5e,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
+// CHECK-UNKNOWN: c1a05e50 <unknown>
add za.s[w8, 0], {z12.s, z13.s} // 11000001-10100000-00011101-10010000
// CHECK-INST: add za.s[w8, 0, vgx2], { z12.s, z13.s }
@@ -173,7 +174,7 @@ add za.s[w9, 7], {z12.s, z13.s} // 11000001-10100000-00111101-10010111
// CHECK-ENCODING: [0x97,0x3d,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a03d97 <unknown>
-add za.s[w8, 0, vgx2], {z0.s, z1.s}, z0.s // 11000001, 00100000, 00011000, 00010000
+add za.s[w8, 0, vgx2], {z0.s, z1.s}, z0.s // 11000001-00100000-00011000-00010000
// CHECK-INST: add za.s[w8, 0, vgx2], { z0.s, z1.s }, z0.s
// CHECK-ENCODING: [0x10,0x18,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -185,7 +186,7 @@ add za.s[w8, 0], {z0.s - z1.s}, z0.s // 11000001-00100000-00011000-00010000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1201810 <unknown>
-add za.s[w10, 5, vgx2], {z10.s, z11.s}, z5.s // 11000001, 00100101, 01011001, 01010101
+add za.s[w10, 5, vgx2], {z10.s, z11.s}, z5.s // 11000001-00100101-01011001-01010101
// CHECK-INST: add za.s[w10, 5, vgx2], { z10.s, z11.s }, z5.s
// CHECK-ENCODING: [0x55,0x59,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -197,7 +198,7 @@ add za.s[w10, 5], {z10.s - z11.s}, z5.s // 11000001-00100101-01011001-01010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1255955 <unknown>
-add za.s[w11, 7, vgx2], {z13.s, z14.s}, z8.s // 11000001, 00101000, 01111001, 10110111
+add za.s[w11, 7, vgx2], {z13.s, z14.s}, z8.s // 11000001-00101000-01111001-10110111
// CHECK-INST: add za.s[w11, 7, vgx2], { z13.s, z14.s }, z8.s
// CHECK-ENCODING: [0xb7,0x79,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -209,7 +210,7 @@ add za.s[w11, 7], {z13.s - z14.s}, z8.s // 11000001-00101000-01111001-10110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12879b7 <unknown>
-add za.s[w11, 7, vgx2], {z31.s, z0.s}, z15.s // 11000001, 00101111, 01111011, 11110111
+add za.s[w11, 7, vgx2], {z31.s, z0.s}, z15.s // 11000001-00101111-01g111011-11110111
// CHECK-INST: add za.s[w11, 7, vgx2], { z31.s, z0.s }, z15.s
// CHECK-ENCODING: [0xf7,0x7b,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -221,7 +222,7 @@ add za.s[w11, 7], {z31.s - z0.s}, z15.s // 11000001-00101111-01111011-11110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f7bf7 <unknown>
-add za.s[w8, 5, vgx2], {z17.s, z18.s}, z0.s // 11000001, 00100000, 00011010, 00110101
+add za.s[w8, 5, vgx2], {z17.s, z18.s}, z0.s // 11000001-00100000-00011010-00110101
// CHECK-INST: add za.s[w8, 5, vgx2], { z17.s, z18.s }, z0.s
// CHECK-ENCODING: [0x35,0x1a,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -233,7 +234,7 @@ add za.s[w8, 5], {z17.s - z18.s}, z0.s // 11000001-00100000-00011010-001101
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1201a35 <unknown>
-add za.s[w8, 1, vgx2], {z1.s, z2.s}, z14.s // 11000001, 00101110, 00011000, 00110001
+add za.s[w8, 1, vgx2], {z1.s, z2.s}, z14.s // 11000001-00101110-00011000-00110001
// CHECK-INST: add za.s[w8, 1, vgx2], { z1.s, z2.s }, z14.s
// CHECK-ENCODING: [0x31,0x18,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -245,7 +246,7 @@ add za.s[w8, 1], {z1.s - z2.s}, z14.s // 11000001-00101110-00011000-0011000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e1831 <unknown>
-add za.s[w10, 0, vgx2], {z19.s, z20.s}, z4.s // 11000001, 00100100, 01011010, 01110000
+add za.s[w10, 0, vgx2], {z19.s, z20.s}, z4.s // 11000001-00100100-01011010-01110000
// CHECK-INST: add za.s[w10, 0, vgx2], { z19.s, z20.s }, z4.s
// CHECK-ENCODING: [0x70,0x5a,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -257,7 +258,7 @@ add za.s[w10, 0], {z19.s - z20.s}, z4.s // 11000001-00100100-01011010-01110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1245a70 <unknown>
-add za.s[w8, 0, vgx2], {z12.s, z13.s}, z2.s // 11000001, 00100010, 00011001, 10010000
+add za.s[w8, 0, vgx2], {z12.s, z13.s}, z2.s // 11000001-00100010-00011001-10010000
// CHECK-INST: add za.s[w8, 0, vgx2], { z12.s, z13.s }, z2.s
// CHECK-ENCODING: [0x90,0x19,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -269,7 +270,7 @@ add za.s[w8, 0], {z12.s - z13.s}, z2.s // 11000001-00100010-00011001-100100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1221990 <unknown>
-add za.s[w10, 1, vgx2], {z1.s, z2.s}, z10.s // 11000001, 00101010, 01011000, 00110001
+add za.s[w10, 1, vgx2], {z1.s, z2.s}, z10.s // 11000001-00101010-01011000-00110001
// CHECK-INST: add za.s[w10, 1, vgx2], { z1.s, z2.s }, z10.s
// CHECK-ENCODING: [0x31,0x58,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -281,7 +282,7 @@ add za.s[w10, 1], {z1.s - z2.s}, z10.s // 11000001-00101010-01011000-001100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a5831 <unknown>
-add za.s[w8, 5, vgx2], {z22.s, z23.s}, z14.s // 11000001, 00101110, 00011010, 11010101
+add za.s[w8, 5, vgx2], {z22.s, z23.s}, z14.s // 11000001-00101110-00011010-11010101
// CHECK-INST: add za.s[w8, 5, vgx2], { z22.s, z23.s }, z14.s
// CHECK-ENCODING: [0xd5,0x1a,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -293,7 +294,7 @@ add za.s[w8, 5], {z22.s - z23.s}, z14.s // 11000001-00101110-00011010-11010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e1ad5 <unknown>
-add za.s[w11, 2, vgx2], {z9.s, z10.s}, z1.s // 11000001, 00100001, 01111001, 00110010
+add za.s[w11, 2, vgx2], {z9.s, z10.s}, z1.s // 11000001-00100001-01111001-00110010
// CHECK-INST: add za.s[w11, 2, vgx2], { z9.s, z10.s }, z1.s
// CHECK-ENCODING: [0x32,0x79,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -305,7 +306,7 @@ add za.s[w11, 2], {z9.s - z10.s}, z1.s // 11000001-00100001-01111001-001100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1217932 <unknown>
-add za.s[w9, 7, vgx2], {z12.s, z13.s}, z11.s // 11000001, 00101011, 00111001, 10010111
+add za.s[w9, 7, vgx2], {z12.s, z13.s}, z11.s // 11000001-00101011-00111001-10010111
// CHECK-INST: add za.s[w9, 7, vgx2], { z12.s, z13.s }, z11.s
// CHECK-ENCODING: [0x97,0x39,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -343,7 +344,7 @@ add {z30.s-z31.s}, {z30.s-z31.s}, z15.s // 11000001-10101111-10100011-00011
// CHECK-UNKNOWN: c1afa31e <unknown>
-add za.s[w8, 0, vgx2], {z0.s, z1.s}, {z0.s, z1.s} // 11000001, 10100000, 00011000, 00010000
+add za.s[w8, 0, vgx2], {z0.s, z1.s}, {z0.s, z1.s} // 11000001-10100000-00011000-00010000
// CHECK-INST: add za.s[w8, 0, vgx2], { z0.s, z1.s }, { z0.s, z1.s }
// CHECK-ENCODING: [0x10,0x18,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -355,7 +356,7 @@ add za.s[w8, 0], {z0.s - z1.s}, {z0.s - z1.s} // 11000001-10100000-00011000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a01810 <unknown>
-add za.s[w10, 5, vgx2], {z10.s, z11.s}, {z20.s, z21.s} // 11000001, 10110100, 01011001, 01010101
+add za.s[w10, 5, vgx2], {z10.s, z11.s}, {z20.s, z21.s} // 11000001-10110100-01011001-01010101
// CHECK-INST: add za.s[w10, 5, vgx2], { z10.s, z11.s }, { z20.s, z21.s }
// CHECK-ENCODING: [0x55,0x59,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -367,7 +368,7 @@ add za.s[w10, 5], {z10.s - z11.s}, {z20.s - z21.s} // 11000001-10110100-010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b45955 <unknown>
-add za.s[w11, 7, vgx2], {z12.s, z13.s}, {z8.s, z9.s} // 11000001, 10101000, 01111001, 10010111
+add za.s[w11, 7, vgx2], {z12.s, z13.s}, {z8.s, z9.s} // 11000001-10101000-01111001-10010111
// CHECK-INST: add za.s[w11, 7, vgx2], { z12.s, z13.s }, { z8.s, z9.s }
// CHECK-ENCODING: [0x97,0x79,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -379,7 +380,7 @@ add za.s[w11, 7], {z12.s - z13.s}, {z8.s - z9.s} // 11000001-10101000-01111
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a87997 <unknown>
-add za.s[w11, 7, vgx2], {z30.s, z31.s}, {z30.s, z31.s} // 11000001, 10111110, 01111011, 11010111
+add za.s[w11, 7, vgx2], {z30.s, z31.s}, {z30.s, z31.s} // 11000001-10111110-01111011-11010111
// CHECK-INST: add za.s[w11, 7, vgx2], { z30.s, z31.s }, { z30.s, z31.s }
// CHECK-ENCODING: [0xd7,0x7b,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -391,7 +392,7 @@ add za.s[w11, 7], {z30.s - z31.s}, {z30.s - z31.s} // 11000001-10111110-011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be7bd7 <unknown>
-add za.s[w8, 5, vgx2], {z16.s, z17.s}, {z16.s, z17.s} // 11000001, 10110000, 00011010, 00010101
+add za.s[w8, 5, vgx2], {z16.s, z17.s}, {z16.s, z17.s} // 11000001-10110000-00011010-00010101
// CHECK-INST: add za.s[w8, 5, vgx2], { z16.s, z17.s }, { z16.s, z17.s }
// CHECK-ENCODING: [0x15,0x1a,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -403,7 +404,7 @@ add za.s[w8, 5], {z16.s - z17.s}, {z16.s - z17.s} // 11000001-10110000-0001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b01a15 <unknown>
-add za.s[w8, 1, vgx2], {z0.s, z1.s}, {z30.s, z31.s} // 11000001, 10111110, 00011000, 00010001
+add za.s[w8, 1, vgx2], {z0.s, z1.s}, {z30.s, z31.s} // 11000001-10111110-00011000-00010001
// CHECK-INST: add za.s[w8, 1, vgx2], { z0.s, z1.s }, { z30.s, z31.s }
// CHECK-ENCODING: [0x11,0x18,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -415,7 +416,7 @@ add za.s[w8, 1], {z0.s - z1.s}, {z30.s - z31.s} // 11000001-10111110-000110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be1811 <unknown>
-add za.s[w10, 0, vgx2], {z18.s, z19.s}, {z20.s, z21.s} // 11000001, 10110100, 01011010, 01010000
+add za.s[w10, 0, vgx2], {z18.s, z19.s}, {z20.s, z21.s} // 11000001-10110100-01011010-01010000
// CHECK-INST: add za.s[w10, 0, vgx2], { z18.s, z19.s }, { z20.s, z21.s }
// CHECK-ENCODING: [0x50,0x5a,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -427,7 +428,7 @@ add za.s[w10, 0], {z18.s - z19.s}, {z20.s - z21.s} // 11000001-10110100-010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b45a50 <unknown>
-add za.s[w8, 0, vgx2], {z12.s, z13.s}, {z2.s, z3.s} // 11000001, 10100010, 00011001, 10010000
+add za.s[w8, 0, vgx2], {z12.s, z13.s}, {z2.s, z3.s} // 11000001-10100010-00011001-10010000
// CHECK-INST: add za.s[w8, 0, vgx2], { z12.s, z13.s }, { z2.s, z3.s }
// CHECK-ENCODING: [0x90,0x19,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -439,7 +440,7 @@ add za.s[w8, 0], {z12.s - z13.s}, {z2.s - z3.s} // 11000001-10100010-000110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a21990 <unknown>
-add za.s[w10, 1, vgx2], {z0.s, z1.s}, {z26.s, z27.s} // 11000001, 10111010, 01011000, 00010001
+add za.s[w10, 1, vgx2], {z0.s, z1.s}, {z26.s, z27.s} // 11000001-10111010-01011000-00010001
// CHECK-INST: add za.s[w10, 1, vgx2], { z0.s, z1.s }, { z26.s, z27.s }
// CHECK-ENCODING: [0x11,0x58,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -451,7 +452,7 @@ add za.s[w10, 1], {z0.s - z1.s}, {z26.s - z27.s} // 11000001-10111010-01011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba5811 <unknown>
-add za.s[w8, 5, vgx2], {z22.s, z23.s}, {z30.s, z31.s} // 11000001, 10111110, 00011010, 11010101
+add za.s[w8, 5, vgx2], {z22.s, z23.s}, {z30.s, z31.s} // 11000001-10111110-00011010-11010101
// CHECK-INST: add za.s[w8, 5, vgx2], { z22.s, z23.s }, { z30.s, z31.s }
// CHECK-ENCODING: [0xd5,0x1a,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -463,7 +464,7 @@ add za.s[w8, 5], {z22.s - z23.s}, {z30.s - z31.s} // 11000001-10111110-0001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be1ad5 <unknown>
-add za.s[w11, 2, vgx2], {z8.s, z9.s}, {z0.s, z1.s} // 11000001, 10100000, 01111001, 00010010
+add za.s[w11, 2, vgx2], {z8.s, z9.s}, {z0.s, z1.s} // 11000001-10100000-01111001-00010010
// CHECK-INST: add za.s[w11, 2, vgx2], { z8.s, z9.s }, { z0.s, z1.s }
// CHECK-ENCODING: [0x12,0x79,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -475,7 +476,7 @@ add za.s[w11, 2], {z8.s - z9.s}, {z0.s - z1.s} // 11000001-10100000-0111100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a07912 <unknown>
-add za.s[w9, 7, vgx2], {z12.s, z13.s}, {z10.s, z11.s} // 11000001, 10101010, 00111001, 10010111
+add za.s[w9, 7, vgx2], {z12.s, z13.s}, {z10.s, z11.s} // 11000001-10101010-00111001-10010111
// CHECK-INST: add za.s[w9, 7, vgx2], { z12.s, z13.s }, { z10.s, z11.s }
// CHECK-ENCODING: [0x97,0x39,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -633,7 +634,7 @@ add za.d[w9, 7], {z12.d, z13.d} // 11000001-11100000-00111101-10010111
// CHECK-UNKNOWN: c1e03d97 <unknown>
-add za.d[w8, 0, vgx2], {z0.d, z1.d}, z0.d // 11000001, 01100000, 00011000, 00010000
+add za.d[w8, 0, vgx2], {z0.d, z1.d}, z0.d // 11000001-01100000-00011000-00010000
// CHECK-INST: add za.d[w8, 0, vgx2], { z0.d, z1.d }, z0.d
// CHECK-ENCODING: [0x10,0x18,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -645,7 +646,7 @@ add za.d[w8, 0], {z0.d - z1.d}, z0.d // 11000001-01100000-00011000-00010000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1601810 <unknown>
-add za.d[w10, 5, vgx2], {z10.d, z11.d}, z5.d // 11000001, 01100101, 01011001, 01010101
+add za.d[w10, 5, vgx2], {z10.d, z11.d}, z5.d // 11000001-01100101-01011001-01010101
// CHECK-INST: add za.d[w10, 5, vgx2], { z10.d, z11.d }, z5.d
// CHECK-ENCODING: [0x55,0x59,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -657,7 +658,7 @@ add za.d[w10, 5], {z10.d - z11.d}, z5.d // 11000001-01100101-01011001-01010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1655955 <unknown>
-add za.d[w11, 7, vgx2], {z13.d, z14.d}, z8.d // 11000001, 01101000, 01111001, 10110111
+add za.d[w11, 7, vgx2], {z13.d, z14.d}, z8.d // 11000001-01101000-01111001-10110111
// CHECK-INST: add za.d[w11, 7, vgx2], { z13.d, z14.d }, z8.d
// CHECK-ENCODING: [0xb7,0x79,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -669,7 +670,7 @@ add za.d[w11, 7], {z13.d - z14.d}, z8.d // 11000001-01101000-01111001-10110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16879b7 <unknown>
-add za.d[w11, 7, vgx2], {z31.d, z0.d}, z15.d // 11000001, 01101111, 01111011, 11110111
+add za.d[w11, 7, vgx2], {z31.d, z0.d}, z15.d // 11000001-01101111-01g111011-11110111
// CHECK-INST: add za.d[w11, 7, vgx2], { z31.d, z0.d }, z15.d
// CHECK-ENCODING: [0xf7,0x7b,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -681,7 +682,7 @@ add za.d[w11, 7], {z31.d - z0.d}, z15.d // 11000001-01101111-01111011-11110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f7bf7 <unknown>
-add za.d[w8, 5, vgx2], {z17.d, z18.d}, z0.d // 11000001, 01100000, 00011010, 00110101
+add za.d[w8, 5, vgx2], {z17.d, z18.d}, z0.d // 11000001-01100000-00011010-00110101
// CHECK-INST: add za.d[w8, 5, vgx2], { z17.d, z18.d }, z0.d
// CHECK-ENCODING: [0x35,0x1a,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -693,7 +694,7 @@ add za.d[w8, 5], {z17.d - z18.d}, z0.d // 11000001-01100000-00011010-001101
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1601a35 <unknown>
-add za.d[w8, 1, vgx2], {z1.d, z2.d}, z14.d // 11000001, 01101110, 00011000, 00110001
+add za.d[w8, 1, vgx2], {z1.d, z2.d}, z14.d // 11000001-01101110-00011000-00110001
// CHECK-INST: add za.d[w8, 1, vgx2], { z1.d, z2.d }, z14.d
// CHECK-ENCODING: [0x31,0x18,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -705,7 +706,7 @@ add za.d[w8, 1], {z1.d - z2.d}, z14.d // 11000001-01101110-00011000-0011000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e1831 <unknown>
-add za.d[w10, 0, vgx2], {z19.d, z20.d}, z4.d // 11000001, 01100100, 01011010, 01110000
+add za.d[w10, 0, vgx2], {z19.d, z20.d}, z4.d // 11000001-01100100-01011010-01110000
// CHECK-INST: add za.d[w10, 0, vgx2], { z19.d, z20.d }, z4.d
// CHECK-ENCODING: [0x70,0x5a,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -717,7 +718,7 @@ add za.d[w10, 0], {z19.d - z20.d}, z4.d // 11000001-01100100-01011010-01110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1645a70 <unknown>
-add za.d[w8, 0, vgx2], {z12.d, z13.d}, z2.d // 11000001, 01100010, 00011001, 10010000
+add za.d[w8, 0, vgx2], {z12.d, z13.d}, z2.d // 11000001-01100010-00011001-10010000
// CHECK-INST: add za.d[w8, 0, vgx2], { z12.d, z13.d }, z2.d
// CHECK-ENCODING: [0x90,0x19,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -729,7 +730,7 @@ add za.d[w8, 0], {z12.d - z13.d}, z2.d // 11000001-01100010-00011001-100100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1621990 <unknown>
-add za.d[w10, 1, vgx2], {z1.d, z2.d}, z10.d // 11000001, 01101010, 01011000, 00110001
+add za.d[w10, 1, vgx2], {z1.d, z2.d}, z10.d // 11000001-01101010-01011000-00110001
// CHECK-INST: add za.d[w10, 1, vgx2], { z1.d, z2.d }, z10.d
// CHECK-ENCODING: [0x31,0x58,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -741,7 +742,7 @@ add za.d[w10, 1], {z1.d - z2.d}, z10.d // 11000001-01101010-01011000-001100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a5831 <unknown>
-add za.d[w8, 5, vgx2], {z22.d, z23.d}, z14.d // 11000001, 01101110, 00011010, 11010101
+add za.d[w8, 5, vgx2], {z22.d, z23.d}, z14.d // 11000001-01101110-00011010-11010101
// CHECK-INST: add za.d[w8, 5, vgx2], { z22.d, z23.d }, z14.d
// CHECK-ENCODING: [0xd5,0x1a,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -753,7 +754,7 @@ add za.d[w8, 5], {z22.d - z23.d}, z14.d // 11000001-01101110-00011010-11010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e1ad5 <unknown>
-add za.d[w11, 2, vgx2], {z9.d, z10.d}, z1.d // 11000001, 01100001, 01111001, 00110010
+add za.d[w11, 2, vgx2], {z9.d, z10.d}, z1.d // 11000001-01100001-01111001-00110010
// CHECK-INST: add za.d[w11, 2, vgx2], { z9.d, z10.d }, z1.d
// CHECK-ENCODING: [0x32,0x79,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -765,7 +766,7 @@ add za.d[w11, 2], {z9.d - z10.d}, z1.d // 11000001-01100001-01111001-001100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1617932 <unknown>
-add za.d[w9, 7, vgx2], {z12.d, z13.d}, z11.d // 11000001, 01101011, 00111001, 10010111
+add za.d[w9, 7, vgx2], {z12.d, z13.d}, z11.d // 11000001-01101011-00111001-10010111
// CHECK-INST: add za.d[w9, 7, vgx2], { z12.d, z13.d }, z11.d
// CHECK-ENCODING: [0x97,0x39,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -803,7 +804,7 @@ add {z30.d-z31.d}, {z30.d-z31.d}, z15.d // 11000001-11101111-10100011-00011
// CHECK-UNKNOWN: c1efa31e <unknown>
-add za.d[w8, 0, vgx2], {z0.d, z1.d}, {z0.d, z1.d} // 11000001, 11100000, 00011000, 00010000
+add za.d[w8, 0, vgx2], {z0.d, z1.d}, {z0.d, z1.d} // 11000001-11100000-00011000-00010000
// CHECK-INST: add za.d[w8, 0, vgx2], { z0.d, z1.d }, { z0.d, z1.d }
// CHECK-ENCODING: [0x10,0x18,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -815,7 +816,7 @@ add za.d[w8, 0], {z0.d - z1.d}, {z0.d - z1.d} // 11000001-11100000-00011000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e01810 <unknown>
-add za.d[w10, 5, vgx2], {z10.d, z11.d}, {z20.d, z21.d} // 11000001, 11110100, 01011001, 01010101
+add za.d[w10, 5, vgx2], {z10.d, z11.d}, {z20.d, z21.d} // 11000001-11110100-01011001-01010101
// CHECK-INST: add za.d[w10, 5, vgx2], { z10.d, z11.d }, { z20.d, z21.d }
// CHECK-ENCODING: [0x55,0x59,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -827,7 +828,7 @@ add za.d[w10, 5], {z10.d - z11.d}, {z20.d - z21.d} // 11000001-11110100-010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f45955 <unknown>
-add za.d[w11, 7, vgx2], {z12.d, z13.d}, {z8.d, z9.d} // 11000001, 11101000, 01111001, 10010111
+add za.d[w11, 7, vgx2], {z12.d, z13.d}, {z8.d, z9.d} // 11000001-11101000-01111001-10010111
// CHECK-INST: add za.d[w11, 7, vgx2], { z12.d, z13.d }, { z8.d, z9.d }
// CHECK-ENCODING: [0x97,0x79,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -839,7 +840,7 @@ add za.d[w11, 7], {z12.d - z13.d}, {z8.d - z9.d} // 11000001-11101000-01111
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e87997 <unknown>
-add za.d[w11, 7, vgx2], {z30.d, z31.d}, {z30.d, z31.d} // 11000001, 11111110, 01111011, 11010111
+add za.d[w11, 7, vgx2], {z30.d, z31.d}, {z30.d, z31.d} // 11000001-11111110-01111011-11010111
// CHECK-INST: add za.d[w11, 7, vgx2], { z30.d, z31.d }, { z30.d, z31.d }
// CHECK-ENCODING: [0xd7,0x7b,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -851,7 +852,7 @@ add za.d[w11, 7], {z30.d - z31.d}, {z30.d - z31.d} // 11000001-11111110-011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe7bd7 <unknown>
-add za.d[w8, 5, vgx2], {z16.d, z17.d}, {z16.d, z17.d} // 11000001, 11110000, 00011010, 00010101
+add za.d[w8, 5, vgx2], {z16.d, z17.d}, {z16.d, z17.d} // 11000001-11110000-00011010-00010101
// CHECK-INST: add za.d[w8, 5, vgx2], { z16.d, z17.d }, { z16.d, z17.d }
// CHECK-ENCODING: [0x15,0x1a,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -863,7 +864,7 @@ add za.d[w8, 5], {z16.d - z17.d}, {z16.d - z17.d} // 11000001-11110000-0001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f01a15 <unknown>
-add za.d[w8, 1, vgx2], {z0.d, z1.d}, {z30.d, z31.d} // 11000001, 11111110, 00011000, 00010001
+add za.d[w8, 1, vgx2], {z0.d, z1.d}, {z30.d, z31.d} // 11000001-11111110-00011000-00010001
// CHECK-INST: add za.d[w8, 1, vgx2], { z0.d, z1.d }, { z30.d, z31.d }
// CHECK-ENCODING: [0x11,0x18,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -876,7 +877,7 @@ add za.d[w8, 1], {z0.d - z1.d}, {z30.d - z31.d} // 11000001-11111110-000110
// CHECK-UNKNOWN: c1fe1811 <unknown>
-add za.d[w10, 0, vgx2], {z18.d, z19.d}, {z20.d, z21.d} // 11000001, 11110100, 01011010, 01010000
+add za.d[w10, 0, vgx2], {z18.d, z19.d}, {z20.d, z21.d} // 11000001-11110100-01011010-01010000
// CHECK-INST: add za.d[w10, 0, vgx2], { z18.d, z19.d }, { z20.d, z21.d }
// CHECK-ENCODING: [0x50,0x5a,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -888,7 +889,7 @@ add za.d[w10, 0], {z18.d - z19.d}, {z20.d - z21.d} // 11000001-11110100-010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f45a50 <unknown>
-add za.d[w8, 0, vgx2], {z12.d, z13.d}, {z2.d, z3.d} // 11000001, 11100010, 00011001, 10010000
+add za.d[w8, 0, vgx2], {z12.d, z13.d}, {z2.d, z3.d} // 11000001-11100010-00011001-10010000
// CHECK-INST: add za.d[w8, 0, vgx2], { z12.d, z13.d }, { z2.d, z3.d }
// CHECK-ENCODING: [0x90,0x19,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -900,7 +901,7 @@ add za.d[w8, 0], {z12.d - z13.d}, {z2.d - z3.d} // 11000001-11100010-000110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e21990 <unknown>
-add za.d[w10, 1, vgx2], {z0.d, z1.d}, {z26.d, z27.d} // 11000001, 11111010, 01011000, 00010001
+add za.d[w10, 1, vgx2], {z0.d, z1.d}, {z26.d, z27.d} // 11000001-11111010-01011000-00010001
// CHECK-INST: add za.d[w10, 1, vgx2], { z0.d, z1.d }, { z26.d, z27.d }
// CHECK-ENCODING: [0x11,0x58,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -912,7 +913,7 @@ add za.d[w10, 1], {z0.d - z1.d}, {z26.d - z27.d} // 11000001-11111010-01011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa5811 <unknown>
-add za.d[w8, 5, vgx2], {z22.d, z23.d}, {z30.d, z31.d} // 11000001, 11111110, 00011010, 11010101
+add za.d[w8, 5, vgx2], {z22.d, z23.d}, {z30.d, z31.d} // 11000001-11111110-00011010-11010101
// CHECK-INST: add za.d[w8, 5, vgx2], { z22.d, z23.d }, { z30.d, z31.d }
// CHECK-ENCODING: [0xd5,0x1a,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -924,7 +925,7 @@ add za.d[w8, 5], {z22.d - z23.d}, {z30.d - z31.d} // 11000001-11111110-0001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe1ad5 <unknown>
-add za.d[w11, 2, vgx2], {z8.d, z9.d}, {z0.d, z1.d} // 11000001, 11100000, 01111001, 00010010
+add za.d[w11, 2, vgx2], {z8.d, z9.d}, {z0.d, z1.d} // 11000001-11100000-01111001-00010010
// CHECK-INST: add za.d[w11, 2, vgx2], { z8.d, z9.d }, { z0.d, z1.d }
// CHECK-ENCODING: [0x12,0x79,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -936,7 +937,7 @@ add za.d[w11, 2], {z8.d - z9.d}, {z0.d - z1.d} // 11000001-11100000-0111100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e07912 <unknown>
-add za.d[w9, 7, vgx2], {z12.d, z13.d}, {z10.d, z11.d} // 11000001, 11101010, 00111001, 10010111
+add za.d[w9, 7, vgx2], {z12.d, z13.d}, {z10.d, z11.d} // 11000001-11101010-00111001-10010111
// CHECK-INST: add za.d[w9, 7, vgx2], { z12.d, z13.d }, { z10.d, z11.d }
// CHECK-ENCODING: [0x97,0x39,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
diff --git a/llvm/test/MC/AArch64/SME2/bfmlal.s b/llvm/test/MC/AArch64/SME2/bfmlal.s
index c4561dfaef910..08edb9d4a783f 100644
--- a/llvm/test/MC/AArch64/SME2/bfmlal.s
+++ b/llvm/test/MC/AArch64/SME2/bfmlal.s
@@ -158,436 +158,436 @@ bfmlal za.s[w9, 14:15], z12.h, z11.h[6] // 11000001-10001011-10111001-10010111
// CHECK-UNKNOWN: c18bb997 <unknown>
-bfmlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h // 11000001, 00100000, 00001000, 00010000
-// CHECK, INST: bfmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+bfmlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h // 11000001-00100000-00001000-00010000
+// CHECK-INST: bfmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x10,0x08,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200810 <unknown>
bfmlal za.s[w8, 0:1], {z0.h - z1.h}, z0.h // 11000001-00100000-00001000-00010000
-// CHECK, INST: bfmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+// CHECK-INST: bfmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x10,0x08,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200810 <unknown>
-bfmlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h // 11000001, 00100101, 01001001, 01010001
-// CHECK, INST: bfmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
+bfmlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h // 11000001-00100101-01001001-01010001
+// CHECK-INST: bfmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x51,0x49,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254951 <unknown>
bfmlal za.s[w10, 2:3], {z10.h - z11.h}, z5.h // 11000001-00100101-01001001-01010001
-// CHECK, INST: bfmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
+// CHECK-INST: bfmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x51,0x49,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254951 <unknown>
-bfmlal za.s[w11, 6:7, vgx2], {z13.h, z14.h}, z8.h // 11000001, 00101000, 01101001, 10110011
-// CHECK, INST: bfmlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
+bfmlal za.s[w11, 6:7, vgx2], {z13.h, z14.h}, z8.h // 11000001-00101000-01101001-10110011
+// CHECK-INST: bfmlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xb3,0x69,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12869b3 <unknown>
bfmlal za.s[w11, 6:7], {z13.h - z14.h}, z8.h // 11000001-00101000-01101001-10110011
-// CHECK, INST: bfmlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
+// CHECK-INST: bfmlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xb3,0x69,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12869b3 <unknown>
-bfmlal za.s[w11, 6:7, vgx2], {z31.h, z0.h}, z15.h // 11000001, 00101111, 01101011, 11110011
-// CHECK, INST: bfmlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
+bfmlal za.s[w11, 6:7, vgx2], {z31.h, z0.h}, z15.h // 11000001-00101111-01101011-11110011
+// CHECK-INST: bfmlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xf3,0x6b,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f6bf3 <unknown>
bfmlal za.s[w11, 6:7], {z31.h - z0.h}, z15.h // 11000001-00101111-01101011-11110011
-// CHECK, INST: bfmlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
+// CHECK-INST: bfmlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xf3,0x6b,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f6bf3 <unknown>
-bfmlal za.s[w8, 2:3, vgx2], {z17.h, z18.h}, z0.h // 11000001, 00100000, 00001010, 00110001
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
+bfmlal za.s[w8, 2:3, vgx2], {z17.h, z18.h}, z0.h // 11000001-00100000-00001010-00110001
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x31,0x0a,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200a31 <unknown>
bfmlal za.s[w8, 2:3], {z17.h - z18.h}, z0.h // 11000001-00100000-00001010-00110001
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x31,0x0a,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200a31 <unknown>
-bfmlal za.s[w8, 2:3, vgx2], {z1.h, z2.h}, z14.h // 11000001, 00101110, 00001000, 00110001
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
+bfmlal za.s[w8, 2:3, vgx2], {z1.h, z2.h}, z14.h // 11000001-00101110-00001000-00110001
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x31,0x08,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0831 <unknown>
bfmlal za.s[w8, 2:3], {z1.h - z2.h}, z14.h // 11000001-00101110-00001000-00110001
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x31,0x08,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0831 <unknown>
-bfmlal za.s[w10, 0:1, vgx2], {z19.h, z20.h}, z4.h // 11000001, 00100100, 01001010, 01110000
-// CHECK, INST: bfmlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
+bfmlal za.s[w10, 0:1, vgx2], {z19.h, z20.h}, z4.h // 11000001-00100100-01001010-01110000
+// CHECK-INST: bfmlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x70,0x4a,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244a70 <unknown>
bfmlal za.s[w10, 0:1], {z19.h - z20.h}, z4.h // 11000001-00100100-01001010-01110000
-// CHECK, INST: bfmlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
+// CHECK-INST: bfmlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x70,0x4a,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244a70 <unknown>
-bfmlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h // 11000001, 00100010, 00001001, 10010000
-// CHECK, INST: bfmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
+bfmlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h // 11000001-00100010-00001001-10010000
+// CHECK-INST: bfmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x90,0x09,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220990 <unknown>
bfmlal za.s[w8, 0:1], {z12.h - z13.h}, z2.h // 11000001-00100010-00001001-10010000
-// CHECK, INST: bfmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
+// CHECK-INST: bfmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x90,0x09,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220990 <unknown>
-bfmlal za.s[w10, 2:3, vgx2], {z1.h, z2.h}, z10.h // 11000001, 00101010, 01001000, 00110001
-// CHECK, INST: bfmlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
+bfmlal za.s[w10, 2:3, vgx2], {z1.h, z2.h}, z10.h // 11000001-00101010-01001000-00110001
+// CHECK-INST: bfmlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x31,0x48,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4831 <unknown>
bfmlal za.s[w10, 2:3], {z1.h - z2.h}, z10.h // 11000001-00101010-01001000-00110001
-// CHECK, INST: bfmlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
+// CHECK-INST: bfmlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x31,0x48,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4831 <unknown>
-bfmlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h // 11000001, 00101110, 00001010, 11010001
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
+bfmlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h // 11000001-00101110-00001010-11010001
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xd1,0x0a,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0ad1 <unknown>
bfmlal za.s[w8, 2:3], {z22.h - z23.h}, z14.h // 11000001-00101110-00001010-11010001
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xd1,0x0a,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0ad1 <unknown>
-bfmlal za.s[w11, 4:5, vgx2], {z9.h, z10.h}, z1.h // 11000001, 00100001, 01101001, 00110010
-// CHECK, INST: bfmlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
+bfmlal za.s[w11, 4:5, vgx2], {z9.h, z10.h}, z1.h // 11000001-00100001-01101001-00110010
+// CHECK-INST: bfmlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x32,0x69,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1216932 <unknown>
bfmlal za.s[w11, 4:5], {z9.h - z10.h}, z1.h // 11000001-00100001-01101001-00110010
-// CHECK, INST: bfmlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
+// CHECK-INST: bfmlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x32,0x69,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1216932 <unknown>
-bfmlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h // 11000001, 00101011, 00101001, 10010011
-// CHECK, INST: bfmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
+bfmlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h // 11000001-00101011-00101001-10010011
+// CHECK-INST: bfmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x93,0x29,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b2993 <unknown>
bfmlal za.s[w9, 6:7], {z12.h - z13.h}, z11.h // 11000001-00101011-00101001-10010011
-// CHECK, INST: bfmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
+// CHECK-INST: bfmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x93,0x29,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b2993 <unknown>
-bfmlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001, 10010000, 00010000, 00010000
-// CHECK, INST: bfmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
+bfmlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001-10010000-00010000-00010000
+// CHECK-INST: bfmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x10,0x10,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1901010 <unknown>
bfmlal za.s[w8, 0:1], {z0.h - z1.h}, z0.h[0] // 11000001-10010000-00010000-00010000
-// CHECK, INST: bfmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
+// CHECK-INST: bfmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x10,0x10,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1901010 <unknown>
-bfmlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h[3] // 11000001, 10010101, 01010101, 01010101
-// CHECK, INST: bfmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
+bfmlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h[3] // 11000001-10010101-01010101-01010101
+// CHECK-INST: bfmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
// CHECK-ENCODING: [0x55,0x55,0x95,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1955555 <unknown>
bfmlal za.s[w10, 2:3], {z10.h - z11.h}, z5.h[3] // 11000001-10010101-01010101-01010101
-// CHECK, INST: bfmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
+// CHECK-INST: bfmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
// CHECK-ENCODING: [0x55,0x55,0x95,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1955555 <unknown>
-bfmlal za.s[w11, 6:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001, 10011000, 01111101, 10010111
-// CHECK, INST: bfmlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
+bfmlal za.s[w11, 6:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001-10011000-01111101-10010111
+// CHECK-INST: bfmlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x97,0x7d,0x98,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1987d97 <unknown>
bfmlal za.s[w11, 6:7], {z12.h - z13.h}, z8.h[7] // 11000001-10011000-01111101-10010111
-// CHECK, INST: bfmlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
+// CHECK-INST: bfmlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x97,0x7d,0x98,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1987d97 <unknown>
-bfmlal za.s[w11, 6:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001, 10011111, 01111111, 11010111
-// CHECK, INST: bfmlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
+bfmlal za.s[w11, 6:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001-10011111-01111111-11010111
+// CHECK-INST: bfmlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xd7,0x7f,0x9f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19f7fd7 <unknown>
bfmlal za.s[w11, 6:7], {z30.h - z31.h}, z15.h[7] // 11000001-10011111-01111111-11010111
-// CHECK, INST: bfmlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
+// CHECK-INST: bfmlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xd7,0x7f,0x9f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19f7fd7 <unknown>
-bfmlal za.s[w8, 2:3, vgx2], {z16.h, z17.h}, z0.h[7] // 11000001, 10010000, 00011110, 00010101
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
+bfmlal za.s[w8, 2:3, vgx2], {z16.h, z17.h}, z0.h[7] // 11000001-10010000-00011110-00010101
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
// CHECK-ENCODING: [0x15,0x1e,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1901e15 <unknown>
bfmlal za.s[w8, 2:3], {z16.h - z17.h}, z0.h[7] // 11000001-10010000-00011110-00010101
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
// CHECK-ENCODING: [0x15,0x1e,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1901e15 <unknown>
-bfmlal za.s[w8, 2:3, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001, 10011110, 00010100, 00010001
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
+bfmlal za.s[w8, 2:3, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001-10011110-00010100-00010001
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x11,0x14,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e1411 <unknown>
bfmlal za.s[w8, 2:3], {z0.h - z1.h}, z14.h[2] // 11000001-10011110-00010100-00010001
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x11,0x14,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e1411 <unknown>
-bfmlal za.s[w10, 0:1, vgx2], {z18.h, z19.h}, z4.h[2] // 11000001, 10010100, 01010110, 01010000
-// CHECK, INST: bfmlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
+bfmlal za.s[w10, 0:1, vgx2], {z18.h, z19.h}, z4.h[2] // 11000001-10010100-01010110-01010000
+// CHECK-INST: bfmlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
// CHECK-ENCODING: [0x50,0x56,0x94,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1945650 <unknown>
bfmlal za.s[w10, 0:1], {z18.h - z19.h}, z4.h[2] // 11000001-10010100-01010110-01010000
-// CHECK, INST: bfmlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
+// CHECK-INST: bfmlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
// CHECK-ENCODING: [0x50,0x56,0x94,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1945650 <unknown>
-bfmlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001, 10010010, 00011001, 10010000
-// CHECK, INST: bfmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
+bfmlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001-10010010-00011001-10010000
+// CHECK-INST: bfmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0x90,0x19,0x92,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1921990 <unknown>
bfmlal za.s[w8, 0:1], {z12.h - z13.h}, z2.h[4] // 11000001-10010010-00011001-10010000
-// CHECK, INST: bfmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
+// CHECK-INST: bfmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0x90,0x19,0x92,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1921990 <unknown>
-bfmlal za.s[w10, 2:3, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001, 10011010, 01011000, 00010001
-// CHECK, INST: bfmlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
+bfmlal za.s[w10, 2:3, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001-10011010-01011000-00010001
+// CHECK-INST: bfmlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x11,0x58,0x9a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19a5811 <unknown>
bfmlal za.s[w10, 2:3], {z0.h - z1.h}, z10.h[4] // 11000001-10011010-01011000-00010001
-// CHECK, INST: bfmlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
+// CHECK-INST: bfmlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x11,0x58,0x9a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19a5811 <unknown>
-bfmlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001, 10011110, 00011010, 11010101
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
+bfmlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001-10011110-00011010-11010101
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xd5,0x1a,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e1ad5 <unknown>
bfmlal za.s[w8, 2:3], {z22.h - z23.h}, z14.h[5] // 11000001-10011110-00011010-11010101
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xd5,0x1a,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e1ad5 <unknown>
-bfmlal za.s[w11, 4:5, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001, 10010001, 01110101, 00010010
-// CHECK, INST: bfmlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
+bfmlal za.s[w11, 4:5, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001-10010001-01110101-00010010
+// CHECK-INST: bfmlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x12,0x75,0x91,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1917512 <unknown>
bfmlal za.s[w11, 4:5], {z8.h - z9.h}, z1.h[2] // 11000001-10010001-01110101-00010010
-// CHECK, INST: bfmlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
+// CHECK-INST: bfmlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x12,0x75,0x91,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1917512 <unknown>
-bfmlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h[5] // 11000001, 10011011, 00111001, 10010111
-// CHECK, INST: bfmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
+bfmlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h[5] // 11000001-10011011-00111001-10010111
+// CHECK-INST: bfmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
// CHECK-ENCODING: [0x97,0x39,0x9b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19b3997 <unknown>
bfmlal za.s[w9, 6:7], {z12.h - z13.h}, z11.h[5] // 11000001-10011011-00111001-10010111
-// CHECK, INST: bfmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
+// CHECK-INST: bfmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
// CHECK-ENCODING: [0x97,0x39,0x9b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19b3997 <unknown>
-bfmlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001, 10100000, 00001000, 00010000
-// CHECK, INST: bfmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+bfmlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001-10100000-00001000-00010000
+// CHECK-INST: bfmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x10,0x08,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00810 <unknown>
bfmlal za.s[w8, 0:1], {z0.h - z1.h}, {z0.h - z1.h} // 11000001-10100000-00001000-00010000
-// CHECK, INST: bfmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+// CHECK-INST: bfmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x10,0x08,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00810 <unknown>
-bfmlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001, 10110100, 01001001, 01010001
-// CHECK, INST: bfmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+bfmlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001-10110100-01001001-01010001
+// CHECK-INST: bfmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x51,0x49,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44951 <unknown>
bfmlal za.s[w10, 2:3], {z10.h - z11.h}, {z20.h - z21.h} // 11000001-10110100-01001001-01010001
-// CHECK, INST: bfmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+// CHECK-INST: bfmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x51,0x49,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44951 <unknown>
-bfmlal za.s[w11, 6:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001, 10101000, 01101001, 10010011
-// CHECK, INST: bfmlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+bfmlal za.s[w11, 6:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001-10101000-01101001-10010011
+// CHECK-INST: bfmlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x93,0x69,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a86993 <unknown>
bfmlal za.s[w11, 6:7], {z12.h - z13.h}, {z8.h - z9.h} // 11000001-10101000-01101001-10010011
-// CHECK, INST: bfmlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+// CHECK-INST: bfmlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x93,0x69,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a86993 <unknown>
-bfmlal za.s[w11, 6:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001, 10111110, 01101011, 11010011
-// CHECK, INST: bfmlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+bfmlal za.s[w11, 6:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001-10111110-01101011-11010011
+// CHECK-INST: bfmlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd3,0x6b,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be6bd3 <unknown>
bfmlal za.s[w11, 6:7], {z30.h - z31.h}, {z30.h - z31.h} // 11000001-10111110-01101011-11010011
-// CHECK, INST: bfmlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+// CHECK-INST: bfmlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd3,0x6b,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be6bd3 <unknown>
-bfmlal za.s[w8, 2:3, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001, 10110000, 00001010, 00010001
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+bfmlal za.s[w8, 2:3, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001-10110000-00001010-00010001
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x11,0x0a,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00a11 <unknown>
bfmlal za.s[w8, 2:3], {z16.h - z17.h}, {z16.h - z17.h} // 11000001-10110000-00001010-00010001
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x11,0x0a,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00a11 <unknown>
-bfmlal za.s[w8, 2:3, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001, 10111110, 00001000, 00010001
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+bfmlal za.s[w8, 2:3, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001-10111110-00001000-00010001
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x11,0x08,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0811 <unknown>
bfmlal za.s[w8, 2:3], {z0.h - z1.h}, {z30.h - z31.h} // 11000001-10111110-00001000-00010001
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x11,0x08,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0811 <unknown>
-bfmlal za.s[w10, 0:1, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001, 10110100, 01001010, 01010000
-// CHECK, INST: bfmlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+bfmlal za.s[w10, 0:1, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001-10110100-01001010-01010000
+// CHECK-INST: bfmlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x50,0x4a,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44a50 <unknown>
bfmlal za.s[w10, 0:1], {z18.h - z19.h}, {z20.h - z21.h} // 11000001-10110100-01001010-01010000
-// CHECK, INST: bfmlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+// CHECK-INST: bfmlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x50,0x4a,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44a50 <unknown>
-bfmlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001, 10100010, 00001001, 10010000
-// CHECK, INST: bfmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+bfmlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001-10100010-00001001-10010000
+// CHECK-INST: bfmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x90,0x09,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20990 <unknown>
bfmlal za.s[w8, 0:1], {z12.h - z13.h}, {z2.h - z3.h} // 11000001-10100010-00001001-10010000
-// CHECK, INST: bfmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+// CHECK-INST: bfmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x90,0x09,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20990 <unknown>
-bfmlal za.s[w10, 2:3, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001, 10111010, 01001000, 00010001
-// CHECK, INST: bfmlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+bfmlal za.s[w10, 2:3, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001-10111010-01001000-00010001
+// CHECK-INST: bfmlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x11,0x48,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4811 <unknown>
bfmlal za.s[w10, 2:3], {z0.h - z1.h}, {z26.h - z27.h} // 11000001-10111010-01001000-00010001
-// CHECK, INST: bfmlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+// CHECK-INST: bfmlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x11,0x48,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4811 <unknown>
-bfmlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001, 10111110, 00001010, 11010001
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+bfmlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001-10111110-00001010-11010001
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd1,0x0a,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0ad1 <unknown>
bfmlal za.s[w8, 2:3], {z22.h - z23.h}, {z30.h - z31.h} // 11000001-10111110-00001010-11010001
-// CHECK, INST: bfmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+// CHECK-INST: bfmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd1,0x0a,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0ad1 <unknown>
-bfmlal za.s[w11, 4:5, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001, 10100000, 01101001, 00010010
-// CHECK, INST: bfmlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+bfmlal za.s[w11, 4:5, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001-10100000-01101001-00010010
+// CHECK-INST: bfmlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x12,0x69,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a06912 <unknown>
bfmlal za.s[w11, 4:5], {z8.h - z9.h}, {z0.h - z1.h} // 11000001-10100000-01101001-00010010
-// CHECK, INST: bfmlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+// CHECK-INST: bfmlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x12,0x69,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a06912 <unknown>
-bfmlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001, 10101010, 00101001, 10010011
-// CHECK, INST: bfmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+bfmlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001-10101010-00101001-10010011
+// CHECK-INST: bfmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x93,0x29,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa2993 <unknown>
bfmlal za.s[w9, 6:7], {z12.h - z13.h}, {z10.h - z11.h} // 11000001-10101010-00101001-10010011
-// CHECK, INST: bfmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+// CHECK-INST: bfmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x93,0x29,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa2993 <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/bfmlsl.s b/llvm/test/MC/AArch64/SME2/bfmlsl.s
index 8d2edcfaa9252..bb2adcc530040 100644
--- a/llvm/test/MC/AArch64/SME2/bfmlsl.s
+++ b/llvm/test/MC/AArch64/SME2/bfmlsl.s
@@ -158,436 +158,436 @@ bfmlsl za.s[w9, 14:15], z12.h, z11.h[6] // 11000001-10001011-10111001-10011111
// CHECK-UNKNOWN: c18bb99f <unknown>
-bfmlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h // 11000001, 00100000, 00001000, 00011000
-// CHECK, INST: bfmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+bfmlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h // 11000001-00100000-00001000-00011000
+// CHECK-INST: bfmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x18,0x08,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200818 <unknown>
bfmlsl za.s[w8, 0:1], {z0.h - z1.h}, z0.h // 11000001-00100000-00001000-00011000
-// CHECK, INST: bfmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+// CHECK-INST: bfmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x18,0x08,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200818 <unknown>
-bfmlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h // 11000001, 00100101, 01001001, 01011001
-// CHECK, INST: bfmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
+bfmlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h // 11000001-00100101-01001001-01011001
+// CHECK-INST: bfmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x59,0x49,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254959 <unknown>
bfmlsl za.s[w10, 2:3], {z10.h - z11.h}, z5.h // 11000001-00100101-01001001-01011001
-// CHECK, INST: bfmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
+// CHECK-INST: bfmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x59,0x49,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254959 <unknown>
-bfmlsl za.s[w11, 6:7, vgx2], {z13.h, z14.h}, z8.h // 11000001, 00101000, 01101001, 10111011
-// CHECK, INST: bfmlsl za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
+bfmlsl za.s[w11, 6:7, vgx2], {z13.h, z14.h}, z8.h // 11000001-00101000-01101001-10111011
+// CHECK-INST: bfmlsl za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xbb,0x69,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12869bb <unknown>
bfmlsl za.s[w11, 6:7], {z13.h - z14.h}, z8.h // 11000001-00101000-01101001-10111011
-// CHECK, INST: bfmlsl za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
+// CHECK-INST: bfmlsl za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xbb,0x69,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12869bb <unknown>
-bfmlsl za.s[w11, 6:7, vgx2], {z31.h, z0.h}, z15.h // 11000001, 00101111, 01101011, 11111011
-// CHECK, INST: bfmlsl za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
+bfmlsl za.s[w11, 6:7, vgx2], {z31.h, z0.h}, z15.h // 11000001-00101111-01101011-11111011
+// CHECK-INST: bfmlsl za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xfb,0x6b,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f6bfb <unknown>
bfmlsl za.s[w11, 6:7], {z31.h - z0.h}, z15.h // 11000001-00101111-01101011-11111011
-// CHECK, INST: bfmlsl za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
+// CHECK-INST: bfmlsl za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xfb,0x6b,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f6bfb <unknown>
-bfmlsl za.s[w8, 2:3, vgx2], {z17.h, z18.h}, z0.h // 11000001, 00100000, 00001010, 00111001
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
+bfmlsl za.s[w8, 2:3, vgx2], {z17.h, z18.h}, z0.h // 11000001-00100000-00001010-00111001
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x39,0x0a,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200a39 <unknown>
bfmlsl za.s[w8, 2:3], {z17.h - z18.h}, z0.h // 11000001-00100000-00001010-00111001
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x39,0x0a,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200a39 <unknown>
-bfmlsl za.s[w8, 2:3, vgx2], {z1.h, z2.h}, z14.h // 11000001, 00101110, 00001000, 00111001
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
+bfmlsl za.s[w8, 2:3, vgx2], {z1.h, z2.h}, z14.h // 11000001-00101110-00001000-00111001
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x39,0x08,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0839 <unknown>
bfmlsl za.s[w8, 2:3], {z1.h - z2.h}, z14.h // 11000001-00101110-00001000-00111001
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x39,0x08,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0839 <unknown>
-bfmlsl za.s[w10, 0:1, vgx2], {z19.h, z20.h}, z4.h // 11000001, 00100100, 01001010, 01111000
-// CHECK, INST: bfmlsl za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
+bfmlsl za.s[w10, 0:1, vgx2], {z19.h, z20.h}, z4.h // 11000001-00100100-01001010-01111000
+// CHECK-INST: bfmlsl za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x78,0x4a,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244a78 <unknown>
bfmlsl za.s[w10, 0:1], {z19.h - z20.h}, z4.h // 11000001-00100100-01001010-01111000
-// CHECK, INST: bfmlsl za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
+// CHECK-INST: bfmlsl za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x78,0x4a,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244a78 <unknown>
-bfmlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h // 11000001, 00100010, 00001001, 10011000
-// CHECK, INST: bfmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
+bfmlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h // 11000001-00100010-00001001-10011000
+// CHECK-INST: bfmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x98,0x09,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220998 <unknown>
bfmlsl za.s[w8, 0:1], {z12.h - z13.h}, z2.h // 11000001-00100010-00001001-10011000
-// CHECK, INST: bfmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
+// CHECK-INST: bfmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x98,0x09,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220998 <unknown>
-bfmlsl za.s[w10, 2:3, vgx2], {z1.h, z2.h}, z10.h // 11000001, 00101010, 01001000, 00111001
-// CHECK, INST: bfmlsl za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
+bfmlsl za.s[w10, 2:3, vgx2], {z1.h, z2.h}, z10.h // 11000001-00101010-01001000-00111001
+// CHECK-INST: bfmlsl za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x39,0x48,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4839 <unknown>
bfmlsl za.s[w10, 2:3], {z1.h - z2.h}, z10.h // 11000001-00101010-01001000-00111001
-// CHECK, INST: bfmlsl za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
+// CHECK-INST: bfmlsl za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x39,0x48,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4839 <unknown>
-bfmlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h // 11000001, 00101110, 00001010, 11011001
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
+bfmlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h // 11000001-00101110-00001010-11011001
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xd9,0x0a,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0ad9 <unknown>
bfmlsl za.s[w8, 2:3], {z22.h - z23.h}, z14.h // 11000001-00101110-00001010-11011001
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xd9,0x0a,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0ad9 <unknown>
-bfmlsl za.s[w11, 4:5, vgx2], {z9.h, z10.h}, z1.h // 11000001, 00100001, 01101001, 00111010
-// CHECK, INST: bfmlsl za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
+bfmlsl za.s[w11, 4:5, vgx2], {z9.h, z10.h}, z1.h // 11000001-00100001-01101001-00111010
+// CHECK-INST: bfmlsl za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x3a,0x69,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c121693a <unknown>
bfmlsl za.s[w11, 4:5], {z9.h - z10.h}, z1.h // 11000001-00100001-01101001-00111010
-// CHECK, INST: bfmlsl za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
+// CHECK-INST: bfmlsl za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x3a,0x69,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c121693a <unknown>
-bfmlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h // 11000001, 00101011, 00101001, 10011011
-// CHECK, INST: bfmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
+bfmlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h // 11000001-00101011-00101001-10011011
+// CHECK-INST: bfmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x9b,0x29,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b299b <unknown>
bfmlsl za.s[w9, 6:7], {z12.h - z13.h}, z11.h // 11000001-00101011-00101001-10011011
-// CHECK, INST: bfmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
+// CHECK-INST: bfmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x9b,0x29,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b299b <unknown>
-bfmlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001, 10010000, 00010000, 00011000
-// CHECK, INST: bfmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
+bfmlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001-10010000-00010000-00011000
+// CHECK-INST: bfmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x18,0x10,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1901018 <unknown>
bfmlsl za.s[w8, 0:1], {z0.h - z1.h}, z0.h[0] // 11000001-10010000-00010000-00011000
-// CHECK, INST: bfmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
+// CHECK-INST: bfmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x18,0x10,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1901018 <unknown>
-bfmlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h[3] // 11000001, 10010101, 01010101, 01011101
-// CHECK, INST: bfmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
+bfmlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h[3] // 11000001-10010101-01010101-01011101
+// CHECK-INST: bfmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
// CHECK-ENCODING: [0x5d,0x55,0x95,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c195555d <unknown>
bfmlsl za.s[w10, 2:3], {z10.h - z11.h}, z5.h[3] // 11000001-10010101-01010101-01011101
-// CHECK, INST: bfmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
+// CHECK-INST: bfmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
// CHECK-ENCODING: [0x5d,0x55,0x95,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c195555d <unknown>
-bfmlsl za.s[w11, 6:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001, 10011000, 01111101, 10011111
-// CHECK, INST: bfmlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
+bfmlsl za.s[w11, 6:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001-10011000-01111101-10011111
+// CHECK-INST: bfmlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x9f,0x7d,0x98,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1987d9f <unknown>
bfmlsl za.s[w11, 6:7], {z12.h - z13.h}, z8.h[7] // 11000001-10011000-01111101-10011111
-// CHECK, INST: bfmlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
+// CHECK-INST: bfmlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x9f,0x7d,0x98,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1987d9f <unknown>
-bfmlsl za.s[w11, 6:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001, 10011111, 01111111, 11011111
-// CHECK, INST: bfmlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
+bfmlsl za.s[w11, 6:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001-10011111-01111111-11011111
+// CHECK-INST: bfmlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xdf,0x7f,0x9f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19f7fdf <unknown>
bfmlsl za.s[w11, 6:7], {z30.h - z31.h}, z15.h[7] // 11000001-10011111-01111111-11011111
-// CHECK, INST: bfmlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
+// CHECK-INST: bfmlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xdf,0x7f,0x9f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19f7fdf <unknown>
-bfmlsl za.s[w8, 2:3, vgx2], {z16.h, z17.h}, z0.h[7] // 11000001, 10010000, 00011110, 00011101
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
+bfmlsl za.s[w8, 2:3, vgx2], {z16.h, z17.h}, z0.h[7] // 11000001-10010000-00011110-00011101
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
// CHECK-ENCODING: [0x1d,0x1e,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1901e1d <unknown>
bfmlsl za.s[w8, 2:3], {z16.h - z17.h}, z0.h[7] // 11000001-10010000-00011110-00011101
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
// CHECK-ENCODING: [0x1d,0x1e,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1901e1d <unknown>
-bfmlsl za.s[w8, 2:3, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001, 10011110, 00010100, 00011001
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
+bfmlsl za.s[w8, 2:3, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001-10011110-00010100-00011001
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x19,0x14,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e1419 <unknown>
bfmlsl za.s[w8, 2:3], {z0.h - z1.h}, z14.h[2] // 11000001-10011110-00010100-00011001
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x19,0x14,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e1419 <unknown>
-bfmlsl za.s[w10, 0:1, vgx2], {z18.h, z19.h}, z4.h[2] // 11000001, 10010100, 01010110, 01011000
-// CHECK, INST: bfmlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
+bfmlsl za.s[w10, 0:1, vgx2], {z18.h, z19.h}, z4.h[2] // 11000001-10010100-01010110-01011000
+// CHECK-INST: bfmlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
// CHECK-ENCODING: [0x58,0x56,0x94,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1945658 <unknown>
bfmlsl za.s[w10, 0:1], {z18.h - z19.h}, z4.h[2] // 11000001-10010100-01010110-01011000
-// CHECK, INST: bfmlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
+// CHECK-INST: bfmlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
// CHECK-ENCODING: [0x58,0x56,0x94,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1945658 <unknown>
-bfmlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001, 10010010, 00011001, 10011000
-// CHECK, INST: bfmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
+bfmlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001-10010010-00011001-10011000
+// CHECK-INST: bfmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0x98,0x19,0x92,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1921998 <unknown>
bfmlsl za.s[w8, 0:1], {z12.h - z13.h}, z2.h[4] // 11000001-10010010-00011001-10011000
-// CHECK, INST: bfmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
+// CHECK-INST: bfmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0x98,0x19,0x92,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1921998 <unknown>
-bfmlsl za.s[w10, 2:3, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001, 10011010, 01011000, 00011001
-// CHECK, INST: bfmlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
+bfmlsl za.s[w10, 2:3, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001-10011010-01011000-00011001
+// CHECK-INST: bfmlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x19,0x58,0x9a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19a5819 <unknown>
bfmlsl za.s[w10, 2:3], {z0.h - z1.h}, z10.h[4] // 11000001-10011010-01011000-00011001
-// CHECK, INST: bfmlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
+// CHECK-INST: bfmlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x19,0x58,0x9a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19a5819 <unknown>
-bfmlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001, 10011110, 00011010, 11011101
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
+bfmlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001-10011110-00011010-11011101
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xdd,0x1a,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e1add <unknown>
bfmlsl za.s[w8, 2:3], {z22.h - z23.h}, z14.h[5] // 11000001-10011110-00011010-11011101
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xdd,0x1a,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e1add <unknown>
-bfmlsl za.s[w11, 4:5, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001, 10010001, 01110101, 00011010
-// CHECK, INST: bfmlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
+bfmlsl za.s[w11, 4:5, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001-10010001-01110101-00011010
+// CHECK-INST: bfmlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x1a,0x75,0x91,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c191751a <unknown>
bfmlsl za.s[w11, 4:5], {z8.h - z9.h}, z1.h[2] // 11000001-10010001-01110101-00011010
-// CHECK, INST: bfmlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
+// CHECK-INST: bfmlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x1a,0x75,0x91,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c191751a <unknown>
-bfmlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h[5] // 11000001, 10011011, 00111001, 10011111
-// CHECK, INST: bfmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
+bfmlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h[5] // 11000001-10011011-00111001-10011111
+// CHECK-INST: bfmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
// CHECK-ENCODING: [0x9f,0x39,0x9b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19b399f <unknown>
bfmlsl za.s[w9, 6:7], {z12.h - z13.h}, z11.h[5] // 11000001-10011011-00111001-10011111
-// CHECK, INST: bfmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
+// CHECK-INST: bfmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
// CHECK-ENCODING: [0x9f,0x39,0x9b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19b399f <unknown>
-bfmlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001, 10100000, 00001000, 00011000
-// CHECK, INST: bfmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+bfmlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001-10100000-00001000-00011000
+// CHECK-INST: bfmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x18,0x08,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00818 <unknown>
bfmlsl za.s[w8, 0:1], {z0.h - z1.h}, {z0.h - z1.h} // 11000001-10100000-00001000-00011000
-// CHECK, INST: bfmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+// CHECK-INST: bfmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x18,0x08,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00818 <unknown>
-bfmlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001, 10110100, 01001001, 01011001
-// CHECK, INST: bfmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+bfmlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001-10110100-01001001-01011001
+// CHECK-INST: bfmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x59,0x49,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44959 <unknown>
bfmlsl za.s[w10, 2:3], {z10.h - z11.h}, {z20.h - z21.h} // 11000001-10110100-01001001-01011001
-// CHECK, INST: bfmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+// CHECK-INST: bfmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x59,0x49,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44959 <unknown>
-bfmlsl za.s[w11, 6:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001, 10101000, 01101001, 10011011
-// CHECK, INST: bfmlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+bfmlsl za.s[w11, 6:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001-10101000-01101001-10011011
+// CHECK-INST: bfmlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x9b,0x69,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a8699b <unknown>
bfmlsl za.s[w11, 6:7], {z12.h - z13.h}, {z8.h - z9.h} // 11000001-10101000-01101001-10011011
-// CHECK, INST: bfmlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+// CHECK-INST: bfmlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x9b,0x69,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a8699b <unknown>
-bfmlsl za.s[w11, 6:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001, 10111110, 01101011, 11011011
-// CHECK, INST: bfmlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+bfmlsl za.s[w11, 6:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001-10111110-01101011-11011011
+// CHECK-INST: bfmlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xdb,0x6b,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be6bdb <unknown>
bfmlsl za.s[w11, 6:7], {z30.h - z31.h}, {z30.h - z31.h} // 11000001-10111110-01101011-11011011
-// CHECK, INST: bfmlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+// CHECK-INST: bfmlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xdb,0x6b,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be6bdb <unknown>
-bfmlsl za.s[w8, 2:3, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001, 10110000, 00001010, 00011001
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+bfmlsl za.s[w8, 2:3, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001-10110000-00001010-00011001
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x19,0x0a,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00a19 <unknown>
bfmlsl za.s[w8, 2:3], {z16.h - z17.h}, {z16.h - z17.h} // 11000001-10110000-00001010-00011001
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x19,0x0a,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00a19 <unknown>
-bfmlsl za.s[w8, 2:3, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001, 10111110, 00001000, 00011001
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+bfmlsl za.s[w8, 2:3, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001-10111110-00001000-00011001
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x19,0x08,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0819 <unknown>
bfmlsl za.s[w8, 2:3], {z0.h - z1.h}, {z30.h - z31.h} // 11000001-10111110-00001000-00011001
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x19,0x08,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0819 <unknown>
-bfmlsl za.s[w10, 0:1, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001, 10110100, 01001010, 01011000
-// CHECK, INST: bfmlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+bfmlsl za.s[w10, 0:1, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001-10110100-01001010-01011000
+// CHECK-INST: bfmlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x58,0x4a,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44a58 <unknown>
bfmlsl za.s[w10, 0:1], {z18.h - z19.h}, {z20.h - z21.h} // 11000001-10110100-01001010-01011000
-// CHECK, INST: bfmlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+// CHECK-INST: bfmlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x58,0x4a,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44a58 <unknown>
-bfmlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001, 10100010, 00001001, 10011000
-// CHECK, INST: bfmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+bfmlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001-10100010-00001001-10011000
+// CHECK-INST: bfmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x98,0x09,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20998 <unknown>
bfmlsl za.s[w8, 0:1], {z12.h - z13.h}, {z2.h - z3.h} // 11000001-10100010-00001001-10011000
-// CHECK, INST: bfmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+// CHECK-INST: bfmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x98,0x09,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20998 <unknown>
-bfmlsl za.s[w10, 2:3, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001, 10111010, 01001000, 00011001
-// CHECK, INST: bfmlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+bfmlsl za.s[w10, 2:3, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001-10111010-01001000-00011001
+// CHECK-INST: bfmlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x19,0x48,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4819 <unknown>
bfmlsl za.s[w10, 2:3], {z0.h - z1.h}, {z26.h - z27.h} // 11000001-10111010-01001000-00011001
-// CHECK, INST: bfmlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+// CHECK-INST: bfmlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x19,0x48,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4819 <unknown>
-bfmlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001, 10111110, 00001010, 11011001
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+bfmlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001-10111110-00001010-11011001
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd9,0x0a,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0ad9 <unknown>
bfmlsl za.s[w8, 2:3], {z22.h - z23.h}, {z30.h - z31.h} // 11000001-10111110-00001010-11011001
-// CHECK, INST: bfmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+// CHECK-INST: bfmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd9,0x0a,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0ad9 <unknown>
-bfmlsl za.s[w11, 4:5, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001, 10100000, 01101001, 00011010
-// CHECK, INST: bfmlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+bfmlsl za.s[w11, 4:5, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001-10100000-01101001-00011010
+// CHECK-INST: bfmlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x1a,0x69,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a0691a <unknown>
bfmlsl za.s[w11, 4:5], {z8.h - z9.h}, {z0.h - z1.h} // 11000001-10100000-01101001-00011010
-// CHECK, INST: bfmlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+// CHECK-INST: bfmlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x1a,0x69,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a0691a <unknown>
-bfmlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001, 10101010, 00101001, 10011011
-// CHECK, INST: bfmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+bfmlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001-10101010-00101001-10011011
+// CHECK-INST: bfmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x9b,0x29,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa299b <unknown>
bfmlsl za.s[w9, 6:7], {z12.h - z13.h}, {z10.h - z11.h} // 11000001-10101010-00101001-10011011
-// CHECK, INST: bfmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+// CHECK-INST: bfmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x9b,0x29,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa299b <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/fmla.s b/llvm/test/MC/AArch64/SME2/fmla.s
index b7e35209edff8..2efc457feb145 100644
--- a/llvm/test/MC/AArch64/SME2/fmla.s
+++ b/llvm/test/MC/AArch64/SME2/fmla.s
@@ -12,7 +12,7 @@
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
-fmla za.d[w8, 0, vgx2], {z0.d, z1.d}, z0.d // 11000001, 01100000, 00011000, 00000000
+fmla za.d[w8, 0, vgx2], {z0.d, z1.d}, z0.d // 11000001-01100000-00011000-00000000
// CHECK-INST: fmla za.d[w8, 0, vgx2], { z0.d, z1.d }, z0.d
// CHECK-ENCODING: [0x00,0x18,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -24,7 +24,7 @@ fmla za.d[w8, 0], {z0.d - z1.d}, z0.d // 11000001-01100000-00011000-00000000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1601800 <unknown>
-fmla za.d[w10, 5, vgx2], {z10.d, z11.d}, z5.d // 11000001, 01100101, 01011001, 01000101
+fmla za.d[w10, 5, vgx2], {z10.d, z11.d}, z5.d // 11000001-01100101-01011001-01000101
// CHECK-INST: fmla za.d[w10, 5, vgx2], { z10.d, z11.d }, z5.d
// CHECK-ENCODING: [0x45,0x59,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -36,7 +36,7 @@ fmla za.d[w10, 5], {z10.d - z11.d}, z5.d // 11000001-01100101-01011001-01000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1655945 <unknown>
-fmla za.d[w11, 7, vgx2], {z13.d, z14.d}, z8.d // 11000001, 01101000, 01111001, 10100111
+fmla za.d[w11, 7, vgx2], {z13.d, z14.d}, z8.d // 11000001-01101000-01111001-10100111
// CHECK-INST: fmla za.d[w11, 7, vgx2], { z13.d, z14.d }, z8.d
// CHECK-ENCODING: [0xa7,0x79,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -48,7 +48,7 @@ fmla za.d[w11, 7], {z13.d - z14.d}, z8.d // 11000001-01101000-01111001-10100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16879a7 <unknown>
-fmla za.d[w11, 7, vgx2], {z31.d, z0.d}, z15.d // 11000001, 01101111, 01111011, 11100111
+fmla za.d[w11, 7, vgx2], {z31.d, z0.d}, z15.d // 11000001-01101111-01111011-11100111
// CHECK-INST: fmla za.d[w11, 7, vgx2], { z31.d, z0.d }, z15.d
// CHECK-ENCODING: [0xe7,0x7b,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -60,7 +60,7 @@ fmla za.d[w11, 7], {z31.d - z0.d}, z15.d // 11000001-01101111-01111011-11100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f7be7 <unknown>
-fmla za.d[w8, 5, vgx2], {z17.d, z18.d}, z0.d // 11000001, 01100000, 00011010, 00100101
+fmla za.d[w8, 5, vgx2], {z17.d, z18.d}, z0.d // 11000001-01100000-00011010-00100101
// CHECK-INST: fmla za.d[w8, 5, vgx2], { z17.d, z18.d }, z0.d
// CHECK-ENCODING: [0x25,0x1a,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -72,7 +72,7 @@ fmla za.d[w8, 5], {z17.d - z18.d}, z0.d // 11000001-01100000-00011010-001001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1601a25 <unknown>
-fmla za.d[w8, 1, vgx2], {z1.d, z2.d}, z14.d // 11000001, 01101110, 00011000, 00100001
+fmla za.d[w8, 1, vgx2], {z1.d, z2.d}, z14.d // 11000001-01101110-00011000-00100001
// CHECK-INST: fmla za.d[w8, 1, vgx2], { z1.d, z2.d }, z14.d
// CHECK-ENCODING: [0x21,0x18,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -84,7 +84,7 @@ fmla za.d[w8, 1], {z1.d - z2.d}, z14.d // 11000001-01101110-00011000-0010000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e1821 <unknown>
-fmla za.d[w10, 0, vgx2], {z19.d, z20.d}, z4.d // 11000001, 01100100, 01011010, 01100000
+fmla za.d[w10, 0, vgx2], {z19.d, z20.d}, z4.d // 11000001-01100100-01011010-01100000
// CHECK-INST: fmla za.d[w10, 0, vgx2], { z19.d, z20.d }, z4.d
// CHECK-ENCODING: [0x60,0x5a,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -96,7 +96,7 @@ fmla za.d[w10, 0], {z19.d - z20.d}, z4.d // 11000001-01100100-01011010-01100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1645a60 <unknown>
-fmla za.d[w8, 0, vgx2], {z12.d, z13.d}, z2.d // 11000001, 01100010, 00011001, 10000000
+fmla za.d[w8, 0, vgx2], {z12.d, z13.d}, z2.d // 11000001-01100010-00011001-10000000
// CHECK-INST: fmla za.d[w8, 0, vgx2], { z12.d, z13.d }, z2.d
// CHECK-ENCODING: [0x80,0x19,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -108,7 +108,7 @@ fmla za.d[w8, 0], {z12.d - z13.d}, z2.d // 11000001-01100010-00011001-100000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1621980 <unknown>
-fmla za.d[w10, 1, vgx2], {z1.d, z2.d}, z10.d // 11000001, 01101010, 01011000, 00100001
+fmla za.d[w10, 1, vgx2], {z1.d, z2.d}, z10.d // 11000001-01101010-01011000-00100001
// CHECK-INST: fmla za.d[w10, 1, vgx2], { z1.d, z2.d }, z10.d
// CHECK-ENCODING: [0x21,0x58,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -120,7 +120,7 @@ fmla za.d[w10, 1], {z1.d - z2.d}, z10.d // 11000001-01101010-01011000-001000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a5821 <unknown>
-fmla za.d[w8, 5, vgx2], {z22.d, z23.d}, z14.d // 11000001, 01101110, 00011010, 11000101
+fmla za.d[w8, 5, vgx2], {z22.d, z23.d}, z14.d // 11000001-01101110-00011010-11000101
// CHECK-INST: fmla za.d[w8, 5, vgx2], { z22.d, z23.d }, z14.d
// CHECK-ENCODING: [0xc5,0x1a,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -132,7 +132,7 @@ fmla za.d[w8, 5], {z22.d - z23.d}, z14.d // 11000001-01101110-00011010-11000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e1ac5 <unknown>
-fmla za.d[w11, 2, vgx2], {z9.d, z10.d}, z1.d // 11000001, 01100001, 01111001, 00100010
+fmla za.d[w11, 2, vgx2], {z9.d, z10.d}, z1.d // 11000001-01100001-01111001-00100010
// CHECK-INST: fmla za.d[w11, 2, vgx2], { z9.d, z10.d }, z1.d
// CHECK-ENCODING: [0x22,0x79,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -144,7 +144,7 @@ fmla za.d[w11, 2], {z9.d - z10.d}, z1.d // 11000001-01100001-01111001-001000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1617922 <unknown>
-fmla za.d[w9, 7, vgx2], {z12.d, z13.d}, z11.d // 11000001, 01101011, 00111001, 10000111
+fmla za.d[w9, 7, vgx2], {z12.d, z13.d}, z11.d // 11000001-01101011-00111001-10000111
// CHECK-INST: fmla za.d[w9, 7, vgx2], { z12.d, z13.d }, z11.d
// CHECK-ENCODING: [0x87,0x39,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -302,7 +302,7 @@ fmla za.d[w9, 7], {z12.d, z13.d}, z11.d[0] // 11000001-11011011-00100001-100
// CHECK-UNKNOWN: c1db2187 <unknown>
-fmla za.d[w8, 0, vgx2], {z0.d, z1.d}, {z0.d, z1.d} // 11000001, 11100000, 00011000, 00000000
+fmla za.d[w8, 0, vgx2], {z0.d, z1.d}, {z0.d, z1.d} // 11000001-11100000-00011000-00000000
// CHECK-INST: fmla za.d[w8, 0, vgx2], { z0.d, z1.d }, { z0.d, z1.d }
// CHECK-ENCODING: [0x00,0x18,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -314,7 +314,7 @@ fmla za.d[w8, 0], {z0.d - z1.d}, {z0.d - z1.d} // 11000001-11100000-00011000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e01800 <unknown>
-fmla za.d[w10, 5, vgx2], {z10.d, z11.d}, {z20.d, z21.d} // 11000001, 11110100, 01011001, 01000101
+fmla za.d[w10, 5, vgx2], {z10.d, z11.d}, {z20.d, z21.d} // 11000001-11110100-01011001-01000101
// CHECK-INST: fmla za.d[w10, 5, vgx2], { z10.d, z11.d }, { z20.d, z21.d }
// CHECK-ENCODING: [0x45,0x59,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -326,7 +326,7 @@ fmla za.d[w10, 5], {z10.d - z11.d}, {z20.d - z21.d} // 11000001-11110100-010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f45945 <unknown>
-fmla za.d[w11, 7, vgx2], {z12.d, z13.d}, {z8.d, z9.d} // 11000001, 11101000, 01111001, 10000111
+fmla za.d[w11, 7, vgx2], {z12.d, z13.d}, {z8.d, z9.d} // 11000001-11101000-01111001-10000111
// CHECK-INST: fmla za.d[w11, 7, vgx2], { z12.d, z13.d }, { z8.d, z9.d }
// CHECK-ENCODING: [0x87,0x79,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -338,7 +338,7 @@ fmla za.d[w11, 7], {z12.d - z13.d}, {z8.d - z9.d} // 11000001-11101000-01111
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e87987 <unknown>
-fmla za.d[w11, 7, vgx2], {z30.d, z31.d}, {z30.d, z31.d} // 11000001, 11111110, 01111011, 11000111
+fmla za.d[w11, 7, vgx2], {z30.d, z31.d}, {z30.d, z31.d} // 11000001-11111110-01111011-11000111
// CHECK-INST: fmla za.d[w11, 7, vgx2], { z30.d, z31.d }, { z30.d, z31.d }
// CHECK-ENCODING: [0xc7,0x7b,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -350,7 +350,7 @@ fmla za.d[w11, 7], {z30.d - z31.d}, {z30.d - z31.d} // 11000001-11111110-011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe7bc7 <unknown>
-fmla za.d[w8, 5, vgx2], {z16.d, z17.d}, {z16.d, z17.d} // 11000001, 11110000, 00011010, 00000101
+fmla za.d[w8, 5, vgx2], {z16.d, z17.d}, {z16.d, z17.d} // 11000001-11110000-00011010-00000101
// CHECK-INST: fmla za.d[w8, 5, vgx2], { z16.d, z17.d }, { z16.d, z17.d }
// CHECK-ENCODING: [0x05,0x1a,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -362,7 +362,7 @@ fmla za.d[w8, 5], {z16.d - z17.d}, {z16.d - z17.d} // 11000001-11110000-0001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f01a05 <unknown>
-fmla za.d[w8, 1, vgx2], {z0.d, z1.d}, {z30.d, z31.d} // 11000001, 11111110, 00011000, 00000001
+fmla za.d[w8, 1, vgx2], {z0.d, z1.d}, {z30.d, z31.d} // 11000001-11111110-00011000-00000001
// CHECK-INST: fmla za.d[w8, 1, vgx2], { z0.d, z1.d }, { z30.d, z31.d }
// CHECK-ENCODING: [0x01,0x18,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -374,7 +374,7 @@ fmla za.d[w8, 1], {z0.d - z1.d}, {z30.d - z31.d} // 11000001-11111110-000110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe1801 <unknown>
-fmla za.d[w10, 0, vgx2], {z18.d, z19.d}, {z20.d, z21.d} // 11000001, 11110100, 01011010, 01000000
+fmla za.d[w10, 0, vgx2], {z18.d, z19.d}, {z20.d, z21.d} // 11000001-11110100-01011010-01000000
// CHECK-INST: fmla za.d[w10, 0, vgx2], { z18.d, z19.d }, { z20.d, z21.d }
// CHECK-ENCODING: [0x40,0x5a,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -386,7 +386,7 @@ fmla za.d[w10, 0], {z18.d - z19.d}, {z20.d - z21.d} // 11000001-11110100-010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f45a40 <unknown>
-fmla za.d[w8, 0, vgx2], {z12.d, z13.d}, {z2.d, z3.d} // 11000001, 11100010, 00011001, 10000000
+fmla za.d[w8, 0, vgx2], {z12.d, z13.d}, {z2.d, z3.d} // 11000001-11100010-00011001-10000000
// CHECK-INST: fmla za.d[w8, 0, vgx2], { z12.d, z13.d }, { z2.d, z3.d }
// CHECK-ENCODING: [0x80,0x19,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -398,7 +398,7 @@ fmla za.d[w8, 0], {z12.d - z13.d}, {z2.d - z3.d} // 11000001-11100010-000110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e21980 <unknown>
-fmla za.d[w10, 1, vgx2], {z0.d, z1.d}, {z26.d, z27.d} // 11000001, 11111010, 01011000, 00000001
+fmla za.d[w10, 1, vgx2], {z0.d, z1.d}, {z26.d, z27.d} // 11000001-11111010-01011000-00000001
// CHECK-INST: fmla za.d[w10, 1, vgx2], { z0.d, z1.d }, { z26.d, z27.d }
// CHECK-ENCODING: [0x01,0x58,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -410,7 +410,7 @@ fmla za.d[w10, 1], {z0.d - z1.d}, {z26.d - z27.d} // 11000001-11111010-01011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa5801 <unknown>
-fmla za.d[w8, 5, vgx2], {z22.d, z23.d}, {z30.d, z31.d} // 11000001, 11111110, 00011010, 11000101
+fmla za.d[w8, 5, vgx2], {z22.d, z23.d}, {z30.d, z31.d} // 11000001-11111110-00011010-11000101
// CHECK-INST: fmla za.d[w8, 5, vgx2], { z22.d, z23.d }, { z30.d, z31.d }
// CHECK-ENCODING: [0xc5,0x1a,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -422,7 +422,7 @@ fmla za.d[w8, 5], {z22.d - z23.d}, {z30.d - z31.d} // 11000001-11111110-0001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe1ac5 <unknown>
-fmla za.d[w11, 2, vgx2], {z8.d, z9.d}, {z0.d, z1.d} // 11000001, 11100000, 01111001, 00000010
+fmla za.d[w11, 2, vgx2], {z8.d, z9.d}, {z0.d, z1.d} // 11000001-11100000-01111001-00000010
// CHECK-INST: fmla za.d[w11, 2, vgx2], { z8.d, z9.d }, { z0.d, z1.d }
// CHECK-ENCODING: [0x02,0x79,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -434,7 +434,7 @@ fmla za.d[w11, 2], {z8.d - z9.d}, {z0.d - z1.d} // 11000001-11100000-0111100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e07902 <unknown>
-fmla za.d[w9, 7, vgx2], {z12.d, z13.d}, {z10.d, z11.d} // 11000001, 11101010, 00111001, 10000111
+fmla za.d[w9, 7, vgx2], {z12.d, z13.d}, {z10.d, z11.d} // 11000001-11101010-00111001-10000111
// CHECK-INST: fmla za.d[w9, 7, vgx2], { z12.d, z13.d }, { z10.d, z11.d }
// CHECK-ENCODING: [0x87,0x39,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -447,7 +447,7 @@ fmla za.d[w9, 7], {z12.d - z13.d}, {z10.d - z11.d} // 11000001-11101010-0011
// CHECK-UNKNOWN: c1ea3987 <unknown>
-fmla za.s[w8, 0, vgx2], {z0.s, z1.s}, z0.s // 11000001, 00100000, 00011000, 00000000
+fmla za.s[w8, 0, vgx2], {z0.s, z1.s}, z0.s // 11000001-00100000-00011000-00000000
// CHECK-INST: fmla za.s[w8, 0, vgx2], { z0.s, z1.s }, z0.s
// CHECK-ENCODING: [0x00,0x18,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -459,7 +459,7 @@ fmla za.s[w8, 0], {z0.s - z1.s}, z0.s // 11000001-00100000-00011000-00000000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1201800 <unknown>
-fmla za.s[w10, 5, vgx2], {z10.s, z11.s}, z5.s // 11000001, 00100101, 01011001, 01000101
+fmla za.s[w10, 5, vgx2], {z10.s, z11.s}, z5.s // 11000001-00100101-01011001-01000101
// CHECK-INST: fmla za.s[w10, 5, vgx2], { z10.s, z11.s }, z5.s
// CHECK-ENCODING: [0x45,0x59,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -471,7 +471,7 @@ fmla za.s[w10, 5], {z10.s - z11.s}, z5.s // 11000001-00100101-01011001-01000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1255945 <unknown>
-fmla za.s[w11, 7, vgx2], {z13.s, z14.s}, z8.s // 11000001, 00101000, 01111001, 10100111
+fmla za.s[w11, 7, vgx2], {z13.s, z14.s}, z8.s // 11000001-00101000-01111001-10100111
// CHECK-INST: fmla za.s[w11, 7, vgx2], { z13.s, z14.s }, z8.s
// CHECK-ENCODING: [0xa7,0x79,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -483,7 +483,7 @@ fmla za.s[w11, 7], {z13.s - z14.s}, z8.s // 11000001-00101000-01111001-10100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12879a7 <unknown>
-fmla za.s[w11, 7, vgx2], {z31.s, z0.s}, z15.s // 11000001, 00101111, 01111011, 11100111
+fmla za.s[w11, 7, vgx2], {z31.s, z0.s}, z15.s // 11000001-00101111-01111011-11100111
// CHECK-INST: fmla za.s[w11, 7, vgx2], { z31.s, z0.s }, z15.s
// CHECK-ENCODING: [0xe7,0x7b,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -495,7 +495,7 @@ fmla za.s[w11, 7], {z31.s - z0.s}, z15.s // 11000001-00101111-01111011-11100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f7be7 <unknown>
-fmla za.s[w8, 5, vgx2], {z17.s, z18.s}, z0.s // 11000001, 00100000, 00011010, 00100101
+fmla za.s[w8, 5, vgx2], {z17.s, z18.s}, z0.s // 11000001-00100000-00011010-00100101
// CHECK-INST: fmla za.s[w8, 5, vgx2], { z17.s, z18.s }, z0.s
// CHECK-ENCODING: [0x25,0x1a,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -507,7 +507,7 @@ fmla za.s[w8, 5], {z17.s - z18.s}, z0.s // 11000001-00100000-00011010-001001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1201a25 <unknown>
-fmla za.s[w8, 1, vgx2], {z1.s, z2.s}, z14.s // 11000001, 00101110, 00011000, 00100001
+fmla za.s[w8, 1, vgx2], {z1.s, z2.s}, z14.s // 11000001-00101110-00011000-00100001
// CHECK-INST: fmla za.s[w8, 1, vgx2], { z1.s, z2.s }, z14.s
// CHECK-ENCODING: [0x21,0x18,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -519,7 +519,7 @@ fmla za.s[w8, 1], {z1.s - z2.s}, z14.s // 11000001-00101110-00011000-0010000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e1821 <unknown>
-fmla za.s[w10, 0, vgx2], {z19.s, z20.s}, z4.s // 11000001, 00100100, 01011010, 01100000
+fmla za.s[w10, 0, vgx2], {z19.s, z20.s}, z4.s // 11000001-00100100-01011010-01100000
// CHECK-INST: fmla za.s[w10, 0, vgx2], { z19.s, z20.s }, z4.s
// CHECK-ENCODING: [0x60,0x5a,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -531,7 +531,7 @@ fmla za.s[w10, 0], {z19.s - z20.s}, z4.s // 11000001-00100100-01011010-01100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1245a60 <unknown>
-fmla za.s[w8, 0, vgx2], {z12.s, z13.s}, z2.s // 11000001, 00100010, 00011001, 10000000
+fmla za.s[w8, 0, vgx2], {z12.s, z13.s}, z2.s // 11000001-00100010-00011001-10000000
// CHECK-INST: fmla za.s[w8, 0, vgx2], { z12.s, z13.s }, z2.s
// CHECK-ENCODING: [0x80,0x19,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -543,7 +543,7 @@ fmla za.s[w8, 0], {z12.s - z13.s}, z2.s // 11000001-00100010-00011001-100000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1221980 <unknown>
-fmla za.s[w10, 1, vgx2], {z1.s, z2.s}, z10.s // 11000001, 00101010, 01011000, 00100001
+fmla za.s[w10, 1, vgx2], {z1.s, z2.s}, z10.s // 11000001-00101010-01011000-00100001
// CHECK-INST: fmla za.s[w10, 1, vgx2], { z1.s, z2.s }, z10.s
// CHECK-ENCODING: [0x21,0x58,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -555,7 +555,7 @@ fmla za.s[w10, 1], {z1.s - z2.s}, z10.s // 11000001-00101010-01011000-001000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a5821 <unknown>
-fmla za.s[w8, 5, vgx2], {z22.s, z23.s}, z14.s // 11000001, 00101110, 00011010, 11000101
+fmla za.s[w8, 5, vgx2], {z22.s, z23.s}, z14.s // 11000001-00101110-00011010-11000101
// CHECK-INST: fmla za.s[w8, 5, vgx2], { z22.s, z23.s }, z14.s
// CHECK-ENCODING: [0xc5,0x1a,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -567,7 +567,7 @@ fmla za.s[w8, 5], {z22.s - z23.s}, z14.s // 11000001-00101110-00011010-11000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e1ac5 <unknown>
-fmla za.s[w11, 2, vgx2], {z9.s, z10.s}, z1.s // 11000001, 00100001, 01111001, 00100010
+fmla za.s[w11, 2, vgx2], {z9.s, z10.s}, z1.s // 11000001-00100001-01111001-00100010
// CHECK-INST: fmla za.s[w11, 2, vgx2], { z9.s, z10.s }, z1.s
// CHECK-ENCODING: [0x22,0x79,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -579,7 +579,7 @@ fmla za.s[w11, 2], {z9.s - z10.s}, z1.s // 11000001-00100001-01111001-001000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1217922 <unknown>
-fmla za.s[w9, 7, vgx2], {z12.s, z13.s}, z11.s // 11000001, 00101011, 00111001, 10000111
+fmla za.s[w9, 7, vgx2], {z12.s, z13.s}, z11.s // 11000001-00101011-00111001-10000111
// CHECK-INST: fmla za.s[w9, 7, vgx2], { z12.s, z13.s }, z11.s
// CHECK-ENCODING: [0x87,0x39,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -737,7 +737,7 @@ fmla za.s[w9, 7], {z12.s, z13.s}, z11.s[2] // 11000001-01011011-00101001-100
// CHECK-UNKNOWN: c15b2987 <unknown>
-fmla za.s[w8, 0, vgx2], {z0.s, z1.s}, {z0.s, z1.s} // 11000001, 10100000, 00011000, 00000000
+fmla za.s[w8, 0, vgx2], {z0.s, z1.s}, {z0.s, z1.s} // 11000001-10100000-00011000-00000000
// CHECK-INST: fmla za.s[w8, 0, vgx2], { z0.s, z1.s }, { z0.s, z1.s }
// CHECK-ENCODING: [0x00,0x18,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -749,7 +749,7 @@ fmla za.s[w8, 0], {z0.s - z1.s}, {z0.s - z1.s} // 11000001-10100000-00011000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a01800 <unknown>
-fmla za.s[w10, 5, vgx2], {z10.s, z11.s}, {z20.s, z21.s} // 11000001, 10110100, 01011001, 01000101
+fmla za.s[w10, 5, vgx2], {z10.s, z11.s}, {z20.s, z21.s} // 11000001-10110100-01011001-01000101
// CHECK-INST: fmla za.s[w10, 5, vgx2], { z10.s, z11.s }, { z20.s, z21.s }
// CHECK-ENCODING: [0x45,0x59,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -761,7 +761,7 @@ fmla za.s[w10, 5], {z10.s - z11.s}, {z20.s - z21.s} // 11000001-10110100-010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b45945 <unknown>
-fmla za.s[w11, 7, vgx2], {z12.s, z13.s}, {z8.s, z9.s} // 11000001, 10101000, 01111001, 10000111
+fmla za.s[w11, 7, vgx2], {z12.s, z13.s}, {z8.s, z9.s} // 11000001-10101000-01111001-10000111
// CHECK-INST: fmla za.s[w11, 7, vgx2], { z12.s, z13.s }, { z8.s, z9.s }
// CHECK-ENCODING: [0x87,0x79,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -773,7 +773,7 @@ fmla za.s[w11, 7], {z12.s - z13.s}, {z8.s - z9.s} // 11000001-10101000-01111
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a87987 <unknown>
-fmla za.s[w11, 7, vgx2], {z30.s, z31.s}, {z30.s, z31.s} // 11000001, 10111110, 01111011, 11000111
+fmla za.s[w11, 7, vgx2], {z30.s, z31.s}, {z30.s, z31.s} // 11000001-10111110-01111011-11000111
// CHECK-INST: fmla za.s[w11, 7, vgx2], { z30.s, z31.s }, { z30.s, z31.s }
// CHECK-ENCODING: [0xc7,0x7b,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -785,7 +785,7 @@ fmla za.s[w11, 7], {z30.s - z31.s}, {z30.s - z31.s} // 11000001-10111110-011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be7bc7 <unknown>
-fmla za.s[w8, 5, vgx2], {z16.s, z17.s}, {z16.s, z17.s} // 11000001, 10110000, 00011010, 00000101
+fmla za.s[w8, 5, vgx2], {z16.s, z17.s}, {z16.s, z17.s} // 11000001-10110000-00011010-00000101
// CHECK-INST: fmla za.s[w8, 5, vgx2], { z16.s, z17.s }, { z16.s, z17.s }
// CHECK-ENCODING: [0x05,0x1a,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -797,7 +797,7 @@ fmla za.s[w8, 5], {z16.s - z17.s}, {z16.s - z17.s} // 11000001-10110000-0001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b01a05 <unknown>
-fmla za.s[w8, 1, vgx2], {z0.s, z1.s}, {z30.s, z31.s} // 11000001, 10111110, 00011000, 00000001
+fmla za.s[w8, 1, vgx2], {z0.s, z1.s}, {z30.s, z31.s} // 11000001-10111110-00011000-00000001
// CHECK-INST: fmla za.s[w8, 1, vgx2], { z0.s, z1.s }, { z30.s, z31.s }
// CHECK-ENCODING: [0x01,0x18,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -809,7 +809,7 @@ fmla za.s[w8, 1], {z0.s - z1.s}, {z30.s - z31.s} // 11000001-10111110-000110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be1801 <unknown>
-fmla za.s[w10, 0, vgx2], {z18.s, z19.s}, {z20.s, z21.s} // 11000001, 10110100, 01011010, 01000000
+fmla za.s[w10, 0, vgx2], {z18.s, z19.s}, {z20.s, z21.s} // 11000001-10110100-01011010-01000000
// CHECK-INST: fmla za.s[w10, 0, vgx2], { z18.s, z19.s }, { z20.s, z21.s }
// CHECK-ENCODING: [0x40,0x5a,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -821,7 +821,7 @@ fmla za.s[w10, 0], {z18.s - z19.s}, {z20.s - z21.s} // 11000001-10110100-010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b45a40 <unknown>
-fmla za.s[w8, 0, vgx2], {z12.s, z13.s}, {z2.s, z3.s} // 11000001, 10100010, 00011001, 10000000
+fmla za.s[w8, 0, vgx2], {z12.s, z13.s}, {z2.s, z3.s} // 11000001-10100010-00011001-10000000
// CHECK-INST: fmla za.s[w8, 0, vgx2], { z12.s, z13.s }, { z2.s, z3.s }
// CHECK-ENCODING: [0x80,0x19,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -833,7 +833,7 @@ fmla za.s[w8, 0], {z12.s - z13.s}, {z2.s - z3.s} // 11000001-10100010-000110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a21980 <unknown>
-fmla za.s[w10, 1, vgx2], {z0.s, z1.s}, {z26.s, z27.s} // 11000001, 10111010, 01011000, 00000001
+fmla za.s[w10, 1, vgx2], {z0.s, z1.s}, {z26.s, z27.s} // 11000001-10111010-01011000-00000001
// CHECK-INST: fmla za.s[w10, 1, vgx2], { z0.s, z1.s }, { z26.s, z27.s }
// CHECK-ENCODING: [0x01,0x58,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -845,7 +845,7 @@ fmla za.s[w10, 1], {z0.s - z1.s}, {z26.s - z27.s} // 11000001-10111010-01011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba5801 <unknown>
-fmla za.s[w8, 5, vgx2], {z22.s, z23.s}, {z30.s, z31.s} // 11000001, 10111110, 00011010, 11000101
+fmla za.s[w8, 5, vgx2], {z22.s, z23.s}, {z30.s, z31.s} // 11000001-10111110-00011010-11000101
// CHECK-INST: fmla za.s[w8, 5, vgx2], { z22.s, z23.s }, { z30.s, z31.s }
// CHECK-ENCODING: [0xc5,0x1a,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -857,7 +857,7 @@ fmla za.s[w8, 5], {z22.s - z23.s}, {z30.s - z31.s} // 11000001-10111110-0001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be1ac5 <unknown>
-fmla za.s[w11, 2, vgx2], {z8.s, z9.s}, {z0.s, z1.s} // 11000001, 10100000, 01111001, 00000010
+fmla za.s[w11, 2, vgx2], {z8.s, z9.s}, {z0.s, z1.s} // 11000001-10100000-01111001-00000010
// CHECK-INST: fmla za.s[w11, 2, vgx2], { z8.s, z9.s }, { z0.s, z1.s }
// CHECK-ENCODING: [0x02,0x79,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -869,7 +869,7 @@ fmla za.s[w11, 2], {z8.s - z9.s}, {z0.s - z1.s} // 11000001-10100000-0111100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a07902 <unknown>
-fmla za.s[w9, 7, vgx2], {z12.s, z13.s}, {z10.s, z11.s} // 11000001, 10101010, 00111001, 10000111
+fmla za.s[w9, 7, vgx2], {z12.s, z13.s}, {z10.s, z11.s} // 11000001-10101010-00111001-10000111
// CHECK-INST: fmla za.s[w9, 7, vgx2], { z12.s, z13.s }, { z10.s, z11.s }
// CHECK-ENCODING: [0x87,0x39,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
diff --git a/llvm/test/MC/AArch64/SME2/fmlal.s b/llvm/test/MC/AArch64/SME2/fmlal.s
index 31131690a85f7..84495fb17a3d9 100644
--- a/llvm/test/MC/AArch64/SME2/fmlal.s
+++ b/llvm/test/MC/AArch64/SME2/fmlal.s
@@ -158,436 +158,436 @@ fmlal za.s[w9, 14:15], z12.h, z11.h[6] // 11000001-10001011-10111001-10000111
// CHECK-UNKNOWN: c18bb987 <unknown>
-fmlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h // 11000001, 00100000, 00001000, 00000000
-// CHECK, INST: fmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+fmlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h // 11000001-00100000-00001000-00000000
+// CHECK-INST: fmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x00,0x08,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200800 <unknown>
fmlal za.s[w8, 0:1], {z0.h - z1.h}, z0.h // 11000001-00100000-00001000-00000000
-// CHECK, INST: fmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+// CHECK-INST: fmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x00,0x08,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200800 <unknown>
-fmlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h // 11000001, 00100101, 01001001, 01000001
-// CHECK, INST: fmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
+fmlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h // 11000001-00100101-01001001-01000001
+// CHECK-INST: fmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x41,0x49,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254941 <unknown>
fmlal za.s[w10, 2:3], {z10.h - z11.h}, z5.h // 11000001-00100101-01001001-01000001
-// CHECK, INST: fmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
+// CHECK-INST: fmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x41,0x49,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254941 <unknown>
-fmlal za.s[w11, 6:7, vgx2], {z13.h, z14.h}, z8.h // 11000001, 00101000, 01101001, 10100011
-// CHECK, INST: fmlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
+fmlal za.s[w11, 6:7, vgx2], {z13.h, z14.h}, z8.h // 11000001-00101000-01101001-10100011
+// CHECK-INST: fmlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xa3,0x69,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12869a3 <unknown>
fmlal za.s[w11, 6:7], {z13.h - z14.h}, z8.h // 11000001-00101000-01101001-10100011
-// CHECK, INST: fmlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
+// CHECK-INST: fmlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xa3,0x69,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12869a3 <unknown>
-fmlal za.s[w11, 6:7, vgx2], {z31.h, z0.h}, z15.h // 11000001, 00101111, 01101011, 11100011
-// CHECK, INST: fmlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
+fmlal za.s[w11, 6:7, vgx2], {z31.h, z0.h}, z15.h // 11000001-00101111-01101011-11100011
+// CHECK-INST: fmlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xe3,0x6b,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f6be3 <unknown>
fmlal za.s[w11, 6:7], {z31.h - z0.h}, z15.h // 11000001-00101111-01101011-11100011
-// CHECK, INST: fmlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
+// CHECK-INST: fmlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xe3,0x6b,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f6be3 <unknown>
-fmlal za.s[w8, 2:3, vgx2], {z17.h, z18.h}, z0.h // 11000001, 00100000, 00001010, 00100001
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
+fmlal za.s[w8, 2:3, vgx2], {z17.h, z18.h}, z0.h // 11000001-00100000-00001010-00100001
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x21,0x0a,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200a21 <unknown>
fmlal za.s[w8, 2:3], {z17.h - z18.h}, z0.h // 11000001-00100000-00001010-00100001
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x21,0x0a,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200a21 <unknown>
-fmlal za.s[w8, 2:3, vgx2], {z1.h, z2.h}, z14.h // 11000001, 00101110, 00001000, 00100001
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
+fmlal za.s[w8, 2:3, vgx2], {z1.h, z2.h}, z14.h // 11000001-00101110-00001000-00100001
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x21,0x08,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0821 <unknown>
fmlal za.s[w8, 2:3], {z1.h - z2.h}, z14.h // 11000001-00101110-00001000-00100001
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x21,0x08,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0821 <unknown>
-fmlal za.s[w10, 0:1, vgx2], {z19.h, z20.h}, z4.h // 11000001, 00100100, 01001010, 01100000
-// CHECK, INST: fmlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
+fmlal za.s[w10, 0:1, vgx2], {z19.h, z20.h}, z4.h // 11000001-00100100-01001010-01100000
+// CHECK-INST: fmlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x60,0x4a,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244a60 <unknown>
fmlal za.s[w10, 0:1], {z19.h - z20.h}, z4.h // 11000001-00100100-01001010-01100000
-// CHECK, INST: fmlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
+// CHECK-INST: fmlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x60,0x4a,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244a60 <unknown>
-fmlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h // 11000001, 00100010, 00001001, 10000000
-// CHECK, INST: fmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
+fmlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h // 11000001-00100010-00001001-10000000
+// CHECK-INST: fmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x80,0x09,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220980 <unknown>
fmlal za.s[w8, 0:1], {z12.h - z13.h}, z2.h // 11000001-00100010-00001001-10000000
-// CHECK, INST: fmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
+// CHECK-INST: fmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x80,0x09,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220980 <unknown>
-fmlal za.s[w10, 2:3, vgx2], {z1.h, z2.h}, z10.h // 11000001, 00101010, 01001000, 00100001
-// CHECK, INST: fmlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
+fmlal za.s[w10, 2:3, vgx2], {z1.h, z2.h}, z10.h // 11000001-00101010-01001000-00100001
+// CHECK-INST: fmlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x21,0x48,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4821 <unknown>
fmlal za.s[w10, 2:3], {z1.h - z2.h}, z10.h // 11000001-00101010-01001000-00100001
-// CHECK, INST: fmlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
+// CHECK-INST: fmlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x21,0x48,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4821 <unknown>
-fmlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h // 11000001, 00101110, 00001010, 11000001
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
+fmlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h // 11000001-00101110-00001010-11000001
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xc1,0x0a,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0ac1 <unknown>
fmlal za.s[w8, 2:3], {z22.h - z23.h}, z14.h // 11000001-00101110-00001010-11000001
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xc1,0x0a,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0ac1 <unknown>
-fmlal za.s[w11, 4:5, vgx2], {z9.h, z10.h}, z1.h // 11000001, 00100001, 01101001, 00100010
-// CHECK, INST: fmlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
+fmlal za.s[w11, 4:5, vgx2], {z9.h, z10.h}, z1.h // 11000001-00100001-01101001-00100010
+// CHECK-INST: fmlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x22,0x69,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1216922 <unknown>
fmlal za.s[w11, 4:5], {z9.h - z10.h}, z1.h // 11000001-00100001-01101001-00100010
-// CHECK, INST: fmlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
+// CHECK-INST: fmlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x22,0x69,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1216922 <unknown>
-fmlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h // 11000001, 00101011, 00101001, 10000011
-// CHECK, INST: fmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
+fmlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h // 11000001-00101011-00101001-10000011
+// CHECK-INST: fmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x83,0x29,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b2983 <unknown>
fmlal za.s[w9, 6:7], {z12.h - z13.h}, z11.h // 11000001-00101011-00101001-10000011
-// CHECK, INST: fmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
+// CHECK-INST: fmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x83,0x29,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b2983 <unknown>
-fmlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001, 10010000, 00010000, 00000000
-// CHECK, INST: fmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
+fmlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001-10010000-00010000-00000000
+// CHECK-INST: fmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x00,0x10,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1901000 <unknown>
fmlal za.s[w8, 0:1], {z0.h - z1.h}, z0.h[0] // 11000001-10010000-00010000-00000000
-// CHECK, INST: fmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
+// CHECK-INST: fmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x00,0x10,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1901000 <unknown>
-fmlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h[3] // 11000001, 10010101, 01010101, 01000101
-// CHECK, INST: fmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
+fmlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h[3] // 11000001-10010101-01010101-01000101
+// CHECK-INST: fmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
// CHECK-ENCODING: [0x45,0x55,0x95,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1955545 <unknown>
fmlal za.s[w10, 2:3], {z10.h - z11.h}, z5.h[3] // 11000001-10010101-01010101-01000101
-// CHECK, INST: fmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
+// CHECK-INST: fmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
// CHECK-ENCODING: [0x45,0x55,0x95,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1955545 <unknown>
-fmlal za.s[w11, 6:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001, 10011000, 01111101, 10000111
-// CHECK, INST: fmlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
+fmlal za.s[w11, 6:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001-10011000-01111101-10000111
+// CHECK-INST: fmlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x87,0x7d,0x98,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1987d87 <unknown>
fmlal za.s[w11, 6:7], {z12.h - z13.h}, z8.h[7] // 11000001-10011000-01111101-10000111
-// CHECK, INST: fmlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
+// CHECK-INST: fmlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x87,0x7d,0x98,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1987d87 <unknown>
-fmlal za.s[w11, 6:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001, 10011111, 01111111, 11000111
-// CHECK, INST: fmlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
+fmlal za.s[w11, 6:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001-10011111-01111111-11000111
+// CHECK-INST: fmlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xc7,0x7f,0x9f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19f7fc7 <unknown>
fmlal za.s[w11, 6:7], {z30.h - z31.h}, z15.h[7] // 11000001-10011111-01111111-11000111
-// CHECK, INST: fmlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
+// CHECK-INST: fmlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xc7,0x7f,0x9f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19f7fc7 <unknown>
-fmlal za.s[w8, 2:3, vgx2], {z16.h, z17.h}, z0.h[7] // 11000001, 10010000, 00011110, 00000101
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
+fmlal za.s[w8, 2:3, vgx2], {z16.h, z17.h}, z0.h[7] // 11000001-10010000-00011110-00000101
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
// CHECK-ENCODING: [0x05,0x1e,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1901e05 <unknown>
fmlal za.s[w8, 2:3], {z16.h - z17.h}, z0.h[7] // 11000001-10010000-00011110-00000101
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
// CHECK-ENCODING: [0x05,0x1e,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1901e05 <unknown>
-fmlal za.s[w8, 2:3, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001, 10011110, 00010100, 00000001
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
+fmlal za.s[w8, 2:3, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001-10011110-00010100-00000001
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x01,0x14,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e1401 <unknown>
fmlal za.s[w8, 2:3], {z0.h - z1.h}, z14.h[2] // 11000001-10011110-00010100-00000001
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x01,0x14,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e1401 <unknown>
-fmlal za.s[w10, 0:1, vgx2], {z18.h, z19.h}, z4.h[2] // 11000001, 10010100, 01010110, 01000000
-// CHECK, INST: fmlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
+fmlal za.s[w10, 0:1, vgx2], {z18.h, z19.h}, z4.h[2] // 11000001-10010100-01010110-01000000
+// CHECK-INST: fmlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
// CHECK-ENCODING: [0x40,0x56,0x94,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1945640 <unknown>
fmlal za.s[w10, 0:1], {z18.h - z19.h}, z4.h[2] // 11000001-10010100-01010110-01000000
-// CHECK, INST: fmlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
+// CHECK-INST: fmlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
// CHECK-ENCODING: [0x40,0x56,0x94,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1945640 <unknown>
-fmlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001, 10010010, 00011001, 10000000
-// CHECK, INST: fmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
+fmlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001-10010010-00011001-10000000
+// CHECK-INST: fmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0x80,0x19,0x92,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1921980 <unknown>
fmlal za.s[w8, 0:1], {z12.h - z13.h}, z2.h[4] // 11000001-10010010-00011001-10000000
-// CHECK, INST: fmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
+// CHECK-INST: fmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0x80,0x19,0x92,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1921980 <unknown>
-fmlal za.s[w10, 2:3, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001, 10011010, 01011000, 00000001
-// CHECK, INST: fmlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
+fmlal za.s[w10, 2:3, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001-10011010-01011000-00000001
+// CHECK-INST: fmlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x01,0x58,0x9a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19a5801 <unknown>
fmlal za.s[w10, 2:3], {z0.h - z1.h}, z10.h[4] // 11000001-10011010-01011000-00000001
-// CHECK, INST: fmlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
+// CHECK-INST: fmlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x01,0x58,0x9a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19a5801 <unknown>
-fmlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001, 10011110, 00011010, 11000101
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
+fmlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001-10011110-00011010-11000101
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xc5,0x1a,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e1ac5 <unknown>
fmlal za.s[w8, 2:3], {z22.h - z23.h}, z14.h[5] // 11000001-10011110-00011010-11000101
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xc5,0x1a,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e1ac5 <unknown>
-fmlal za.s[w11, 4:5, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001, 10010001, 01110101, 00000010
-// CHECK, INST: fmlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
+fmlal za.s[w11, 4:5, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001-10010001-01110101-00000010
+// CHECK-INST: fmlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x02,0x75,0x91,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1917502 <unknown>
fmlal za.s[w11, 4:5], {z8.h - z9.h}, z1.h[2] // 11000001-10010001-01110101-00000010
-// CHECK, INST: fmlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
+// CHECK-INST: fmlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x02,0x75,0x91,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1917502 <unknown>
-fmlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h[5] // 11000001, 10011011, 00111001, 10000111
-// CHECK, INST: fmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
+fmlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h[5] // 11000001-10011011-00111001-10000111
+// CHECK-INST: fmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
// CHECK-ENCODING: [0x87,0x39,0x9b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19b3987 <unknown>
fmlal za.s[w9, 6:7], {z12.h - z13.h}, z11.h[5] // 11000001-10011011-00111001-10000111
-// CHECK, INST: fmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
+// CHECK-INST: fmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
// CHECK-ENCODING: [0x87,0x39,0x9b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19b3987 <unknown>
-fmlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001, 10100000, 00001000, 00000000
-// CHECK, INST: fmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+fmlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001-10100000-00001000-00000000
+// CHECK-INST: fmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x00,0x08,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00800 <unknown>
fmlal za.s[w8, 0:1], {z0.h - z1.h}, {z0.h - z1.h} // 11000001-10100000-00001000-00000000
-// CHECK, INST: fmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+// CHECK-INST: fmlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x00,0x08,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00800 <unknown>
-fmlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001, 10110100, 01001001, 01000001
-// CHECK, INST: fmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+fmlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001-10110100-01001001-01000001
+// CHECK-INST: fmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x41,0x49,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44941 <unknown>
fmlal za.s[w10, 2:3], {z10.h - z11.h}, {z20.h - z21.h} // 11000001-10110100-01001001-01000001
-// CHECK, INST: fmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+// CHECK-INST: fmlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x41,0x49,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44941 <unknown>
-fmlal za.s[w11, 6:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001, 10101000, 01101001, 10000011
-// CHECK, INST: fmlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+fmlal za.s[w11, 6:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001-10101000-01101001-10000011
+// CHECK-INST: fmlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x83,0x69,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a86983 <unknown>
fmlal za.s[w11, 6:7], {z12.h - z13.h}, {z8.h - z9.h} // 11000001-10101000-01101001-10000011
-// CHECK, INST: fmlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+// CHECK-INST: fmlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x83,0x69,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a86983 <unknown>
-fmlal za.s[w11, 6:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001, 10111110, 01101011, 11000011
-// CHECK, INST: fmlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+fmlal za.s[w11, 6:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001-10111110-01101011-11000011
+// CHECK-INST: fmlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc3,0x6b,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be6bc3 <unknown>
fmlal za.s[w11, 6:7], {z30.h - z31.h}, {z30.h - z31.h} // 11000001-10111110-01101011-11000011
-// CHECK, INST: fmlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+// CHECK-INST: fmlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc3,0x6b,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be6bc3 <unknown>
-fmlal za.s[w8, 2:3, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001, 10110000, 00001010, 00000001
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+fmlal za.s[w8, 2:3, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001-10110000-00001010-00000001
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x01,0x0a,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00a01 <unknown>
fmlal za.s[w8, 2:3], {z16.h - z17.h}, {z16.h - z17.h} // 11000001-10110000-00001010-00000001
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x01,0x0a,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00a01 <unknown>
-fmlal za.s[w8, 2:3, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001, 10111110, 00001000, 00000001
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+fmlal za.s[w8, 2:3, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001-10111110-00001000-00000001
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x01,0x08,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0801 <unknown>
fmlal za.s[w8, 2:3], {z0.h - z1.h}, {z30.h - z31.h} // 11000001-10111110-00001000-00000001
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x01,0x08,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0801 <unknown>
-fmlal za.s[w10, 0:1, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001, 10110100, 01001010, 01000000
-// CHECK, INST: fmlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+fmlal za.s[w10, 0:1, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001-10110100-01001010-01000000
+// CHECK-INST: fmlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x40,0x4a,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44a40 <unknown>
fmlal za.s[w10, 0:1], {z18.h - z19.h}, {z20.h - z21.h} // 11000001-10110100-01001010-01000000
-// CHECK, INST: fmlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+// CHECK-INST: fmlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x40,0x4a,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44a40 <unknown>
-fmlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001, 10100010, 00001001, 10000000
-// CHECK, INST: fmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+fmlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001-10100010-00001001-10000000
+// CHECK-INST: fmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x80,0x09,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20980 <unknown>
fmlal za.s[w8, 0:1], {z12.h - z13.h}, {z2.h - z3.h} // 11000001-10100010-00001001-10000000
-// CHECK, INST: fmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+// CHECK-INST: fmlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x80,0x09,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20980 <unknown>
-fmlal za.s[w10, 2:3, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001, 10111010, 01001000, 00000001
-// CHECK, INST: fmlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+fmlal za.s[w10, 2:3, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001-10111010-01001000-00000001
+// CHECK-INST: fmlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x01,0x48,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4801 <unknown>
fmlal za.s[w10, 2:3], {z0.h - z1.h}, {z26.h - z27.h} // 11000001-10111010-01001000-00000001
-// CHECK, INST: fmlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+// CHECK-INST: fmlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x01,0x48,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4801 <unknown>
-fmlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001, 10111110, 00001010, 11000001
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+fmlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001-10111110-00001010-11000001
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc1,0x0a,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0ac1 <unknown>
fmlal za.s[w8, 2:3], {z22.h - z23.h}, {z30.h - z31.h} // 11000001-10111110-00001010-11000001
-// CHECK, INST: fmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+// CHECK-INST: fmlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc1,0x0a,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0ac1 <unknown>
-fmlal za.s[w11, 4:5, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001, 10100000, 01101001, 00000010
-// CHECK, INST: fmlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+fmlal za.s[w11, 4:5, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001-10100000-01101001-00000010
+// CHECK-INST: fmlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x02,0x69,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a06902 <unknown>
fmlal za.s[w11, 4:5], {z8.h - z9.h}, {z0.h - z1.h} // 11000001-10100000-01101001-00000010
-// CHECK, INST: fmlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+// CHECK-INST: fmlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x02,0x69,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a06902 <unknown>
-fmlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001, 10101010, 00101001, 10000011
-// CHECK, INST: fmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+fmlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001-10101010-00101001-10000011
+// CHECK-INST: fmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x83,0x29,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa2983 <unknown>
fmlal za.s[w9, 6:7], {z12.h - z13.h}, {z10.h - z11.h} // 11000001-10101010-00101001-10000011
-// CHECK, INST: fmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+// CHECK-INST: fmlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x83,0x29,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa2983 <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/fmls.s b/llvm/test/MC/AArch64/SME2/fmls.s
index 7f58d04f4e756..944253687db0a 100644
--- a/llvm/test/MC/AArch64/SME2/fmls.s
+++ b/llvm/test/MC/AArch64/SME2/fmls.s
@@ -12,7 +12,7 @@
// RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
-fmls za.d[w8, 0, vgx2], {z0.d, z1.d}, z0.d // 11000001, 01100000, 00011000, 00001000
+fmls za.d[w8, 0, vgx2], {z0.d, z1.d}, z0.d // 11000001-01100000-00011000-00001000
// CHECK-INST: fmls za.d[w8, 0, vgx2], { z0.d, z1.d }, z0.d
// CHECK-ENCODING: [0x08,0x18,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -24,7 +24,7 @@ fmls za.d[w8, 0], {z0.d - z1.d}, z0.d // 11000001-01100000-00011000-00001000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1601808 <unknown>
-fmls za.d[w10, 5, vgx2], {z10.d, z11.d}, z5.d // 11000001, 01100101, 01011001, 01001101
+fmls za.d[w10, 5, vgx2], {z10.d, z11.d}, z5.d // 11000001-01100101-01011001-01001101
// CHECK-INST: fmls za.d[w10, 5, vgx2], { z10.d, z11.d }, z5.d
// CHECK-ENCODING: [0x4d,0x59,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -36,7 +36,7 @@ fmls za.d[w10, 5], {z10.d - z11.d}, z5.d // 11000001-01100101-01011001-01001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c165594d <unknown>
-fmls za.d[w11, 7, vgx2], {z13.d, z14.d}, z8.d // 11000001, 01101000, 01111001, 10101111
+fmls za.d[w11, 7, vgx2], {z13.d, z14.d}, z8.d // 11000001-01101000-01111001-10101111
// CHECK-INST: fmls za.d[w11, 7, vgx2], { z13.d, z14.d }, z8.d
// CHECK-ENCODING: [0xaf,0x79,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -48,7 +48,7 @@ fmls za.d[w11, 7], {z13.d - z14.d}, z8.d // 11000001-01101000-01111001-10101
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16879af <unknown>
-fmls za.d[w11, 7, vgx2], {z31.d, z0.d}, z15.d // 11000001, 01101111, 01111011, 11101111
+fmls za.d[w11, 7, vgx2], {z31.d, z0.d}, z15.d // 11000001-01101111-01111011-11101111
// CHECK-INST: fmls za.d[w11, 7, vgx2], { z31.d, z0.d }, z15.d
// CHECK-ENCODING: [0xef,0x7b,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -60,7 +60,7 @@ fmls za.d[w11, 7], {z31.d - z0.d}, z15.d // 11000001-01101111-01111011-11101
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f7bef <unknown>
-fmls za.d[w8, 5, vgx2], {z17.d, z18.d}, z0.d // 11000001, 01100000, 00011010, 00101101
+fmls za.d[w8, 5, vgx2], {z17.d, z18.d}, z0.d // 11000001-01100000-00011010-00101101
// CHECK-INST: fmls za.d[w8, 5, vgx2], { z17.d, z18.d }, z0.d
// CHECK-ENCODING: [0x2d,0x1a,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -72,7 +72,7 @@ fmls za.d[w8, 5], {z17.d - z18.d}, z0.d // 11000001-01100000-00011010-001011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1601a2d <unknown>
-fmls za.d[w8, 1, vgx2], {z1.d, z2.d}, z14.d // 11000001, 01101110, 00011000, 00101001
+fmls za.d[w8, 1, vgx2], {z1.d, z2.d}, z14.d // 11000001-01101110-00011000-00101001
// CHECK-INST: fmls za.d[w8, 1, vgx2], { z1.d, z2.d }, z14.d
// CHECK-ENCODING: [0x29,0x18,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -84,7 +84,7 @@ fmls za.d[w8, 1], {z1.d - z2.d}, z14.d // 11000001-01101110-00011000-0010100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e1829 <unknown>
-fmls za.d[w10, 0, vgx2], {z19.d, z20.d}, z4.d // 11000001, 01100100, 01011010, 01101000
+fmls za.d[w10, 0, vgx2], {z19.d, z20.d}, z4.d // 11000001-01100100-01011010-01101000
// CHECK-INST: fmls za.d[w10, 0, vgx2], { z19.d, z20.d }, z4.d
// CHECK-ENCODING: [0x68,0x5a,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -96,7 +96,7 @@ fmls za.d[w10, 0], {z19.d - z20.d}, z4.d // 11000001-01100100-01011010-01101
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1645a68 <unknown>
-fmls za.d[w8, 0, vgx2], {z12.d, z13.d}, z2.d // 11000001, 01100010, 00011001, 10001000
+fmls za.d[w8, 0, vgx2], {z12.d, z13.d}, z2.d // 11000001-01100010-00011001-10001000
// CHECK-INST: fmls za.d[w8, 0, vgx2], { z12.d, z13.d }, z2.d
// CHECK-ENCODING: [0x88,0x19,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -108,7 +108,7 @@ fmls za.d[w8, 0], {z12.d - z13.d}, z2.d // 11000001-01100010-00011001-100010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1621988 <unknown>
-fmls za.d[w10, 1, vgx2], {z1.d, z2.d}, z10.d // 11000001, 01101010, 01011000, 00101001
+fmls za.d[w10, 1, vgx2], {z1.d, z2.d}, z10.d // 11000001-01101010-01011000-00101001
// CHECK-INST: fmls za.d[w10, 1, vgx2], { z1.d, z2.d }, z10.d
// CHECK-ENCODING: [0x29,0x58,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -120,7 +120,7 @@ fmls za.d[w10, 1], {z1.d - z2.d}, z10.d // 11000001-01101010-01011000-001010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a5829 <unknown>
-fmls za.d[w8, 5, vgx2], {z22.d, z23.d}, z14.d // 11000001, 01101110, 00011010, 11001101
+fmls za.d[w8, 5, vgx2], {z22.d, z23.d}, z14.d // 11000001-01101110-00011010-11001101
// CHECK-INST: fmls za.d[w8, 5, vgx2], { z22.d, z23.d }, z14.d
// CHECK-ENCODING: [0xcd,0x1a,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -132,7 +132,7 @@ fmls za.d[w8, 5], {z22.d - z23.d}, z14.d // 11000001-01101110-00011010-11001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e1acd <unknown>
-fmls za.d[w11, 2, vgx2], {z9.d, z10.d}, z1.d // 11000001, 01100001, 01111001, 00101010
+fmls za.d[w11, 2, vgx2], {z9.d, z10.d}, z1.d // 11000001-01100001-01111001-00101010
// CHECK-INST: fmls za.d[w11, 2, vgx2], { z9.d, z10.d }, z1.d
// CHECK-ENCODING: [0x2a,0x79,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -144,7 +144,7 @@ fmls za.d[w11, 2], {z9.d - z10.d}, z1.d // 11000001-01100001-01111001-001010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c161792a <unknown>
-fmls za.d[w9, 7, vgx2], {z12.d, z13.d}, z11.d // 11000001, 01101011, 00111001, 10001111
+fmls za.d[w9, 7, vgx2], {z12.d, z13.d}, z11.d // 11000001-01101011-00111001-10001111
// CHECK-INST: fmls za.d[w9, 7, vgx2], { z12.d, z13.d }, z11.d
// CHECK-ENCODING: [0x8f,0x39,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -314,7 +314,7 @@ fmls za.d[w8, 0], {z0.d - z1.d}, {z0.d - z1.d} // 11000001-11100000-00011000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e01808 <unknown>
-fmls za.d[w10, 5, vgx2], {z10.d, z11.d}, {z20.d, z21.d} // 11000001, 11110100, 01011001, 01001101
+fmls za.d[w10, 5, vgx2], {z10.d, z11.d}, {z20.d, z21.d} // 11000001-11110100-01011001-01001101
// CHECK-INST: fmls za.d[w10, 5, vgx2], { z10.d, z11.d }, { z20.d, z21.d }
// CHECK-ENCODING: [0x4d,0x59,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -326,7 +326,7 @@ fmls za.d[w10, 5], {z10.d - z11.d}, {z20.d - z21.d} // 11000001-11110100-010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f4594d <unknown>
-fmls za.d[w11, 7, vgx2], {z12.d, z13.d}, {z8.d, z9.d} // 11000001, 11101000, 01111001, 10001111
+fmls za.d[w11, 7, vgx2], {z12.d, z13.d}, {z8.d, z9.d} // 11000001-11101000-01111001-10001111
// CHECK-INST: fmls za.d[w11, 7, vgx2], { z12.d, z13.d }, { z8.d, z9.d }
// CHECK-ENCODING: [0x8f,0x79,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -338,7 +338,7 @@ fmls za.d[w11, 7], {z12.d - z13.d}, {z8.d - z9.d} // 11000001-11101000-01111
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e8798f <unknown>
-fmls za.d[w11, 7, vgx2], {z30.d, z31.d}, {z30.d, z31.d} // 11000001, 11111110, 01111011, 11001111
+fmls za.d[w11, 7, vgx2], {z30.d, z31.d}, {z30.d, z31.d} // 11000001-11111110-01111011-11001111
// CHECK-INST: fmls za.d[w11, 7, vgx2], { z30.d, z31.d }, { z30.d, z31.d }
// CHECK-ENCODING: [0xcf,0x7b,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -350,7 +350,7 @@ fmls za.d[w11, 7], {z30.d - z31.d}, {z30.d - z31.d} // 11000001-11111110-011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe7bcf <unknown>
-fmls za.d[w8, 5, vgx2], {z16.d, z17.d}, {z16.d, z17.d} // 11000001, 11110000, 00011010, 00001101
+fmls za.d[w8, 5, vgx2], {z16.d, z17.d}, {z16.d, z17.d} // 11000001-11110000-00011010-00001101
// CHECK-INST: fmls za.d[w8, 5, vgx2], { z16.d, z17.d }, { z16.d, z17.d }
// CHECK-ENCODING: [0x0d,0x1a,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -362,7 +362,7 @@ fmls za.d[w8, 5], {z16.d - z17.d}, {z16.d - z17.d} // 11000001-11110000-0001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f01a0d <unknown>
-fmls za.d[w8, 1, vgx2], {z0.d, z1.d}, {z30.d, z31.d} // 11000001, 11111110, 00011000, 00001001
+fmls za.d[w8, 1, vgx2], {z0.d, z1.d}, {z30.d, z31.d} // 11000001-11111110-00011000-00001001
// CHECK-INST: fmls za.d[w8, 1, vgx2], { z0.d, z1.d }, { z30.d, z31.d }
// CHECK-ENCODING: [0x09,0x18,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -374,7 +374,7 @@ fmls za.d[w8, 1], {z0.d - z1.d}, {z30.d - z31.d} // 11000001-11111110-000110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe1809 <unknown>
-fmls za.d[w10, 0, vgx2], {z18.d, z19.d}, {z20.d, z21.d} // 11000001, 11110100, 01011010, 01001000
+fmls za.d[w10, 0, vgx2], {z18.d, z19.d}, {z20.d, z21.d} // 11000001-11110100-01011010-01001000
// CHECK-INST: fmls za.d[w10, 0, vgx2], { z18.d, z19.d }, { z20.d, z21.d }
// CHECK-ENCODING: [0x48,0x5a,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -386,7 +386,7 @@ fmls za.d[w10, 0], {z18.d - z19.d}, {z20.d - z21.d} // 11000001-11110100-010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f45a48 <unknown>
-fmls za.d[w8, 0, vgx2], {z12.d, z13.d}, {z2.d, z3.d} // 11000001, 11100010, 00011001, 10001000
+fmls za.d[w8, 0, vgx2], {z12.d, z13.d}, {z2.d, z3.d} // 11000001-11100010-00011001-10001000
// CHECK-INST: fmls za.d[w8, 0, vgx2], { z12.d, z13.d }, { z2.d, z3.d }
// CHECK-ENCODING: [0x88,0x19,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -398,7 +398,7 @@ fmls za.d[w8, 0], {z12.d - z13.d}, {z2.d - z3.d} // 11000001-11100010-000110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e21988 <unknown>
-fmls za.d[w10, 1, vgx2], {z0.d, z1.d}, {z26.d, z27.d} // 11000001, 11111010, 01011000, 00001001
+fmls za.d[w10, 1, vgx2], {z0.d, z1.d}, {z26.d, z27.d} // 11000001-11111010-01011000-00001001
// CHECK-INST: fmls za.d[w10, 1, vgx2], { z0.d, z1.d }, { z26.d, z27.d }
// CHECK-ENCODING: [0x09,0x58,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -410,7 +410,7 @@ fmls za.d[w10, 1], {z0.d - z1.d}, {z26.d - z27.d} // 11000001-11111010-01011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa5809 <unknown>
-fmls za.d[w8, 5, vgx2], {z22.d, z23.d}, {z30.d, z31.d} // 11000001, 11111110, 00011010, 11001101
+fmls za.d[w8, 5, vgx2], {z22.d, z23.d}, {z30.d, z31.d} // 11000001-11111110-00011010-11001101
// CHECK-INST: fmls za.d[w8, 5, vgx2], { z22.d, z23.d }, { z30.d, z31.d }
// CHECK-ENCODING: [0xcd,0x1a,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -422,7 +422,7 @@ fmls za.d[w8, 5], {z22.d - z23.d}, {z30.d - z31.d} // 11000001-11111110-0001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe1acd <unknown>
-fmls za.d[w11, 2, vgx2], {z8.d, z9.d}, {z0.d, z1.d} // 11000001, 11100000, 01111001, 00001010
+fmls za.d[w11, 2, vgx2], {z8.d, z9.d}, {z0.d, z1.d} // 11000001-11100000-01111001-00001010
// CHECK-INST: fmls za.d[w11, 2, vgx2], { z8.d, z9.d }, { z0.d, z1.d }
// CHECK-ENCODING: [0x0a,0x79,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -434,7 +434,7 @@ fmls za.d[w11, 2], {z8.d - z9.d}, {z0.d - z1.d} // 11000001-11100000-0111100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e0790a <unknown>
-fmls za.d[w9, 7, vgx2], {z12.d, z13.d}, {z10.d, z11.d} // 11000001, 11101010, 00111001, 10001111
+fmls za.d[w9, 7, vgx2], {z12.d, z13.d}, {z10.d, z11.d} // 11000001-11101010-00111001-10001111
// CHECK-INST: fmls za.d[w9, 7, vgx2], { z12.d, z13.d }, { z10.d, z11.d }
// CHECK-ENCODING: [0x8f,0x39,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -447,7 +447,7 @@ fmls za.d[w9, 7], {z12.d - z13.d}, {z10.d - z11.d} // 11000001-11101010-0011
// CHECK-UNKNOWN: c1ea398f <unknown>
-fmls za.s[w8, 0, vgx2], {z0.s, z1.s}, z0.s // 11000001, 00100000, 00011000, 00001000
+fmls za.s[w8, 0, vgx2], {z0.s, z1.s}, z0.s // 11000001-00100000-00011000-00001000
// CHECK-INST: fmls za.s[w8, 0, vgx2], { z0.s, z1.s }, z0.s
// CHECK-ENCODING: [0x08,0x18,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -459,7 +459,7 @@ fmls za.s[w8, 0], {z0.s - z1.s}, z0.s // 11000001-00100000-00011000-00001000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1201808 <unknown>
-fmls za.s[w10, 5, vgx2], {z10.s, z11.s}, z5.s // 11000001, 00100101, 01011001, 01001101
+fmls za.s[w10, 5, vgx2], {z10.s, z11.s}, z5.s // 11000001-00100101-01011001-01001101
// CHECK-INST: fmls za.s[w10, 5, vgx2], { z10.s, z11.s }, z5.s
// CHECK-ENCODING: [0x4d,0x59,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -471,7 +471,7 @@ fmls za.s[w10, 5], {z10.s - z11.s}, z5.s // 11000001-00100101-01011001-01001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c125594d <unknown>
-fmls za.s[w11, 7, vgx2], {z13.s, z14.s}, z8.s // 11000001, 00101000, 01111001, 10101111
+fmls za.s[w11, 7, vgx2], {z13.s, z14.s}, z8.s // 11000001-00101000-01111001-10101111
// CHECK-INST: fmls za.s[w11, 7, vgx2], { z13.s, z14.s }, z8.s
// CHECK-ENCODING: [0xaf,0x79,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -483,7 +483,7 @@ fmls za.s[w11, 7], {z13.s - z14.s}, z8.s // 11000001-00101000-01111001-10101
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12879af <unknown>
-fmls za.s[w11, 7, vgx2], {z31.s, z0.s}, z15.s // 11000001, 00101111, 01111011, 11101111
+fmls za.s[w11, 7, vgx2], {z31.s, z0.s}, z15.s // 11000001-00101111-01111011-11101111
// CHECK-INST: fmls za.s[w11, 7, vgx2], { z31.s, z0.s }, z15.s
// CHECK-ENCODING: [0xef,0x7b,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -495,7 +495,7 @@ fmls za.s[w11, 7], {z31.s - z0.s}, z15.s // 11000001-00101111-01111011-11101
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f7bef <unknown>
-fmls za.s[w8, 5, vgx2], {z17.s, z18.s}, z0.s // 11000001, 00100000, 00011010, 00101101
+fmls za.s[w8, 5, vgx2], {z17.s, z18.s}, z0.s // 11000001-00100000-00011010-00101101
// CHECK-INST: fmls za.s[w8, 5, vgx2], { z17.s, z18.s }, z0.s
// CHECK-ENCODING: [0x2d,0x1a,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -507,7 +507,7 @@ fmls za.s[w8, 5], {z17.s - z18.s}, z0.s // 11000001-00100000-00011010-001011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1201a2d <unknown>
-fmls za.s[w8, 1, vgx2], {z1.s, z2.s}, z14.s // 11000001, 00101110, 00011000, 00101001
+fmls za.s[w8, 1, vgx2], {z1.s, z2.s}, z14.s // 11000001-00101110-00011000-00101001
// CHECK-INST: fmls za.s[w8, 1, vgx2], { z1.s, z2.s }, z14.s
// CHECK-ENCODING: [0x29,0x18,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -519,7 +519,7 @@ fmls za.s[w8, 1], {z1.s - z2.s}, z14.s // 11000001-00101110-00011000-0010100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e1829 <unknown>
-fmls za.s[w10, 0, vgx2], {z19.s, z20.s}, z4.s // 11000001, 00100100, 01011010, 01101000
+fmls za.s[w10, 0, vgx2], {z19.s, z20.s}, z4.s // 11000001-00100100-01011010-01101000
// CHECK-INST: fmls za.s[w10, 0, vgx2], { z19.s, z20.s }, z4.s
// CHECK-ENCODING: [0x68,0x5a,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -531,7 +531,7 @@ fmls za.s[w10, 0], {z19.s - z20.s}, z4.s // 11000001-00100100-01011010-01101
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1245a68 <unknown>
-fmls za.s[w8, 0, vgx2], {z12.s, z13.s}, z2.s // 11000001, 00100010, 00011001, 10001000
+fmls za.s[w8, 0, vgx2], {z12.s, z13.s}, z2.s // 11000001-00100010-00011001-10001000
// CHECK-INST: fmls za.s[w8, 0, vgx2], { z12.s, z13.s }, z2.s
// CHECK-ENCODING: [0x88,0x19,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -543,7 +543,7 @@ fmls za.s[w8, 0], {z12.s - z13.s}, z2.s // 11000001-00100010-00011001-100010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1221988 <unknown>
-fmls za.s[w10, 1, vgx2], {z1.s, z2.s}, z10.s // 11000001, 00101010, 01011000, 00101001
+fmls za.s[w10, 1, vgx2], {z1.s, z2.s}, z10.s // 11000001-00101010-01011000-00101001
// CHECK-INST: fmls za.s[w10, 1, vgx2], { z1.s, z2.s }, z10.s
// CHECK-ENCODING: [0x29,0x58,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -555,7 +555,7 @@ fmls za.s[w10, 1], {z1.s - z2.s}, z10.s // 11000001-00101010-01011000-001010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a5829 <unknown>
-fmls za.s[w8, 5, vgx2], {z22.s, z23.s}, z14.s // 11000001, 00101110, 00011010, 11001101
+fmls za.s[w8, 5, vgx2], {z22.s, z23.s}, z14.s // 11000001-00101110-00011010-11001101
// CHECK-INST: fmls za.s[w8, 5, vgx2], { z22.s, z23.s }, z14.s
// CHECK-ENCODING: [0xcd,0x1a,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -567,7 +567,7 @@ fmls za.s[w8, 5], {z22.s - z23.s}, z14.s // 11000001-00101110-00011010-11001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e1acd <unknown>
-fmls za.s[w11, 2, vgx2], {z9.s, z10.s}, z1.s // 11000001, 00100001, 01111001, 00101010
+fmls za.s[w11, 2, vgx2], {z9.s, z10.s}, z1.s // 11000001-00100001-01111001-00101010
// CHECK-INST: fmls za.s[w11, 2, vgx2], { z9.s, z10.s }, z1.s
// CHECK-ENCODING: [0x2a,0x79,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -579,7 +579,7 @@ fmls za.s[w11, 2], {z9.s - z10.s}, z1.s // 11000001-00100001-01111001-001010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c121792a <unknown>
-fmls za.s[w9, 7, vgx2], {z12.s, z13.s}, z11.s // 11000001, 00101011, 00111001, 10001111
+fmls za.s[w9, 7, vgx2], {z12.s, z13.s}, z11.s // 11000001-00101011-00111001-10001111
// CHECK-INST: fmls za.s[w9, 7, vgx2], { z12.s, z13.s }, z11.s
// CHECK-ENCODING: [0x8f,0x39,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -749,7 +749,7 @@ fmls za.s[w8, 0], {z0.s - z1.s}, {z0.s - z1.s} // 11000001-10100000-00011000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a01808 <unknown>
-fmls za.s[w10, 5, vgx2], {z10.s, z11.s}, {z20.s, z21.s} // 11000001, 10110100, 01011001, 01001101
+fmls za.s[w10, 5, vgx2], {z10.s, z11.s}, {z20.s, z21.s} // 11000001-10110100-01011001-01001101
// CHECK-INST: fmls za.s[w10, 5, vgx2], { z10.s, z11.s }, { z20.s, z21.s }
// CHECK-ENCODING: [0x4d,0x59,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -761,7 +761,7 @@ fmls za.s[w10, 5], {z10.s - z11.s}, {z20.s - z21.s} // 11000001-10110100-010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b4594d <unknown>
-fmls za.s[w11, 7, vgx2], {z12.s, z13.s}, {z8.s, z9.s} // 11000001, 10101000, 01111001, 10001111
+fmls za.s[w11, 7, vgx2], {z12.s, z13.s}, {z8.s, z9.s} // 11000001-10101000-01111001-10001111
// CHECK-INST: fmls za.s[w11, 7, vgx2], { z12.s, z13.s }, { z8.s, z9.s }
// CHECK-ENCODING: [0x8f,0x79,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -773,7 +773,7 @@ fmls za.s[w11, 7], {z12.s - z13.s}, {z8.s - z9.s} // 11000001-10101000-01111
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a8798f <unknown>
-fmls za.s[w11, 7, vgx2], {z30.s, z31.s}, {z30.s, z31.s} // 11000001, 10111110, 01111011, 11001111
+fmls za.s[w11, 7, vgx2], {z30.s, z31.s}, {z30.s, z31.s} // 11000001-10111110-01111011-11001111
// CHECK-INST: fmls za.s[w11, 7, vgx2], { z30.s, z31.s }, { z30.s, z31.s }
// CHECK-ENCODING: [0xcf,0x7b,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -785,7 +785,7 @@ fmls za.s[w11, 7], {z30.s - z31.s}, {z30.s - z31.s} // 11000001-10111110-011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be7bcf <unknown>
-fmls za.s[w8, 5, vgx2], {z16.s, z17.s}, {z16.s, z17.s} // 11000001, 10110000, 00011010, 00001101
+fmls za.s[w8, 5, vgx2], {z16.s, z17.s}, {z16.s, z17.s} // 11000001-10110000-00011010-00001101
// CHECK-INST: fmls za.s[w8, 5, vgx2], { z16.s, z17.s }, { z16.s, z17.s }
// CHECK-ENCODING: [0x0d,0x1a,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -797,7 +797,7 @@ fmls za.s[w8, 5], {z16.s - z17.s}, {z16.s - z17.s} // 11000001-10110000-0001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b01a0d <unknown>
-fmls za.s[w8, 1, vgx2], {z0.s, z1.s}, {z30.s, z31.s} // 11000001, 10111110, 00011000, 00001001
+fmls za.s[w8, 1, vgx2], {z0.s, z1.s}, {z30.s, z31.s} // 11000001-10111110-00011000-00001001
// CHECK-INST: fmls za.s[w8, 1, vgx2], { z0.s, z1.s }, { z30.s, z31.s }
// CHECK-ENCODING: [0x09,0x18,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -809,7 +809,7 @@ fmls za.s[w8, 1], {z0.s - z1.s}, {z30.s - z31.s} // 11000001-10111110-000110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be1809 <unknown>
-fmls za.s[w10, 0, vgx2], {z18.s, z19.s}, {z20.s, z21.s} // 11000001, 10110100, 01011010, 01001000
+fmls za.s[w10, 0, vgx2], {z18.s, z19.s}, {z20.s, z21.s} // 11000001-10110100-01011010-01001000
// CHECK-INST: fmls za.s[w10, 0, vgx2], { z18.s, z19.s }, { z20.s, z21.s }
// CHECK-ENCODING: [0x48,0x5a,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -821,7 +821,7 @@ fmls za.s[w10, 0], {z18.s - z19.s}, {z20.s - z21.s} // 11000001-10110100-010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b45a48 <unknown>
-fmls za.s[w8, 0, vgx2], {z12.s, z13.s}, {z2.s, z3.s} // 11000001, 10100010, 00011001, 10001000
+fmls za.s[w8, 0, vgx2], {z12.s, z13.s}, {z2.s, z3.s} // 11000001-10100010-00011001-10001000
// CHECK-INST: fmls za.s[w8, 0, vgx2], { z12.s, z13.s }, { z2.s, z3.s }
// CHECK-ENCODING: [0x88,0x19,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -833,7 +833,7 @@ fmls za.s[w8, 0], {z12.s - z13.s}, {z2.s - z3.s} // 11000001-10100010-000110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a21988 <unknown>
-fmls za.s[w10, 1, vgx2], {z0.s, z1.s}, {z26.s, z27.s} // 11000001, 10111010, 01011000, 00001001
+fmls za.s[w10, 1, vgx2], {z0.s, z1.s}, {z26.s, z27.s} // 11000001-10111010-01011000-00001001
// CHECK-INST: fmls za.s[w10, 1, vgx2], { z0.s, z1.s }, { z26.s, z27.s }
// CHECK-ENCODING: [0x09,0x58,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -845,7 +845,7 @@ fmls za.s[w10, 1], {z0.s - z1.s}, {z26.s - z27.s} // 11000001-10111010-01011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba5809 <unknown>
-fmls za.s[w8, 5, vgx2], {z22.s, z23.s}, {z30.s, z31.s} // 11000001, 10111110, 00011010, 11001101
+fmls za.s[w8, 5, vgx2], {z22.s, z23.s}, {z30.s, z31.s} // 11000001-10111110-00011010-11001101
// CHECK-INST: fmls za.s[w8, 5, vgx2], { z22.s, z23.s }, { z30.s, z31.s }
// CHECK-ENCODING: [0xcd,0x1a,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -857,7 +857,7 @@ fmls za.s[w8, 5], {z22.s - z23.s}, {z30.s - z31.s} // 11000001-10111110-0001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be1acd <unknown>
-fmls za.s[w11, 2, vgx2], {z8.s, z9.s}, {z0.s, z1.s} // 11000001, 10100000, 01111001, 00001010
+fmls za.s[w11, 2, vgx2], {z8.s, z9.s}, {z0.s, z1.s} // 11000001-10100000-01111001-00001010
// CHECK-INST: fmls za.s[w11, 2, vgx2], { z8.s, z9.s }, { z0.s, z1.s }
// CHECK-ENCODING: [0x0a,0x79,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -869,7 +869,7 @@ fmls za.s[w11, 2], {z8.s - z9.s}, {z0.s - z1.s} // 11000001-10100000-0111100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a0790a <unknown>
-fmls za.s[w9, 7, vgx2], {z12.s, z13.s}, {z10.s, z11.s} // 11000001, 10101010, 00111001, 10001111
+fmls za.s[w9, 7, vgx2], {z12.s, z13.s}, {z10.s, z11.s} // 11000001-10101010-00111001-10001111
// CHECK-INST: fmls za.s[w9, 7, vgx2], { z12.s, z13.s }, { z10.s, z11.s }
// CHECK-ENCODING: [0x8f,0x39,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
diff --git a/llvm/test/MC/AArch64/SME2/fmlsl.s b/llvm/test/MC/AArch64/SME2/fmlsl.s
index c2d0d4b7ff5fa..220e60b83dadd 100644
--- a/llvm/test/MC/AArch64/SME2/fmlsl.s
+++ b/llvm/test/MC/AArch64/SME2/fmlsl.s
@@ -158,436 +158,436 @@ fmlsl za.s[w9, 14:15], z12.h, z11.h[6] // 11000001-10001011-10111001-10001111
// CHECK-UNKNOWN: c18bb98f <unknown>
-fmlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h // 11000001, 00100000, 00001000, 00001000
-// CHECK, INST: fmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+fmlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h // 11000001-00100000-00001000-00001000
+// CHECK-INST: fmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x08,0x08,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200808 <unknown>
fmlsl za.s[w8, 0:1], {z0.h - z1.h}, z0.h // 11000001-00100000-00001000-00001000
-// CHECK, INST: fmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+// CHECK-INST: fmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x08,0x08,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200808 <unknown>
-fmlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h // 11000001, 00100101, 01001001, 01001001
-// CHECK, INST: fmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
+fmlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h // 11000001-00100101-01001001-01001001
+// CHECK-INST: fmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x49,0x49,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254949 <unknown>
fmlsl za.s[w10, 2:3], {z10.h - z11.h}, z5.h // 11000001-00100101-01001001-01001001
-// CHECK, INST: fmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
+// CHECK-INST: fmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x49,0x49,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254949 <unknown>
-fmlsl za.s[w11, 6:7, vgx2], {z13.h, z14.h}, z8.h // 11000001, 00101000, 01101001, 10101011
-// CHECK, INST: fmlsl za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
+fmlsl za.s[w11, 6:7, vgx2], {z13.h, z14.h}, z8.h // 11000001-00101000-01101001-10101011
+// CHECK-INST: fmlsl za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xab,0x69,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12869ab <unknown>
fmlsl za.s[w11, 6:7], {z13.h - z14.h}, z8.h // 11000001-00101000-01101001-10101011
-// CHECK, INST: fmlsl za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
+// CHECK-INST: fmlsl za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xab,0x69,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12869ab <unknown>
-fmlsl za.s[w11, 6:7, vgx2], {z31.h, z0.h}, z15.h // 11000001, 00101111, 01101011, 11101011
-// CHECK, INST: fmlsl za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
+fmlsl za.s[w11, 6:7, vgx2], {z31.h, z0.h}, z15.h // 11000001-00101111-01101011-11101011
+// CHECK-INST: fmlsl za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xeb,0x6b,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f6beb <unknown>
fmlsl za.s[w11, 6:7], {z31.h - z0.h}, z15.h // 11000001-00101111-01101011-11101011
-// CHECK, INST: fmlsl za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
+// CHECK-INST: fmlsl za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xeb,0x6b,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f6beb <unknown>
-fmlsl za.s[w8, 2:3, vgx2], {z17.h, z18.h}, z0.h // 11000001, 00100000, 00001010, 00101001
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
+fmlsl za.s[w8, 2:3, vgx2], {z17.h, z18.h}, z0.h // 11000001-00100000-00001010-00101001
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x29,0x0a,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200a29 <unknown>
fmlsl za.s[w8, 2:3], {z17.h - z18.h}, z0.h // 11000001-00100000-00001010-00101001
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x29,0x0a,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200a29 <unknown>
-fmlsl za.s[w8, 2:3, vgx2], {z1.h, z2.h}, z14.h // 11000001, 00101110, 00001000, 00101001
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
+fmlsl za.s[w8, 2:3, vgx2], {z1.h, z2.h}, z14.h // 11000001-00101110-00001000-00101001
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x29,0x08,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0829 <unknown>
fmlsl za.s[w8, 2:3], {z1.h - z2.h}, z14.h // 11000001-00101110-00001000-00101001
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x29,0x08,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0829 <unknown>
-fmlsl za.s[w10, 0:1, vgx2], {z19.h, z20.h}, z4.h // 11000001, 00100100, 01001010, 01101000
-// CHECK, INST: fmlsl za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
+fmlsl za.s[w10, 0:1, vgx2], {z19.h, z20.h}, z4.h // 11000001-00100100-01001010-01101000
+// CHECK-INST: fmlsl za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x68,0x4a,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244a68 <unknown>
fmlsl za.s[w10, 0:1], {z19.h - z20.h}, z4.h // 11000001-00100100-01001010-01101000
-// CHECK, INST: fmlsl za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
+// CHECK-INST: fmlsl za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x68,0x4a,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244a68 <unknown>
-fmlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h // 11000001, 00100010, 00001001, 10001000
-// CHECK, INST: fmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
+fmlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h // 11000001-00100010-00001001-10001000
+// CHECK-INST: fmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x88,0x09,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220988 <unknown>
fmlsl za.s[w8, 0:1], {z12.h - z13.h}, z2.h // 11000001-00100010-00001001-10001000
-// CHECK, INST: fmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
+// CHECK-INST: fmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x88,0x09,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220988 <unknown>
-fmlsl za.s[w10, 2:3, vgx2], {z1.h, z2.h}, z10.h // 11000001, 00101010, 01001000, 00101001
-// CHECK, INST: fmlsl za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
+fmlsl za.s[w10, 2:3, vgx2], {z1.h, z2.h}, z10.h // 11000001-00101010-01001000-00101001
+// CHECK-INST: fmlsl za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x29,0x48,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4829 <unknown>
fmlsl za.s[w10, 2:3], {z1.h - z2.h}, z10.h // 11000001-00101010-01001000-00101001
-// CHECK, INST: fmlsl za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
+// CHECK-INST: fmlsl za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x29,0x48,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4829 <unknown>
-fmlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h // 11000001, 00101110, 00001010, 11001001
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
+fmlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h // 11000001-00101110-00001010-11001001
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xc9,0x0a,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0ac9 <unknown>
fmlsl za.s[w8, 2:3], {z22.h - z23.h}, z14.h // 11000001-00101110-00001010-11001001
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xc9,0x0a,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0ac9 <unknown>
-fmlsl za.s[w11, 4:5, vgx2], {z9.h, z10.h}, z1.h // 11000001, 00100001, 01101001, 00101010
-// CHECK, INST: fmlsl za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
+fmlsl za.s[w11, 4:5, vgx2], {z9.h, z10.h}, z1.h // 11000001-00100001-01101001-00101010
+// CHECK-INST: fmlsl za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x2a,0x69,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c121692a <unknown>
fmlsl za.s[w11, 4:5], {z9.h - z10.h}, z1.h // 11000001-00100001-01101001-00101010
-// CHECK, INST: fmlsl za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
+// CHECK-INST: fmlsl za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x2a,0x69,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c121692a <unknown>
-fmlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h // 11000001, 00101011, 00101001, 10001011
-// CHECK, INST: fmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
+fmlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h // 11000001-00101011-00101001-10001011
+// CHECK-INST: fmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x8b,0x29,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b298b <unknown>
fmlsl za.s[w9, 6:7], {z12.h - z13.h}, z11.h // 11000001-00101011-00101001-10001011
-// CHECK, INST: fmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
+// CHECK-INST: fmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x8b,0x29,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b298b <unknown>
-fmlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001, 10010000, 00010000, 00001000
-// CHECK, INST: fmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
+fmlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001-10010000-00010000-00001000
+// CHECK-INST: fmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x08,0x10,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1901008 <unknown>
fmlsl za.s[w8, 0:1], {z0.h - z1.h}, z0.h[0] // 11000001-10010000-00010000-00001000
-// CHECK, INST: fmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
+// CHECK-INST: fmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x08,0x10,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1901008 <unknown>
-fmlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h[3] // 11000001, 10010101, 01010101, 01001101
-// CHECK, INST: fmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
+fmlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h[3] // 11000001-10010101-01010101-01001101
+// CHECK-INST: fmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
// CHECK-ENCODING: [0x4d,0x55,0x95,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c195554d <unknown>
fmlsl za.s[w10, 2:3], {z10.h - z11.h}, z5.h[3] // 11000001-10010101-01010101-01001101
-// CHECK, INST: fmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
+// CHECK-INST: fmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
// CHECK-ENCODING: [0x4d,0x55,0x95,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c195554d <unknown>
-fmlsl za.s[w11, 6:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001, 10011000, 01111101, 10001111
-// CHECK, INST: fmlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
+fmlsl za.s[w11, 6:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001-10011000-01111101-10001111
+// CHECK-INST: fmlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x8f,0x7d,0x98,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1987d8f <unknown>
fmlsl za.s[w11, 6:7], {z12.h - z13.h}, z8.h[7] // 11000001-10011000-01111101-10001111
-// CHECK, INST: fmlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
+// CHECK-INST: fmlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x8f,0x7d,0x98,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1987d8f <unknown>
-fmlsl za.s[w11, 6:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001, 10011111, 01111111, 11001111
-// CHECK, INST: fmlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
+fmlsl za.s[w11, 6:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001-10011111-01111111-11001111
+// CHECK-INST: fmlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xcf,0x7f,0x9f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19f7fcf <unknown>
fmlsl za.s[w11, 6:7], {z30.h - z31.h}, z15.h[7] // 11000001-10011111-01111111-11001111
-// CHECK, INST: fmlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
+// CHECK-INST: fmlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xcf,0x7f,0x9f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19f7fcf <unknown>
-fmlsl za.s[w8, 2:3, vgx2], {z16.h, z17.h}, z0.h[7] // 11000001, 10010000, 00011110, 00001101
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
+fmlsl za.s[w8, 2:3, vgx2], {z16.h, z17.h}, z0.h[7] // 11000001-10010000-00011110-00001101
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
// CHECK-ENCODING: [0x0d,0x1e,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1901e0d <unknown>
fmlsl za.s[w8, 2:3], {z16.h - z17.h}, z0.h[7] // 11000001-10010000-00011110-00001101
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
// CHECK-ENCODING: [0x0d,0x1e,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1901e0d <unknown>
-fmlsl za.s[w8, 2:3, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001, 10011110, 00010100, 00001001
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
+fmlsl za.s[w8, 2:3, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001-10011110-00010100-00001001
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x09,0x14,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e1409 <unknown>
fmlsl za.s[w8, 2:3], {z0.h - z1.h}, z14.h[2] // 11000001-10011110-00010100-00001001
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x09,0x14,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e1409 <unknown>
-fmlsl za.s[w10, 0:1, vgx2], {z18.h, z19.h}, z4.h[2] // 11000001, 10010100, 01010110, 01001000
-// CHECK, INST: fmlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
+fmlsl za.s[w10, 0:1, vgx2], {z18.h, z19.h}, z4.h[2] // 11000001-10010100-01010110-01001000
+// CHECK-INST: fmlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
// CHECK-ENCODING: [0x48,0x56,0x94,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1945648 <unknown>
fmlsl za.s[w10, 0:1], {z18.h - z19.h}, z4.h[2] // 11000001-10010100-01010110-01001000
-// CHECK, INST: fmlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
+// CHECK-INST: fmlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
// CHECK-ENCODING: [0x48,0x56,0x94,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1945648 <unknown>
-fmlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001, 10010010, 00011001, 10001000
-// CHECK, INST: fmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
+fmlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001-10010010-00011001-10001000
+// CHECK-INST: fmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0x88,0x19,0x92,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1921988 <unknown>
fmlsl za.s[w8, 0:1], {z12.h - z13.h}, z2.h[4] // 11000001-10010010-00011001-10001000
-// CHECK, INST: fmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
+// CHECK-INST: fmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0x88,0x19,0x92,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1921988 <unknown>
-fmlsl za.s[w10, 2:3, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001, 10011010, 01011000, 00001001
-// CHECK, INST: fmlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
+fmlsl za.s[w10, 2:3, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001-10011010-01011000-00001001
+// CHECK-INST: fmlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x09,0x58,0x9a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19a5809 <unknown>
fmlsl za.s[w10, 2:3], {z0.h - z1.h}, z10.h[4] // 11000001-10011010-01011000-00001001
-// CHECK, INST: fmlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
+// CHECK-INST: fmlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x09,0x58,0x9a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19a5809 <unknown>
-fmlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001, 10011110, 00011010, 11001101
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
+fmlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001-10011110-00011010-11001101
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xcd,0x1a,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e1acd <unknown>
fmlsl za.s[w8, 2:3], {z22.h - z23.h}, z14.h[5] // 11000001-10011110-00011010-11001101
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xcd,0x1a,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e1acd <unknown>
-fmlsl za.s[w11, 4:5, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001, 10010001, 01110101, 00001010
-// CHECK, INST: fmlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
+fmlsl za.s[w11, 4:5, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001-10010001-01110101-00001010
+// CHECK-INST: fmlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x0a,0x75,0x91,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c191750a <unknown>
fmlsl za.s[w11, 4:5], {z8.h - z9.h}, z1.h[2] // 11000001-10010001-01110101-00001010
-// CHECK, INST: fmlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
+// CHECK-INST: fmlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x0a,0x75,0x91,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c191750a <unknown>
-fmlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h[5] // 11000001, 10011011, 00111001, 10001111
-// CHECK, INST: fmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
+fmlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h[5] // 11000001-10011011-00111001-10001111
+// CHECK-INST: fmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
// CHECK-ENCODING: [0x8f,0x39,0x9b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19b398f <unknown>
fmlsl za.s[w9, 6:7], {z12.h - z13.h}, z11.h[5] // 11000001-10011011-00111001-10001111
-// CHECK, INST: fmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
+// CHECK-INST: fmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
// CHECK-ENCODING: [0x8f,0x39,0x9b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19b398f <unknown>
-fmlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001, 10100000, 00001000, 00001000
-// CHECK, INST: fmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+fmlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001-10100000-00001000-00001000
+// CHECK-INST: fmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x08,0x08,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00808 <unknown>
fmlsl za.s[w8, 0:1], {z0.h - z1.h}, {z0.h - z1.h} // 11000001-10100000-00001000-00001000
-// CHECK, INST: fmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+// CHECK-INST: fmlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x08,0x08,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00808 <unknown>
-fmlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001, 10110100, 01001001, 01001001
-// CHECK, INST: fmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+fmlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001-10110100-01001001-01001001
+// CHECK-INST: fmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x49,0x49,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44949 <unknown>
fmlsl za.s[w10, 2:3], {z10.h - z11.h}, {z20.h - z21.h} // 11000001-10110100-01001001-01001001
-// CHECK, INST: fmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+// CHECK-INST: fmlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x49,0x49,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44949 <unknown>
-fmlsl za.s[w11, 6:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001, 10101000, 01101001, 10001011
-// CHECK, INST: fmlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+fmlsl za.s[w11, 6:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001-10101000-01101001-10001011
+// CHECK-INST: fmlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x8b,0x69,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a8698b <unknown>
fmlsl za.s[w11, 6:7], {z12.h - z13.h}, {z8.h - z9.h} // 11000001-10101000-01101001-10001011
-// CHECK, INST: fmlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+// CHECK-INST: fmlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x8b,0x69,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a8698b <unknown>
-fmlsl za.s[w11, 6:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001, 10111110, 01101011, 11001011
-// CHECK, INST: fmlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+fmlsl za.s[w11, 6:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001-10111110-01101011-11001011
+// CHECK-INST: fmlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xcb,0x6b,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be6bcb <unknown>
fmlsl za.s[w11, 6:7], {z30.h - z31.h}, {z30.h - z31.h} // 11000001-10111110-01101011-11001011
-// CHECK, INST: fmlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+// CHECK-INST: fmlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xcb,0x6b,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be6bcb <unknown>
-fmlsl za.s[w8, 2:3, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001, 10110000, 00001010, 00001001
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+fmlsl za.s[w8, 2:3, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001-10110000-00001010-00001001
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x09,0x0a,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00a09 <unknown>
fmlsl za.s[w8, 2:3], {z16.h - z17.h}, {z16.h - z17.h} // 11000001-10110000-00001010-00001001
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x09,0x0a,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00a09 <unknown>
-fmlsl za.s[w8, 2:3, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001, 10111110, 00001000, 00001001
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+fmlsl za.s[w8, 2:3, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001-10111110-00001000-00001001
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x09,0x08,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0809 <unknown>
fmlsl za.s[w8, 2:3], {z0.h - z1.h}, {z30.h - z31.h} // 11000001-10111110-00001000-00001001
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x09,0x08,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0809 <unknown>
-fmlsl za.s[w10, 0:1, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001, 10110100, 01001010, 01001000
-// CHECK, INST: fmlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+fmlsl za.s[w10, 0:1, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001-10110100-01001010-01001000
+// CHECK-INST: fmlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x48,0x4a,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44a48 <unknown>
fmlsl za.s[w10, 0:1], {z18.h - z19.h}, {z20.h - z21.h} // 11000001-10110100-01001010-01001000
-// CHECK, INST: fmlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+// CHECK-INST: fmlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x48,0x4a,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44a48 <unknown>
-fmlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001, 10100010, 00001001, 10001000
-// CHECK, INST: fmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+fmlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001-10100010-00001001-10001000
+// CHECK-INST: fmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x88,0x09,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20988 <unknown>
fmlsl za.s[w8, 0:1], {z12.h - z13.h}, {z2.h - z3.h} // 11000001-10100010-00001001-10001000
-// CHECK, INST: fmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+// CHECK-INST: fmlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x88,0x09,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20988 <unknown>
-fmlsl za.s[w10, 2:3, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001, 10111010, 01001000, 00001001
-// CHECK, INST: fmlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+fmlsl za.s[w10, 2:3, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001-10111010-01001000-00001001
+// CHECK-INST: fmlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x09,0x48,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4809 <unknown>
fmlsl za.s[w10, 2:3], {z0.h - z1.h}, {z26.h - z27.h} // 11000001-10111010-01001000-00001001
-// CHECK, INST: fmlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+// CHECK-INST: fmlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x09,0x48,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4809 <unknown>
-fmlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001, 10111110, 00001010, 11001001
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+fmlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001-10111110-00001010-11001001
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc9,0x0a,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0ac9 <unknown>
fmlsl za.s[w8, 2:3], {z22.h - z23.h}, {z30.h - z31.h} // 11000001-10111110-00001010-11001001
-// CHECK, INST: fmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+// CHECK-INST: fmlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc9,0x0a,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0ac9 <unknown>
-fmlsl za.s[w11, 4:5, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001, 10100000, 01101001, 00001010
-// CHECK, INST: fmlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+fmlsl za.s[w11, 4:5, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001-10100000-01101001-00001010
+// CHECK-INST: fmlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x0a,0x69,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a0690a <unknown>
fmlsl za.s[w11, 4:5], {z8.h - z9.h}, {z0.h - z1.h} // 11000001-10100000-01101001-00001010
-// CHECK, INST: fmlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+// CHECK-INST: fmlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x0a,0x69,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a0690a <unknown>
-fmlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001, 10101010, 00101001, 10001011
-// CHECK, INST: fmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+fmlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001-10101010-00101001-10001011
+// CHECK-INST: fmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x8b,0x29,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa298b <unknown>
fmlsl za.s[w9, 6:7], {z12.h - z13.h}, {z10.h - z11.h} // 11000001-10101010-00101001-10001011
-// CHECK, INST: fmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+// CHECK-INST: fmlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x8b,0x29,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa298b <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/smlal.s b/llvm/test/MC/AArch64/SME2/smlal.s
index 2c614147831b5..e173f5cdbb76e 100644
--- a/llvm/test/MC/AArch64/SME2/smlal.s
+++ b/llvm/test/MC/AArch64/SME2/smlal.s
@@ -158,436 +158,436 @@ smlal za.s[w9, 14:15], z12.h, z11.h[6] // 11000001-11001011-10111001-10000111
// CHECK-UNKNOWN: c1cbb987 <unknown>
-smlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h // 11000001, 01100000, 00001000, 00000000
-// CHECK, INST: smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+smlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h // 11000001-01100000-00001000-00000000
+// CHECK-INST: smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x00,0x08,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600800 <unknown>
smlal za.s[w8, 0:1], {z0.h - z1.h}, z0.h // 11000001-01100000-00001000-00000000
-// CHECK, INST: smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+// CHECK-INST: smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x00,0x08,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600800 <unknown>
-smlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h // 11000001, 01100101, 01001001, 01000001
-// CHECK, INST: smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
+smlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h // 11000001-01100101-01001001-01000001
+// CHECK-INST: smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x41,0x49,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1654941 <unknown>
smlal za.s[w10, 2:3], {z10.h - z11.h}, z5.h // 11000001-01100101-01001001-01000001
-// CHECK, INST: smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
+// CHECK-INST: smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x41,0x49,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1654941 <unknown>
-smlal za.s[w11, 6:7, vgx2], {z13.h, z14.h}, z8.h // 11000001, 01101000, 01101001, 10100011
-// CHECK, INST: smlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
+smlal za.s[w11, 6:7, vgx2], {z13.h, z14.h}, z8.h // 11000001-01101000-01101001-10100011
+// CHECK-INST: smlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xa3,0x69,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16869a3 <unknown>
smlal za.s[w11, 6:7], {z13.h - z14.h}, z8.h // 11000001-01101000-01101001-10100011
-// CHECK, INST: smlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
+// CHECK-INST: smlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xa3,0x69,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16869a3 <unknown>
-smlal za.s[w11, 6:7, vgx2], {z31.h, z0.h}, z15.h // 11000001, 01101111, 01101011, 11100011
-// CHECK, INST: smlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
+smlal za.s[w11, 6:7, vgx2], {z31.h, z0.h}, z15.h // 11000001-01101111-01101011-11100011
+// CHECK-INST: smlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xe3,0x6b,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f6be3 <unknown>
smlal za.s[w11, 6:7], {z31.h - z0.h}, z15.h // 11000001-01101111-01101011-11100011
-// CHECK, INST: smlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
+// CHECK-INST: smlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xe3,0x6b,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f6be3 <unknown>
-smlal za.s[w8, 2:3, vgx2], {z17.h, z18.h}, z0.h // 11000001, 01100000, 00001010, 00100001
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
+smlal za.s[w8, 2:3, vgx2], {z17.h, z18.h}, z0.h // 11000001-01100000-00001010-00100001
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x21,0x0a,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600a21 <unknown>
smlal za.s[w8, 2:3], {z17.h - z18.h}, z0.h // 11000001-01100000-00001010-00100001
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x21,0x0a,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600a21 <unknown>
-smlal za.s[w8, 2:3, vgx2], {z1.h, z2.h}, z14.h // 11000001, 01101110, 00001000, 00100001
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
+smlal za.s[w8, 2:3, vgx2], {z1.h, z2.h}, z14.h // 11000001-01101110-00001000-00100001
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x21,0x08,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0821 <unknown>
smlal za.s[w8, 2:3], {z1.h - z2.h}, z14.h // 11000001-01101110-00001000-00100001
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x21,0x08,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0821 <unknown>
-smlal za.s[w10, 0:1, vgx2], {z19.h, z20.h}, z4.h // 11000001, 01100100, 01001010, 01100000
-// CHECK, INST: smlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
+smlal za.s[w10, 0:1, vgx2], {z19.h, z20.h}, z4.h // 11000001-01100100-01001010-01100000
+// CHECK-INST: smlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x60,0x4a,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1644a60 <unknown>
smlal za.s[w10, 0:1], {z19.h - z20.h}, z4.h // 11000001-01100100-01001010-01100000
-// CHECK, INST: smlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
+// CHECK-INST: smlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x60,0x4a,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1644a60 <unknown>
-smlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h // 11000001, 01100010, 00001001, 10000000
-// CHECK, INST: smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
+smlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h // 11000001-01100010-00001001-10000000
+// CHECK-INST: smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x80,0x09,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1620980 <unknown>
smlal za.s[w8, 0:1], {z12.h - z13.h}, z2.h // 11000001-01100010-00001001-10000000
-// CHECK, INST: smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
+// CHECK-INST: smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x80,0x09,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1620980 <unknown>
-smlal za.s[w10, 2:3, vgx2], {z1.h, z2.h}, z10.h // 11000001, 01101010, 01001000, 00100001
-// CHECK, INST: smlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
+smlal za.s[w10, 2:3, vgx2], {z1.h, z2.h}, z10.h // 11000001-01101010-01001000-00100001
+// CHECK-INST: smlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x21,0x48,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a4821 <unknown>
smlal za.s[w10, 2:3], {z1.h - z2.h}, z10.h // 11000001-01101010-01001000-00100001
-// CHECK, INST: smlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
+// CHECK-INST: smlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x21,0x48,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a4821 <unknown>
-smlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h // 11000001, 01101110, 00001010, 11000001
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
+smlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h // 11000001-01101110-00001010-11000001
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xc1,0x0a,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0ac1 <unknown>
smlal za.s[w8, 2:3], {z22.h - z23.h}, z14.h // 11000001-01101110-00001010-11000001
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xc1,0x0a,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0ac1 <unknown>
-smlal za.s[w11, 4:5, vgx2], {z9.h, z10.h}, z1.h // 11000001, 01100001, 01101001, 00100010
-// CHECK, INST: smlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
+smlal za.s[w11, 4:5, vgx2], {z9.h, z10.h}, z1.h // 11000001-01100001-01101001-00100010
+// CHECK-INST: smlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x22,0x69,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1616922 <unknown>
smlal za.s[w11, 4:5], {z9.h - z10.h}, z1.h // 11000001-01100001-01101001-00100010
-// CHECK, INST: smlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
+// CHECK-INST: smlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x22,0x69,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1616922 <unknown>
-smlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h // 11000001, 01101011, 00101001, 10000011
-// CHECK, INST: smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
+smlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h // 11000001-01101011-00101001-10000011
+// CHECK-INST: smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x83,0x29,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16b2983 <unknown>
smlal za.s[w9, 6:7], {z12.h - z13.h}, z11.h // 11000001-01101011-00101001-10000011
-// CHECK, INST: smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
+// CHECK-INST: smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x83,0x29,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16b2983 <unknown>
-smlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001, 11010000, 00010000, 00000000
-// CHECK, INST: smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
+smlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001-11010000-00010000-00000000
+// CHECK-INST: smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x00,0x10,0xd0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d01000 <unknown>
smlal za.s[w8, 0:1], {z0.h - z1.h}, z0.h[0] // 11000001-11010000-00010000-00000000
-// CHECK, INST: smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
+// CHECK-INST: smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x00,0x10,0xd0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d01000 <unknown>
-smlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h[3] // 11000001, 11010101, 01010101, 01000101
-// CHECK, INST: smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
+smlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h[3] // 11000001-11010101-01010101-01000101
+// CHECK-INST: smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
// CHECK-ENCODING: [0x45,0x55,0xd5,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d55545 <unknown>
smlal za.s[w10, 2:3], {z10.h - z11.h}, z5.h[3] // 11000001-11010101-01010101-01000101
-// CHECK, INST: smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
+// CHECK-INST: smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
// CHECK-ENCODING: [0x45,0x55,0xd5,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d55545 <unknown>
-smlal za.s[w11, 6:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001, 11011000, 01111101, 10000111
-// CHECK, INST: smlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
+smlal za.s[w11, 6:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001-11011000-01111101-10000111
+// CHECK-INST: smlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x87,0x7d,0xd8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d87d87 <unknown>
smlal za.s[w11, 6:7], {z12.h - z13.h}, z8.h[7] // 11000001-11011000-01111101-10000111
-// CHECK, INST: smlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
+// CHECK-INST: smlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x87,0x7d,0xd8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d87d87 <unknown>
-smlal za.s[w11, 6:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001, 11011111, 01111111, 11000111
-// CHECK, INST: smlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
+smlal za.s[w11, 6:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001-11011111-01111111-11000111
+// CHECK-INST: smlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xc7,0x7f,0xdf,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1df7fc7 <unknown>
smlal za.s[w11, 6:7], {z30.h - z31.h}, z15.h[7] // 11000001-11011111-01111111-11000111
-// CHECK, INST: smlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
+// CHECK-INST: smlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xc7,0x7f,0xdf,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1df7fc7 <unknown>
-smlal za.s[w8, 2:3, vgx2], {z16.h, z17.h}, z0.h[7] // 11000001, 11010000, 00011110, 00000101
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
+smlal za.s[w8, 2:3, vgx2], {z16.h, z17.h}, z0.h[7] // 11000001-11010000-00011110-00000101
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
// CHECK-ENCODING: [0x05,0x1e,0xd0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d01e05 <unknown>
smlal za.s[w8, 2:3], {z16.h - z17.h}, z0.h[7] // 11000001-11010000-00011110-00000101
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
// CHECK-ENCODING: [0x05,0x1e,0xd0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d01e05 <unknown>
-smlal za.s[w8, 2:3, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001, 11011110, 00010100, 00000001
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
+smlal za.s[w8, 2:3, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001-11011110-00010100-00000001
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x01,0x14,0xde,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1de1401 <unknown>
smlal za.s[w8, 2:3], {z0.h - z1.h}, z14.h[2] // 11000001-11011110-00010100-00000001
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x01,0x14,0xde,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1de1401 <unknown>
-smlal za.s[w10, 0:1, vgx2], {z18.h, z19.h}, z4.h[2] // 11000001, 11010100, 01010110, 01000000
-// CHECK, INST: smlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
+smlal za.s[w10, 0:1, vgx2], {z18.h, z19.h}, z4.h[2] // 11000001-11010100-01010110-01000000
+// CHECK-INST: smlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
// CHECK-ENCODING: [0x40,0x56,0xd4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d45640 <unknown>
smlal za.s[w10, 0:1], {z18.h - z19.h}, z4.h[2] // 11000001-11010100-01010110-01000000
-// CHECK, INST: smlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
+// CHECK-INST: smlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
// CHECK-ENCODING: [0x40,0x56,0xd4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d45640 <unknown>
-smlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001, 11010010, 00011001, 10000000
-// CHECK, INST: smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
+smlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001-11010010-00011001-10000000
+// CHECK-INST: smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0x80,0x19,0xd2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d21980 <unknown>
smlal za.s[w8, 0:1], {z12.h - z13.h}, z2.h[4] // 11000001-11010010-00011001-10000000
-// CHECK, INST: smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
+// CHECK-INST: smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0x80,0x19,0xd2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d21980 <unknown>
-smlal za.s[w10, 2:3, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001, 11011010, 01011000, 00000001
-// CHECK, INST: smlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
+smlal za.s[w10, 2:3, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001-11011010-01011000-00000001
+// CHECK-INST: smlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x01,0x58,0xda,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1da5801 <unknown>
smlal za.s[w10, 2:3], {z0.h - z1.h}, z10.h[4] // 11000001-11011010-01011000-00000001
-// CHECK, INST: smlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
+// CHECK-INST: smlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x01,0x58,0xda,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1da5801 <unknown>
-smlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001, 11011110, 00011010, 11000101
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
+smlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001-11011110-00011010-11000101
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xc5,0x1a,0xde,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1de1ac5 <unknown>
smlal za.s[w8, 2:3], {z22.h - z23.h}, z14.h[5] // 11000001-11011110-00011010-11000101
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xc5,0x1a,0xde,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1de1ac5 <unknown>
-smlal za.s[w11, 4:5, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001, 11010001, 01110101, 00000010
-// CHECK, INST: smlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
+smlal za.s[w11, 4:5, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001-11010001-01110101-00000010
+// CHECK-INST: smlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x02,0x75,0xd1,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d17502 <unknown>
smlal za.s[w11, 4:5], {z8.h - z9.h}, z1.h[2] // 11000001-11010001-01110101-00000010
-// CHECK, INST: smlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
+// CHECK-INST: smlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x02,0x75,0xd1,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d17502 <unknown>
-smlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h[5] // 11000001, 11011011, 00111001, 10000111
-// CHECK, INST: smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
+smlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h[5] // 11000001-11011011-00111001-10000111
+// CHECK-INST: smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
// CHECK-ENCODING: [0x87,0x39,0xdb,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1db3987 <unknown>
smlal za.s[w9, 6:7], {z12.h - z13.h}, z11.h[5] // 11000001-11011011-00111001-10000111
-// CHECK, INST: smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
+// CHECK-INST: smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
// CHECK-ENCODING: [0x87,0x39,0xdb,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1db3987 <unknown>
-smlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001, 11100000, 00001000, 00000000
-// CHECK, INST: smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+smlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001-11100000-00001000-00000000
+// CHECK-INST: smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x00,0x08,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e00800 <unknown>
smlal za.s[w8, 0:1], {z0.h - z1.h}, {z0.h - z1.h} // 11000001-11100000-00001000-00000000
-// CHECK, INST: smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+// CHECK-INST: smlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x00,0x08,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e00800 <unknown>
-smlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001, 11110100, 01001001, 01000001
-// CHECK, INST: smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+smlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001-11110100-01001001-01000001
+// CHECK-INST: smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x41,0x49,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44941 <unknown>
smlal za.s[w10, 2:3], {z10.h - z11.h}, {z20.h - z21.h} // 11000001-11110100-01001001-01000001
-// CHECK, INST: smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+// CHECK-INST: smlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x41,0x49,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44941 <unknown>
-smlal za.s[w11, 6:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001, 11101000, 01101001, 10000011
-// CHECK, INST: smlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+smlal za.s[w11, 6:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001-11101000-01101001-10000011
+// CHECK-INST: smlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x83,0x69,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e86983 <unknown>
smlal za.s[w11, 6:7], {z12.h - z13.h}, {z8.h - z9.h} // 11000001-11101000-01101001-10000011
-// CHECK, INST: smlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+// CHECK-INST: smlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x83,0x69,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e86983 <unknown>
-smlal za.s[w11, 6:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001, 11111110, 01101011, 11000011
-// CHECK, INST: smlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+smlal za.s[w11, 6:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001-11111110-01101011-11000011
+// CHECK-INST: smlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc3,0x6b,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe6bc3 <unknown>
smlal za.s[w11, 6:7], {z30.h - z31.h}, {z30.h - z31.h} // 11000001-11111110-01101011-11000011
-// CHECK, INST: smlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+// CHECK-INST: smlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc3,0x6b,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe6bc3 <unknown>
-smlal za.s[w8, 2:3, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001, 11110000, 00001010, 00000001
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+smlal za.s[w8, 2:3, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001-11110000-00001010-00000001
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x01,0x0a,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f00a01 <unknown>
smlal za.s[w8, 2:3], {z16.h - z17.h}, {z16.h - z17.h} // 11000001-11110000-00001010-00000001
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x01,0x0a,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f00a01 <unknown>
-smlal za.s[w8, 2:3, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001, 11111110, 00001000, 00000001
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+smlal za.s[w8, 2:3, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001-11111110-00001000-00000001
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x01,0x08,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0801 <unknown>
smlal za.s[w8, 2:3], {z0.h - z1.h}, {z30.h - z31.h} // 11000001-11111110-00001000-00000001
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x01,0x08,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0801 <unknown>
-smlal za.s[w10, 0:1, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001, 11110100, 01001010, 01000000
-// CHECK, INST: smlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+smlal za.s[w10, 0:1, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001-11110100-01001010-01000000
+// CHECK-INST: smlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x40,0x4a,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44a40 <unknown>
smlal za.s[w10, 0:1], {z18.h - z19.h}, {z20.h - z21.h} // 11000001-11110100-01001010-01000000
-// CHECK, INST: smlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+// CHECK-INST: smlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x40,0x4a,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44a40 <unknown>
-smlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001, 11100010, 00001001, 10000000
-// CHECK, INST: smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+smlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001-11100010-00001001-10000000
+// CHECK-INST: smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x80,0x09,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e20980 <unknown>
smlal za.s[w8, 0:1], {z12.h - z13.h}, {z2.h - z3.h} // 11000001-11100010-00001001-10000000
-// CHECK, INST: smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+// CHECK-INST: smlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x80,0x09,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e20980 <unknown>
-smlal za.s[w10, 2:3, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001, 11111010, 01001000, 00000001
-// CHECK, INST: smlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+smlal za.s[w10, 2:3, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001-11111010-01001000-00000001
+// CHECK-INST: smlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x01,0x48,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa4801 <unknown>
smlal za.s[w10, 2:3], {z0.h - z1.h}, {z26.h - z27.h} // 11000001-11111010-01001000-00000001
-// CHECK, INST: smlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+// CHECK-INST: smlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x01,0x48,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa4801 <unknown>
-smlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001, 11111110, 00001010, 11000001
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+smlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001-11111110-00001010-11000001
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc1,0x0a,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0ac1 <unknown>
smlal za.s[w8, 2:3], {z22.h - z23.h}, {z30.h - z31.h} // 11000001-11111110-00001010-11000001
-// CHECK, INST: smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+// CHECK-INST: smlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc1,0x0a,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0ac1 <unknown>
-smlal za.s[w11, 4:5, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001, 11100000, 01101001, 00000010
-// CHECK, INST: smlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+smlal za.s[w11, 4:5, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001-11100000-01101001-00000010
+// CHECK-INST: smlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x02,0x69,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e06902 <unknown>
smlal za.s[w11, 4:5], {z8.h - z9.h}, {z0.h - z1.h} // 11000001-11100000-01101001-00000010
-// CHECK, INST: smlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+// CHECK-INST: smlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x02,0x69,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e06902 <unknown>
-smlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001, 11101010, 00101001, 10000011
-// CHECK, INST: smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+smlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001-11101010-00101001-10000011
+// CHECK-INST: smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x83,0x29,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ea2983 <unknown>
smlal za.s[w9, 6:7], {z12.h - z13.h}, {z10.h - z11.h} // 11000001-11101010-00101001-10000011
-// CHECK, INST: smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+// CHECK-INST: smlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x83,0x29,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ea2983 <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/smlall.s b/llvm/test/MC/AArch64/SME2/smlall.s
index 3a5dd7cc9a412..5d0789a04f3b7 100644
--- a/llvm/test/MC/AArch64/SME2/smlall.s
+++ b/llvm/test/MC/AArch64/SME2/smlall.s
@@ -304,871 +304,871 @@ smlall za.d[w9, 12:15], z12.h, z11.h[6] // 11000001-10001011-10101001-10000011
// CHECK-UNKNOWN: c18ba983 <unknown>
-smlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b // 11000001, 00100000, 00000000, 00000000
-// CHECK, INST: smlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
+smlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b // 11000001-00100000-00000000-00000000
+// CHECK-INST: smlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
// CHECK-ENCODING: [0x00,0x00,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200000 <unknown>
smlall za.s[w8, 0:3], {z0.b - z1.b}, z0.b // 11000001-00100000-00000000-00000000
-// CHECK, INST: smlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
+// CHECK-INST: smlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
// CHECK-ENCODING: [0x00,0x00,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200000 <unknown>
-smlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b // 11000001, 00100101, 01000001, 01000001
-// CHECK, INST: smlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
+smlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b // 11000001-00100101-01000001-01000001
+// CHECK-INST: smlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
// CHECK-ENCODING: [0x41,0x41,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254141 <unknown>
smlall za.s[w10, 4:7], {z10.b - z11.b}, z5.b // 11000001-00100101-01000001-01000001
-// CHECK, INST: smlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
+// CHECK-INST: smlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
// CHECK-ENCODING: [0x41,0x41,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254141 <unknown>
-smlall za.s[w11, 4:7, vgx2], {z13.b, z14.b}, z8.b // 11000001, 00101000, 01100001, 10100001
-// CHECK, INST: smlall za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
+smlall za.s[w11, 4:7, vgx2], {z13.b, z14.b}, z8.b // 11000001-00101000-01100001-10100001
+// CHECK-INST: smlall za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
// CHECK-ENCODING: [0xa1,0x61,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12861a1 <unknown>
smlall za.s[w11, 4:7], {z13.b - z14.b}, z8.b // 11000001-00101000-01100001-10100001
-// CHECK, INST: smlall za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
+// CHECK-INST: smlall za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
// CHECK-ENCODING: [0xa1,0x61,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12861a1 <unknown>
-smlall za.s[w11, 4:7, vgx2], {z31.b, z0.b}, z15.b // 11000001, 00101111, 01100011, 11100001
-// CHECK, INST: smlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
+smlall za.s[w11, 4:7, vgx2], {z31.b, z0.b}, z15.b // 11000001-00101111-01100011-11100001
+// CHECK-INST: smlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
// CHECK-ENCODING: [0xe1,0x63,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f63e1 <unknown>
smlall za.s[w11, 4:7], {z31.b - z0.b}, z15.b // 11000001-00101111-01100011-11100001
-// CHECK, INST: smlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
+// CHECK-INST: smlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
// CHECK-ENCODING: [0xe1,0x63,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f63e1 <unknown>
-smlall za.s[w8, 4:7, vgx2], {z17.b, z18.b}, z0.b // 11000001, 00100000, 00000010, 00100001
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
+smlall za.s[w8, 4:7, vgx2], {z17.b, z18.b}, z0.b // 11000001-00100000-00000010-00100001
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
// CHECK-ENCODING: [0x21,0x02,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200221 <unknown>
smlall za.s[w8, 4:7], {z17.b - z18.b}, z0.b // 11000001-00100000-00000010-00100001
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
// CHECK-ENCODING: [0x21,0x02,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200221 <unknown>
-smlall za.s[w8, 4:7, vgx2], {z1.b, z2.b}, z14.b // 11000001, 00101110, 00000000, 00100001
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
+smlall za.s[w8, 4:7, vgx2], {z1.b, z2.b}, z14.b // 11000001-00101110-00000000-00100001
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
// CHECK-ENCODING: [0x21,0x00,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0021 <unknown>
smlall za.s[w8, 4:7], {z1.b - z2.b}, z14.b // 11000001-00101110-00000000-00100001
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
// CHECK-ENCODING: [0x21,0x00,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0021 <unknown>
-smlall za.s[w10, 0:3, vgx2], {z19.b, z20.b}, z4.b // 11000001, 00100100, 01000010, 01100000
-// CHECK, INST: smlall za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
+smlall za.s[w10, 0:3, vgx2], {z19.b, z20.b}, z4.b // 11000001-00100100-01000010-01100000
+// CHECK-INST: smlall za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
// CHECK-ENCODING: [0x60,0x42,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244260 <unknown>
smlall za.s[w10, 0:3], {z19.b - z20.b}, z4.b // 11000001-00100100-01000010-01100000
-// CHECK, INST: smlall za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
+// CHECK-INST: smlall za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
// CHECK-ENCODING: [0x60,0x42,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244260 <unknown>
-smlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b // 11000001, 00100010, 00000001, 10000000
-// CHECK, INST: smlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
+smlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b // 11000001-00100010-00000001-10000000
+// CHECK-INST: smlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
// CHECK-ENCODING: [0x80,0x01,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220180 <unknown>
smlall za.s[w8, 0:3], {z12.b - z13.b}, z2.b // 11000001-00100010-00000001-10000000
-// CHECK, INST: smlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
+// CHECK-INST: smlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
// CHECK-ENCODING: [0x80,0x01,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220180 <unknown>
-smlall za.s[w10, 4:7, vgx2], {z1.b, z2.b}, z10.b // 11000001, 00101010, 01000000, 00100001
-// CHECK, INST: smlall za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
+smlall za.s[w10, 4:7, vgx2], {z1.b, z2.b}, z10.b // 11000001-00101010-01000000-00100001
+// CHECK-INST: smlall za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
// CHECK-ENCODING: [0x21,0x40,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4021 <unknown>
smlall za.s[w10, 4:7], {z1.b - z2.b}, z10.b // 11000001-00101010-01000000-00100001
-// CHECK, INST: smlall za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
+// CHECK-INST: smlall za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
// CHECK-ENCODING: [0x21,0x40,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4021 <unknown>
-smlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b // 11000001, 00101110, 00000010, 11000001
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
+smlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b // 11000001-00101110-00000010-11000001
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
// CHECK-ENCODING: [0xc1,0x02,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e02c1 <unknown>
smlall za.s[w8, 4:7], {z22.b - z23.b}, z14.b // 11000001-00101110-00000010-11000001
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
// CHECK-ENCODING: [0xc1,0x02,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e02c1 <unknown>
-smlall za.s[w11, 0:3, vgx2], {z9.b, z10.b}, z1.b // 11000001, 00100001, 01100001, 00100000
-// CHECK, INST: smlall za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
+smlall za.s[w11, 0:3, vgx2], {z9.b, z10.b}, z1.b // 11000001-00100001-01100001-00100000
+// CHECK-INST: smlall za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
// CHECK-ENCODING: [0x20,0x61,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1216120 <unknown>
smlall za.s[w11, 0:3], {z9.b - z10.b}, z1.b // 11000001-00100001-01100001-00100000
-// CHECK, INST: smlall za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
+// CHECK-INST: smlall za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
// CHECK-ENCODING: [0x20,0x61,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1216120 <unknown>
-smlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b // 11000001, 00101011, 00100001, 10000001
-// CHECK, INST: smlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
+smlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b // 11000001-00101011-00100001-10000001
+// CHECK-INST: smlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
// CHECK-ENCODING: [0x81,0x21,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b2181 <unknown>
smlall za.s[w9, 4:7], {z12.b - z13.b}, z11.b // 11000001-00101011-00100001-10000001
-// CHECK, INST: smlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
+// CHECK-INST: smlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
// CHECK-ENCODING: [0x81,0x21,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b2181 <unknown>
-smlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b[0] // 11000001, 00010000, 00000000, 00000000
-// CHECK, INST: smlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
+smlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b[0] // 11000001-00010000-00000000-00000000
+// CHECK-INST: smlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
// CHECK-ENCODING: [0x00,0x00,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100000 <unknown>
smlall za.s[w8, 0:3], {z0.b - z1.b}, z0.b[0] // 11000001-00010000-00000000-00000000
-// CHECK, INST: smlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
+// CHECK-INST: smlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
// CHECK-ENCODING: [0x00,0x00,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100000 <unknown>
-smlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b[6] // 11000001, 00010101, 01000101, 01000101
-// CHECK, INST: smlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
+smlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b[6] // 11000001-00010101-01000101-01000101
+// CHECK-INST: smlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
// CHECK-ENCODING: [0x45,0x45,0x15,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1154545 <unknown>
smlall za.s[w10, 4:7], {z10.b - z11.b}, z5.b[6] // 11000001-00010101-01000101-01000101
-// CHECK, INST: smlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
+// CHECK-INST: smlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
// CHECK-ENCODING: [0x45,0x45,0x15,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1154545 <unknown>
-smlall za.s[w11, 4:7, vgx2], {z12.b, z13.b}, z8.b[15] // 11000001, 00011000, 01101101, 10000111
-// CHECK, INST: smlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
+smlall za.s[w11, 4:7, vgx2], {z12.b, z13.b}, z8.b[15] // 11000001-00011000-01101101-10000111
+// CHECK-INST: smlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
// CHECK-ENCODING: [0x87,0x6d,0x18,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1186d87 <unknown>
smlall za.s[w11, 4:7], {z12.b - z13.b}, z8.b[15] // 11000001-00011000-01101101-10000111
-// CHECK, INST: smlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
+// CHECK-INST: smlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
// CHECK-ENCODING: [0x87,0x6d,0x18,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1186d87 <unknown>
-smlall za.s[w11, 4:7, vgx2], {z30.b, z31.b}, z15.b[15] // 11000001, 00011111, 01101111, 11000111
-// CHECK, INST: smlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
+smlall za.s[w11, 4:7, vgx2], {z30.b, z31.b}, z15.b[15] // 11000001-00011111-01101111-11000111
+// CHECK-INST: smlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
// CHECK-ENCODING: [0xc7,0x6f,0x1f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11f6fc7 <unknown>
smlall za.s[w11, 4:7], {z30.b - z31.b}, z15.b[15] // 11000001-00011111-01101111-11000111
-// CHECK, INST: smlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
+// CHECK-INST: smlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
// CHECK-ENCODING: [0xc7,0x6f,0x1f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11f6fc7 <unknown>
-smlall za.s[w8, 4:7, vgx2], {z16.b, z17.b}, z0.b[14] // 11000001, 00010000, 00001110, 00000101
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
+smlall za.s[w8, 4:7, vgx2], {z16.b, z17.b}, z0.b[14] // 11000001-00010000-00001110-00000101
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
// CHECK-ENCODING: [0x05,0x0e,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100e05 <unknown>
smlall za.s[w8, 4:7], {z16.b - z17.b}, z0.b[14] // 11000001-00010000-00001110-00000101
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
// CHECK-ENCODING: [0x05,0x0e,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100e05 <unknown>
-smlall za.s[w8, 4:7, vgx2], {z0.b, z1.b}, z14.b[4] // 11000001, 00011110, 00000100, 00000001
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
+smlall za.s[w8, 4:7, vgx2], {z0.b, z1.b}, z14.b[4] // 11000001-00011110-00000100-00000001
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
// CHECK-ENCODING: [0x01,0x04,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0401 <unknown>
smlall za.s[w8, 4:7], {z0.b - z1.b}, z14.b[4] // 11000001-00011110-00000100-00000001
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
// CHECK-ENCODING: [0x01,0x04,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0401 <unknown>
-smlall za.s[w10, 0:3, vgx2], {z18.b, z19.b}, z4.b[4] // 11000001, 00010100, 01000110, 01000000
-// CHECK, INST: smlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
+smlall za.s[w10, 0:3, vgx2], {z18.b, z19.b}, z4.b[4] // 11000001-00010100-01000110-01000000
+// CHECK-INST: smlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
// CHECK-ENCODING: [0x40,0x46,0x14,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1144640 <unknown>
smlall za.s[w10, 0:3], {z18.b - z19.b}, z4.b[4] // 11000001-00010100-01000110-01000000
-// CHECK, INST: smlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
+// CHECK-INST: smlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
// CHECK-ENCODING: [0x40,0x46,0x14,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1144640 <unknown>
-smlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b[8] // 11000001, 00010010, 00001001, 10000000
-// CHECK, INST: smlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
+smlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b[8] // 11000001-00010010-00001001-10000000
+// CHECK-INST: smlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
// CHECK-ENCODING: [0x80,0x09,0x12,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1120980 <unknown>
smlall za.s[w8, 0:3], {z12.b - z13.b}, z2.b[8] // 11000001-00010010-00001001-10000000
-// CHECK, INST: smlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
+// CHECK-INST: smlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
// CHECK-ENCODING: [0x80,0x09,0x12,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1120980 <unknown>
-smlall za.s[w10, 4:7, vgx2], {z0.b, z1.b}, z10.b[8] // 11000001, 00011010, 01001000, 00000001
-// CHECK, INST: smlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
+smlall za.s[w10, 4:7, vgx2], {z0.b, z1.b}, z10.b[8] // 11000001-00011010-01001000-00000001
+// CHECK-INST: smlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
// CHECK-ENCODING: [0x01,0x48,0x1a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11a4801 <unknown>
smlall za.s[w10, 4:7], {z0.b - z1.b}, z10.b[8] // 11000001-00011010-01001000-00000001
-// CHECK, INST: smlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
+// CHECK-INST: smlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
// CHECK-ENCODING: [0x01,0x48,0x1a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11a4801 <unknown>
-smlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b[10] // 11000001, 00011110, 00001010, 11000101
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
+smlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b[10] // 11000001-00011110-00001010-11000101
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
// CHECK-ENCODING: [0xc5,0x0a,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0ac5 <unknown>
smlall za.s[w8, 4:7], {z22.b - z23.b}, z14.b[10] // 11000001-00011110-00001010-11000101
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
// CHECK-ENCODING: [0xc5,0x0a,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0ac5 <unknown>
-smlall za.s[w11, 0:3, vgx2], {z8.b, z9.b}, z1.b[5] // 11000001, 00010001, 01100101, 00000010
-// CHECK, INST: smlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
+smlall za.s[w11, 0:3, vgx2], {z8.b, z9.b}, z1.b[5] // 11000001-00010001-01100101-00000010
+// CHECK-INST: smlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
// CHECK-ENCODING: [0x02,0x65,0x11,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1116502 <unknown>
smlall za.s[w11, 0:3], {z8.b - z9.b}, z1.b[5] // 11000001-00010001-01100101-00000010
-// CHECK, INST: smlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
+// CHECK-INST: smlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
// CHECK-ENCODING: [0x02,0x65,0x11,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1116502 <unknown>
-smlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b[11] // 11000001, 00011011, 00101001, 10000111
-// CHECK, INST: smlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
+smlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b[11] // 11000001-00011011-00101001-10000111
+// CHECK-INST: smlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
// CHECK-ENCODING: [0x87,0x29,0x1b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11b2987 <unknown>
smlall za.s[w9, 4:7], {z12.b - z13.b}, z11.b[11] // 11000001-00011011-00101001-10000111
-// CHECK, INST: smlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
+// CHECK-INST: smlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
// CHECK-ENCODING: [0x87,0x29,0x1b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11b2987 <unknown>
-smlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, {z0.b, z1.b} // 11000001, 10100000, 00000000, 00000000
-// CHECK, INST: smlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
+smlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, {z0.b, z1.b} // 11000001-10100000-00000000-00000000
+// CHECK-INST: smlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x00,0x00,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00000 <unknown>
smlall za.s[w8, 0:3], {z0.b - z1.b}, {z0.b - z1.b} // 11000001-10100000-00000000-00000000
-// CHECK, INST: smlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
+// CHECK-INST: smlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x00,0x00,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00000 <unknown>
-smlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, {z20.b, z21.b} // 11000001, 10110100, 01000001, 01000001
-// CHECK, INST: smlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
+smlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, {z20.b, z21.b} // 11000001-10110100-01000001-01000001
+// CHECK-INST: smlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x41,0x41,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44141 <unknown>
smlall za.s[w10, 4:7], {z10.b - z11.b}, {z20.b - z21.b} // 11000001-10110100-01000001-01000001
-// CHECK, INST: smlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
+// CHECK-INST: smlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x41,0x41,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44141 <unknown>
-smlall za.s[w11, 4:7, vgx2], {z12.b, z13.b}, {z8.b, z9.b} // 11000001, 10101000, 01100001, 10000001
-// CHECK, INST: smlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
+smlall za.s[w11, 4:7, vgx2], {z12.b, z13.b}, {z8.b, z9.b} // 11000001-10101000-01100001-10000001
+// CHECK-INST: smlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
// CHECK-ENCODING: [0x81,0x61,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a86181 <unknown>
smlall za.s[w11, 4:7], {z12.b - z13.b}, {z8.b - z9.b} // 11000001-10101000-01100001-10000001
-// CHECK, INST: smlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
+// CHECK-INST: smlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
// CHECK-ENCODING: [0x81,0x61,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a86181 <unknown>
-smlall za.s[w11, 4:7, vgx2], {z30.b, z31.b}, {z30.b, z31.b} // 11000001, 10111110, 01100011, 11000001
-// CHECK, INST: smlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
+smlall za.s[w11, 4:7, vgx2], {z30.b, z31.b}, {z30.b, z31.b} // 11000001-10111110-01100011-11000001
+// CHECK-INST: smlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xc1,0x63,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be63c1 <unknown>
smlall za.s[w11, 4:7], {z30.b - z31.b}, {z30.b - z31.b} // 11000001-10111110-01100011-11000001
-// CHECK, INST: smlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
+// CHECK-INST: smlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xc1,0x63,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be63c1 <unknown>
-smlall za.s[w8, 4:7, vgx2], {z16.b, z17.b}, {z16.b, z17.b} // 11000001, 10110000, 00000010, 00000001
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
+smlall za.s[w8, 4:7, vgx2], {z16.b, z17.b}, {z16.b, z17.b} // 11000001-10110000-00000010-00000001
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
// CHECK-ENCODING: [0x01,0x02,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00201 <unknown>
smlall za.s[w8, 4:7], {z16.b - z17.b}, {z16.b - z17.b} // 11000001-10110000-00000010-00000001
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
// CHECK-ENCODING: [0x01,0x02,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00201 <unknown>
-smlall za.s[w8, 4:7, vgx2], {z0.b, z1.b}, {z30.b, z31.b} // 11000001, 10111110, 00000000, 00000001
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
+smlall za.s[w8, 4:7, vgx2], {z0.b, z1.b}, {z30.b, z31.b} // 11000001-10111110-00000000-00000001
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0x01,0x00,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0001 <unknown>
smlall za.s[w8, 4:7], {z0.b - z1.b}, {z30.b - z31.b} // 11000001-10111110-00000000-00000001
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0x01,0x00,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0001 <unknown>
-smlall za.s[w10, 0:3, vgx2], {z18.b, z19.b}, {z20.b, z21.b} // 11000001, 10110100, 01000010, 01000000
-// CHECK, INST: smlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
+smlall za.s[w10, 0:3, vgx2], {z18.b, z19.b}, {z20.b, z21.b} // 11000001-10110100-01000010-01000000
+// CHECK-INST: smlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x40,0x42,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44240 <unknown>
smlall za.s[w10, 0:3], {z18.b - z19.b}, {z20.b - z21.b} // 11000001-10110100-01000010-01000000
-// CHECK, INST: smlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
+// CHECK-INST: smlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x40,0x42,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44240 <unknown>
-smlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, {z2.b, z3.b} // 11000001, 10100010, 00000001, 10000000
-// CHECK, INST: smlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
+smlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, {z2.b, z3.b} // 11000001-10100010-00000001-10000000
+// CHECK-INST: smlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
// CHECK-ENCODING: [0x80,0x01,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20180 <unknown>
smlall za.s[w8, 0:3], {z12.b - z13.b}, {z2.b - z3.b} // 11000001-10100010-00000001-10000000
-// CHECK, INST: smlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
+// CHECK-INST: smlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
// CHECK-ENCODING: [0x80,0x01,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20180 <unknown>
-smlall za.s[w10, 4:7, vgx2], {z0.b, z1.b}, {z26.b, z27.b} // 11000001, 10111010, 01000000, 00000001
-// CHECK, INST: smlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
+smlall za.s[w10, 4:7, vgx2], {z0.b, z1.b}, {z26.b, z27.b} // 11000001-10111010-01000000-00000001
+// CHECK-INST: smlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
// CHECK-ENCODING: [0x01,0x40,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4001 <unknown>
smlall za.s[w10, 4:7], {z0.b - z1.b}, {z26.b - z27.b} // 11000001-10111010-01000000-00000001
-// CHECK, INST: smlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
+// CHECK-INST: smlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
// CHECK-ENCODING: [0x01,0x40,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4001 <unknown>
-smlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, {z30.b, z31.b} // 11000001, 10111110, 00000010, 11000001
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
+smlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, {z30.b, z31.b} // 11000001-10111110-00000010-11000001
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xc1,0x02,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be02c1 <unknown>
smlall za.s[w8, 4:7], {z22.b - z23.b}, {z30.b - z31.b} // 11000001-10111110-00000010-11000001
-// CHECK, INST: smlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
+// CHECK-INST: smlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xc1,0x02,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be02c1 <unknown>
-smlall za.s[w11, 0:3, vgx2], {z8.b, z9.b}, {z0.b, z1.b} // 11000001, 10100000, 01100001, 00000000
-// CHECK, INST: smlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
+smlall za.s[w11, 0:3, vgx2], {z8.b, z9.b}, {z0.b, z1.b} // 11000001-10100000-01100001-00000000
+// CHECK-INST: smlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x00,0x61,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a06100 <unknown>
smlall za.s[w11, 0:3], {z8.b - z9.b}, {z0.b - z1.b} // 11000001-10100000-01100001-00000000
-// CHECK, INST: smlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
+// CHECK-INST: smlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x00,0x61,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a06100 <unknown>
-smlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, {z10.b, z11.b} // 11000001, 10101010, 00100001, 10000001
-// CHECK, INST: smlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
+smlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, {z10.b, z11.b} // 11000001-10101010-00100001-10000001
+// CHECK-INST: smlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
// CHECK-ENCODING: [0x81,0x21,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa2181 <unknown>
smlall za.s[w9, 4:7], {z12.b - z13.b}, {z10.b - z11.b} // 11000001-10101010-00100001-10000001
-// CHECK, INST: smlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
+// CHECK-INST: smlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
// CHECK-ENCODING: [0x81,0x21,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa2181 <unknown>
-smlall za.d[w8, 0:3, vgx2], {z0.h, z1.h}, z0.h // 11000001, 01100000, 00000000, 00000000
-// CHECK, INST: smlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h
+smlall za.d[w8, 0:3, vgx2], {z0.h, z1.h}, z0.h // 11000001-01100000-00000000-00000000
+// CHECK-INST: smlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x00,0x00,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600000 <unknown>
smlall za.d[w8, 0:3], {z0.h - z1.h}, z0.h // 11000001-01100000-00000000-00000000
-// CHECK, INST: smlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h
+// CHECK-INST: smlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x00,0x00,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600000 <unknown>
-smlall za.d[w10, 4:7, vgx2], {z10.h, z11.h}, z5.h // 11000001, 01100101, 01000001, 01000001
-// CHECK, INST: smlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h
+smlall za.d[w10, 4:7, vgx2], {z10.h, z11.h}, z5.h // 11000001-01100101-01000001-01000001
+// CHECK-INST: smlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x41,0x41,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1654141 <unknown>
smlall za.d[w10, 4:7], {z10.h - z11.h}, z5.h // 11000001-01100101-01000001-01000001
-// CHECK, INST: smlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h
+// CHECK-INST: smlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x41,0x41,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1654141 <unknown>
-smlall za.d[w11, 4:7, vgx2], {z13.h, z14.h}, z8.h // 11000001, 01101000, 01100001, 10100001
-// CHECK, INST: smlall za.d[w11, 4:7, vgx2], { z13.h, z14.h }, z8.h
+smlall za.d[w11, 4:7, vgx2], {z13.h, z14.h}, z8.h // 11000001-01101000-01100001-10100001
+// CHECK-INST: smlall za.d[w11, 4:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xa1,0x61,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16861a1 <unknown>
smlall za.d[w11, 4:7], {z13.h - z14.h}, z8.h // 11000001-01101000-01100001-10100001
-// CHECK, INST: smlall za.d[w11, 4:7, vgx2], { z13.h, z14.h }, z8.h
+// CHECK-INST: smlall za.d[w11, 4:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xa1,0x61,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16861a1 <unknown>
-smlall za.d[w11, 4:7, vgx2], {z31.h, z0.h}, z15.h // 11000001, 01101111, 01100011, 11100001
-// CHECK, INST: smlall za.d[w11, 4:7, vgx2], { z31.h, z0.h }, z15.h
+smlall za.d[w11, 4:7, vgx2], {z31.h, z0.h}, z15.h // 11000001-01101111-01100011-11100001
+// CHECK-INST: smlall za.d[w11, 4:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xe1,0x63,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f63e1 <unknown>
smlall za.d[w11, 4:7], {z31.h - z0.h}, z15.h // 11000001-01101111-01100011-11100001
-// CHECK, INST: smlall za.d[w11, 4:7, vgx2], { z31.h, z0.h }, z15.h
+// CHECK-INST: smlall za.d[w11, 4:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xe1,0x63,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f63e1 <unknown>
-smlall za.d[w8, 4:7, vgx2], {z17.h, z18.h}, z0.h // 11000001, 01100000, 00000010, 00100001
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z17.h, z18.h }, z0.h
+smlall za.d[w8, 4:7, vgx2], {z17.h, z18.h}, z0.h // 11000001-01100000-00000010-00100001
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x21,0x02,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600221 <unknown>
smlall za.d[w8, 4:7], {z17.h - z18.h}, z0.h // 11000001-01100000-00000010-00100001
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z17.h, z18.h }, z0.h
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x21,0x02,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600221 <unknown>
-smlall za.d[w8, 4:7, vgx2], {z1.h, z2.h}, z14.h // 11000001, 01101110, 00000000, 00100001
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z1.h, z2.h }, z14.h
+smlall za.d[w8, 4:7, vgx2], {z1.h, z2.h}, z14.h // 11000001-01101110-00000000-00100001
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x21,0x00,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0021 <unknown>
smlall za.d[w8, 4:7], {z1.h - z2.h}, z14.h // 11000001-01101110-00000000-00100001
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z1.h, z2.h }, z14.h
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x21,0x00,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0021 <unknown>
-smlall za.d[w10, 0:3, vgx2], {z19.h, z20.h}, z4.h // 11000001, 01100100, 01000010, 01100000
-// CHECK, INST: smlall za.d[w10, 0:3, vgx2], { z19.h, z20.h }, z4.h
+smlall za.d[w10, 0:3, vgx2], {z19.h, z20.h}, z4.h // 11000001-01100100-01000010-01100000
+// CHECK-INST: smlall za.d[w10, 0:3, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x60,0x42,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1644260 <unknown>
smlall za.d[w10, 0:3], {z19.h - z20.h}, z4.h // 11000001-01100100-01000010-01100000
-// CHECK, INST: smlall za.d[w10, 0:3, vgx2], { z19.h, z20.h }, z4.h
+// CHECK-INST: smlall za.d[w10, 0:3, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x60,0x42,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1644260 <unknown>
-smlall za.d[w8, 0:3, vgx2], {z12.h, z13.h}, z2.h // 11000001, 01100010, 00000001, 10000000
-// CHECK, INST: smlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h
+smlall za.d[w8, 0:3, vgx2], {z12.h, z13.h}, z2.h // 11000001-01100010-00000001-10000000
+// CHECK-INST: smlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x80,0x01,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1620180 <unknown>
smlall za.d[w8, 0:3], {z12.h - z13.h}, z2.h // 11000001-01100010-00000001-10000000
-// CHECK, INST: smlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h
+// CHECK-INST: smlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x80,0x01,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1620180 <unknown>
-smlall za.d[w10, 4:7, vgx2], {z1.h, z2.h}, z10.h // 11000001, 01101010, 01000000, 00100001
-// CHECK, INST: smlall za.d[w10, 4:7, vgx2], { z1.h, z2.h }, z10.h
+smlall za.d[w10, 4:7, vgx2], {z1.h, z2.h}, z10.h // 11000001-01101010-01000000-00100001
+// CHECK-INST: smlall za.d[w10, 4:7, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x21,0x40,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a4021 <unknown>
smlall za.d[w10, 4:7], {z1.h - z2.h}, z10.h // 11000001-01101010-01000000-00100001
-// CHECK, INST: smlall za.d[w10, 4:7, vgx2], { z1.h, z2.h }, z10.h
+// CHECK-INST: smlall za.d[w10, 4:7, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x21,0x40,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a4021 <unknown>
-smlall za.d[w8, 4:7, vgx2], {z22.h, z23.h}, z14.h // 11000001, 01101110, 00000010, 11000001
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h
+smlall za.d[w8, 4:7, vgx2], {z22.h, z23.h}, z14.h // 11000001-01101110-00000010-11000001
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xc1,0x02,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e02c1 <unknown>
smlall za.d[w8, 4:7], {z22.h - z23.h}, z14.h // 11000001-01101110-00000010-11000001
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xc1,0x02,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e02c1 <unknown>
-smlall za.d[w11, 0:3, vgx2], {z9.h, z10.h}, z1.h // 11000001, 01100001, 01100001, 00100000
-// CHECK, INST: smlall za.d[w11, 0:3, vgx2], { z9.h, z10.h }, z1.h
+smlall za.d[w11, 0:3, vgx2], {z9.h, z10.h}, z1.h // 11000001-01100001-01100001-00100000
+// CHECK-INST: smlall za.d[w11, 0:3, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x20,0x61,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1616120 <unknown>
smlall za.d[w11, 0:3], {z9.h - z10.h}, z1.h // 11000001-01100001-01100001-00100000
-// CHECK, INST: smlall za.d[w11, 0:3, vgx2], { z9.h, z10.h }, z1.h
+// CHECK-INST: smlall za.d[w11, 0:3, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x20,0x61,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1616120 <unknown>
-smlall za.d[w9, 4:7, vgx2], {z12.h, z13.h}, z11.h // 11000001, 01101011, 00100001, 10000001
-// CHECK, INST: smlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h
+smlall za.d[w9, 4:7, vgx2], {z12.h, z13.h}, z11.h // 11000001-01101011-00100001-10000001
+// CHECK-INST: smlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x81,0x21,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16b2181 <unknown>
smlall za.d[w9, 4:7], {z12.h - z13.h}, z11.h // 11000001-01101011-00100001-10000001
-// CHECK, INST: smlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h
+// CHECK-INST: smlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x81,0x21,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16b2181 <unknown>
-smlall za.d[w8, 0:3, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001, 10010000, 00000000, 00000000
-// CHECK, INST: smlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h[0]
+smlall za.d[w8, 0:3, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001-10010000-00000000-00000000
+// CHECK-INST: smlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x00,0x00,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1900000 <unknown>
smlall za.d[w8, 0:3], {z0.h - z1.h}, z0.h[0] // 11000001-10010000-00000000-00000000
-// CHECK, INST: smlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h[0]
+// CHECK-INST: smlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x00,0x00,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1900000 <unknown>
-smlall za.d[w10, 4:7, vgx2], {z10.h, z11.h}, z5.h[6] // 11000001, 10010101, 01000101, 01000101
-// CHECK, INST: smlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h[6]
+smlall za.d[w10, 4:7, vgx2], {z10.h, z11.h}, z5.h[6] // 11000001-10010101-01000101-01000101
+// CHECK-INST: smlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h[6]
// CHECK-ENCODING: [0x45,0x45,0x95,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1954545 <unknown>
smlall za.d[w10, 4:7], {z10.h - z11.h}, z5.h[6] // 11000001-10010101-01000101-01000101
-// CHECK, INST: smlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h[6]
+// CHECK-INST: smlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h[6]
// CHECK-ENCODING: [0x45,0x45,0x95,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1954545 <unknown>
-smlall za.d[w11, 4:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001, 10011000, 01100101, 10000111
-// CHECK, INST: smlall za.d[w11, 4:7, vgx2], { z12.h, z13.h }, z8.h[7]
+smlall za.d[w11, 4:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001-10011000-01100101-10000111
+// CHECK-INST: smlall za.d[w11, 4:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x87,0x65,0x98,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1986587 <unknown>
smlall za.d[w11, 4:7], {z12.h - z13.h}, z8.h[7] // 11000001-10011000-01100101-10000111
-// CHECK, INST: smlall za.d[w11, 4:7, vgx2], { z12.h, z13.h }, z8.h[7]
+// CHECK-INST: smlall za.d[w11, 4:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x87,0x65,0x98,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1986587 <unknown>
-smlall za.d[w11, 4:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001, 10011111, 01100111, 11000111
-// CHECK, INST: smlall za.d[w11, 4:7, vgx2], { z30.h, z31.h }, z15.h[7]
+smlall za.d[w11, 4:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001-10011111-01100111-11000111
+// CHECK-INST: smlall za.d[w11, 4:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xc7,0x67,0x9f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19f67c7 <unknown>
smlall za.d[w11, 4:7], {z30.h - z31.h}, z15.h[7] // 11000001-10011111-01100111-11000111
-// CHECK, INST: smlall za.d[w11, 4:7, vgx2], { z30.h, z31.h }, z15.h[7]
+// CHECK-INST: smlall za.d[w11, 4:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xc7,0x67,0x9f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19f67c7 <unknown>
-smlall za.d[w8, 4:7, vgx2], {z16.h, z17.h}, z0.h[6] // 11000001, 10010000, 00000110, 00000101
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z16.h, z17.h }, z0.h[6]
+smlall za.d[w8, 4:7, vgx2], {z16.h, z17.h}, z0.h[6] // 11000001-10010000-00000110-00000101
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z16.h, z17.h }, z0.h[6]
// CHECK-ENCODING: [0x05,0x06,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1900605 <unknown>
smlall za.d[w8, 4:7], {z16.h - z17.h}, z0.h[6] // 11000001-10010000-00000110-00000101
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z16.h, z17.h }, z0.h[6]
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z16.h, z17.h }, z0.h[6]
// CHECK-ENCODING: [0x05,0x06,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1900605 <unknown>
-smlall za.d[w8, 4:7, vgx2], {z0.h, z1.h}, z14.h[4] // 11000001, 10011110, 00000100, 00000001
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z0.h, z1.h }, z14.h[4]
+smlall za.d[w8, 4:7, vgx2], {z0.h, z1.h}, z14.h[4] // 11000001-10011110-00000100-00000001
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z0.h, z1.h }, z14.h[4]
// CHECK-ENCODING: [0x01,0x04,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e0401 <unknown>
smlall za.d[w8, 4:7], {z0.h - z1.h}, z14.h[4] // 11000001-10011110-00000100-00000001
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z0.h, z1.h }, z14.h[4]
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z0.h, z1.h }, z14.h[4]
// CHECK-ENCODING: [0x01,0x04,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e0401 <unknown>
-smlall za.d[w10, 0:3, vgx2], {z18.h, z19.h}, z4.h[4] // 11000001, 10010100, 01000110, 01000000
-// CHECK, INST: smlall za.d[w10, 0:3, vgx2], { z18.h, z19.h }, z4.h[4]
+smlall za.d[w10, 0:3, vgx2], {z18.h, z19.h}, z4.h[4] // 11000001-10010100-01000110-01000000
+// CHECK-INST: smlall za.d[w10, 0:3, vgx2], { z18.h, z19.h }, z4.h[4]
// CHECK-ENCODING: [0x40,0x46,0x94,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1944640 <unknown>
smlall za.d[w10, 0:3], {z18.h - z19.h}, z4.h[4] // 11000001-10010100-01000110-01000000
-// CHECK, INST: smlall za.d[w10, 0:3, vgx2], { z18.h, z19.h }, z4.h[4]
+// CHECK-INST: smlall za.d[w10, 0:3, vgx2], { z18.h, z19.h }, z4.h[4]
// CHECK-ENCODING: [0x40,0x46,0x94,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1944640 <unknown>
-smlall za.d[w8, 0:3, vgx2], {z12.h, z13.h}, z2.h[0] // 11000001, 10010010, 00000001, 10000000
-// CHECK, INST: smlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h[0]
+smlall za.d[w8, 0:3, vgx2], {z12.h, z13.h}, z2.h[0] // 11000001-10010010-00000001-10000000
+// CHECK-INST: smlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h[0]
// CHECK-ENCODING: [0x80,0x01,0x92,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1920180 <unknown>
smlall za.d[w8, 0:3], {z12.h - z13.h}, z2.h[0] // 11000001-10010010-00000001-10000000
-// CHECK, INST: smlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h[0]
+// CHECK-INST: smlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h[0]
// CHECK-ENCODING: [0x80,0x01,0x92,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1920180 <unknown>
-smlall za.d[w10, 4:7, vgx2], {z0.h, z1.h}, z10.h[0] // 11000001, 10011010, 01000000, 00000001
-// CHECK, INST: smlall za.d[w10, 4:7, vgx2], { z0.h, z1.h }, z10.h[0]
+smlall za.d[w10, 4:7, vgx2], {z0.h, z1.h}, z10.h[0] // 11000001-10011010-01000000-00000001
+// CHECK-INST: smlall za.d[w10, 4:7, vgx2], { z0.h, z1.h }, z10.h[0]
// CHECK-ENCODING: [0x01,0x40,0x9a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19a4001 <unknown>
smlall za.d[w10, 4:7], {z0.h - z1.h}, z10.h[0] // 11000001-10011010-01000000-00000001
-// CHECK, INST: smlall za.d[w10, 4:7, vgx2], { z0.h, z1.h }, z10.h[0]
+// CHECK-INST: smlall za.d[w10, 4:7, vgx2], { z0.h, z1.h }, z10.h[0]
// CHECK-ENCODING: [0x01,0x40,0x9a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19a4001 <unknown>
-smlall za.d[w8, 4:7, vgx2], {z22.h, z23.h}, z14.h[2] // 11000001, 10011110, 00000010, 11000101
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h[2]
+smlall za.d[w8, 4:7, vgx2], {z22.h, z23.h}, z14.h[2] // 11000001-10011110-00000010-11000101
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h[2]
// CHECK-ENCODING: [0xc5,0x02,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e02c5 <unknown>
smlall za.d[w8, 4:7], {z22.h - z23.h}, z14.h[2] // 11000001-10011110-00000010-11000101
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h[2]
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h[2]
// CHECK-ENCODING: [0xc5,0x02,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e02c5 <unknown>
-smlall za.d[w11, 0:3, vgx2], {z8.h, z9.h}, z1.h[5] // 11000001, 10010001, 01100101, 00000010
-// CHECK, INST: smlall za.d[w11, 0:3, vgx2], { z8.h, z9.h }, z1.h[5]
+smlall za.d[w11, 0:3, vgx2], {z8.h, z9.h}, z1.h[5] // 11000001-10010001-01100101-00000010
+// CHECK-INST: smlall za.d[w11, 0:3, vgx2], { z8.h, z9.h }, z1.h[5]
// CHECK-ENCODING: [0x02,0x65,0x91,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1916502 <unknown>
smlall za.d[w11, 0:3], {z8.h - z9.h}, z1.h[5] // 11000001-10010001-01100101-00000010
-// CHECK, INST: smlall za.d[w11, 0:3, vgx2], { z8.h, z9.h }, z1.h[5]
+// CHECK-INST: smlall za.d[w11, 0:3, vgx2], { z8.h, z9.h }, z1.h[5]
// CHECK-ENCODING: [0x02,0x65,0x91,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1916502 <unknown>
-smlall za.d[w9, 4:7, vgx2], {z12.h, z13.h}, z11.h[3] // 11000001, 10011011, 00100001, 10000111
-// CHECK, INST: smlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h[3]
+smlall za.d[w9, 4:7, vgx2], {z12.h, z13.h}, z11.h[3] // 11000001-10011011-00100001-10000111
+// CHECK-INST: smlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h[3]
// CHECK-ENCODING: [0x87,0x21,0x9b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19b2187 <unknown>
smlall za.d[w9, 4:7], {z12.h - z13.h}, z11.h[3] // 11000001-10011011-00100001-10000111
-// CHECK, INST: smlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h[3]
+// CHECK-INST: smlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h[3]
// CHECK-ENCODING: [0x87,0x21,0x9b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19b2187 <unknown>
-smlall za.d[w8, 0:3, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001, 11100000, 00000000, 00000000
-// CHECK, INST: smlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+smlall za.d[w8, 0:3, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001-11100000-00000000-00000000
+// CHECK-INST: smlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x00,0x00,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e00000 <unknown>
smlall za.d[w8, 0:3], {z0.h - z1.h}, {z0.h - z1.h} // 11000001-11100000-00000000-00000000
-// CHECK, INST: smlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+// CHECK-INST: smlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x00,0x00,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e00000 <unknown>
-smlall za.d[w10, 4:7, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001, 11110100, 01000001, 01000001
-// CHECK, INST: smlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+smlall za.d[w10, 4:7, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001-11110100-01000001-01000001
+// CHECK-INST: smlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x41,0x41,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44141 <unknown>
smlall za.d[w10, 4:7], {z10.h - z11.h}, {z20.h - z21.h} // 11000001-11110100-01000001-01000001
-// CHECK, INST: smlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+// CHECK-INST: smlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x41,0x41,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44141 <unknown>
-smlall za.d[w11, 4:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001, 11101000, 01100001, 10000001
-// CHECK, INST: smlall za.d[w11, 4:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+smlall za.d[w11, 4:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001-11101000-01100001-10000001
+// CHECK-INST: smlall za.d[w11, 4:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x81,0x61,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e86181 <unknown>
smlall za.d[w11, 4:7], {z12.h - z13.h}, {z8.h - z9.h} // 11000001-11101000-01100001-10000001
-// CHECK, INST: smlall za.d[w11, 4:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+// CHECK-INST: smlall za.d[w11, 4:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x81,0x61,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e86181 <unknown>
-smlall za.d[w11, 4:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001, 11111110, 01100011, 11000001
-// CHECK, INST: smlall za.d[w11, 4:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+smlall za.d[w11, 4:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001-11111110-01100011-11000001
+// CHECK-INST: smlall za.d[w11, 4:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc1,0x63,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe63c1 <unknown>
smlall za.d[w11, 4:7], {z30.h - z31.h}, {z30.h - z31.h} // 11000001-11111110-01100011-11000001
-// CHECK, INST: smlall za.d[w11, 4:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+// CHECK-INST: smlall za.d[w11, 4:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc1,0x63,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe63c1 <unknown>
-smlall za.d[w8, 4:7, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001, 11110000, 00000010, 00000001
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+smlall za.d[w8, 4:7, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001-11110000-00000010-00000001
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x01,0x02,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f00201 <unknown>
smlall za.d[w8, 4:7], {z16.h - z17.h}, {z16.h - z17.h} // 11000001-11110000-00000010-00000001
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x01,0x02,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f00201 <unknown>
-smlall za.d[w8, 4:7, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001, 11111110, 00000000, 00000001
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+smlall za.d[w8, 4:7, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001-11111110-00000000-00000001
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x01,0x00,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0001 <unknown>
smlall za.d[w8, 4:7], {z0.h - z1.h}, {z30.h - z31.h} // 11000001-11111110-00000000-00000001
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x01,0x00,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0001 <unknown>
-smlall za.d[w10, 0:3, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001, 11110100, 01000010, 01000000
-// CHECK, INST: smlall za.d[w10, 0:3, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+smlall za.d[w10, 0:3, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001-11110100-01000010-01000000
+// CHECK-INST: smlall za.d[w10, 0:3, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x40,0x42,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44240 <unknown>
smlall za.d[w10, 0:3], {z18.h - z19.h}, {z20.h - z21.h} // 11000001-11110100-01000010-01000000
-// CHECK, INST: smlall za.d[w10, 0:3, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+// CHECK-INST: smlall za.d[w10, 0:3, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x40,0x42,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44240 <unknown>
-smlall za.d[w8, 0:3, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001, 11100010, 00000001, 10000000
-// CHECK, INST: smlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+smlall za.d[w8, 0:3, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001-11100010-00000001-10000000
+// CHECK-INST: smlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x80,0x01,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e20180 <unknown>
smlall za.d[w8, 0:3], {z12.h - z13.h}, {z2.h - z3.h} // 11000001-11100010-00000001-10000000
-// CHECK, INST: smlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+// CHECK-INST: smlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x80,0x01,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e20180 <unknown>
-smlall za.d[w10, 4:7, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001, 11111010, 01000000, 00000001
-// CHECK, INST: smlall za.d[w10, 4:7, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+smlall za.d[w10, 4:7, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001-11111010-01000000-00000001
+// CHECK-INST: smlall za.d[w10, 4:7, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x01,0x40,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa4001 <unknown>
smlall za.d[w10, 4:7], {z0.h - z1.h}, {z26.h - z27.h} // 11000001-11111010-01000000-00000001
-// CHECK, INST: smlall za.d[w10, 4:7, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+// CHECK-INST: smlall za.d[w10, 4:7, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x01,0x40,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa4001 <unknown>
-smlall za.d[w8, 4:7, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001, 11111110, 00000010, 11000001
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+smlall za.d[w8, 4:7, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001-11111110-00000010-11000001
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc1,0x02,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe02c1 <unknown>
smlall za.d[w8, 4:7], {z22.h - z23.h}, {z30.h - z31.h} // 11000001-11111110-00000010-11000001
-// CHECK, INST: smlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+// CHECK-INST: smlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc1,0x02,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe02c1 <unknown>
-smlall za.d[w11, 0:3, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001, 11100000, 01100001, 00000000
-// CHECK, INST: smlall za.d[w11, 0:3, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+smlall za.d[w11, 0:3, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001-11100000-01100001-00000000
+// CHECK-INST: smlall za.d[w11, 0:3, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x00,0x61,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e06100 <unknown>
smlall za.d[w11, 0:3], {z8.h - z9.h}, {z0.h - z1.h} // 11000001-11100000-01100001-00000000
-// CHECK, INST: smlall za.d[w11, 0:3, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+// CHECK-INST: smlall za.d[w11, 0:3, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x00,0x61,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e06100 <unknown>
-smlall za.d[w9, 4:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001, 11101010, 00100001, 10000001
-// CHECK, INST: smlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+smlall za.d[w9, 4:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001-11101010-00100001-10000001
+// CHECK-INST: smlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x81,0x21,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ea2181 <unknown>
smlall za.d[w9, 4:7], {z12.h - z13.h}, {z10.h - z11.h} // 11000001-11101010-00100001-10000001
-// CHECK, INST: smlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+// CHECK-INST: smlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x81,0x21,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ea2181 <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/smlsl.s b/llvm/test/MC/AArch64/SME2/smlsl.s
index 19d892166c1f2..e0d16c9f37fa3 100644
--- a/llvm/test/MC/AArch64/SME2/smlsl.s
+++ b/llvm/test/MC/AArch64/SME2/smlsl.s
@@ -158,436 +158,436 @@ smlsl za.s[w9, 14:15], z12.h, z11.h[6] // 11000001-11001011-10111001-10001111
// CHECK-UNKNOWN: c1cbb98f <unknown>
-smlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h // 11000001, 01100000, 00001000, 00001000
-// CHECK, INST: smlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+smlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h // 11000001-01100000-00001000-00001000
+// CHECK-INST: smlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x08,0x08,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600808 <unknown>
smlsl za.s[w8, 0:1], {z0.h - z1.h}, z0.h // 11000001-01100000-00001000-00001000
-// CHECK, INST: smlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+// CHECK-INST: smlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x08,0x08,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600808 <unknown>
-smlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h // 11000001, 01100101, 01001001, 01001001
-// CHECK, INST: smlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
+smlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h // 11000001-01100101-01001001-01001001
+// CHECK-INST: smlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x49,0x49,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1654949 <unknown>
smlsl za.s[w10, 2:3], {z10.h - z11.h}, z5.h // 11000001-01100101-01001001-01001001
-// CHECK, INST: smlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
+// CHECK-INST: smlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x49,0x49,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1654949 <unknown>
-smlsl za.s[w11, 6:7, vgx2], {z13.h, z14.h}, z8.h // 11000001, 01101000, 01101001, 10101011
-// CHECK, INST: smlsl za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
+smlsl za.s[w11, 6:7, vgx2], {z13.h, z14.h}, z8.h // 11000001-01101000-01101001-10101011
+// CHECK-INST: smlsl za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xab,0x69,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16869ab <unknown>
smlsl za.s[w11, 6:7], {z13.h - z14.h}, z8.h // 11000001-01101000-01101001-10101011
-// CHECK, INST: smlsl za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
+// CHECK-INST: smlsl za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xab,0x69,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16869ab <unknown>
-smlsl za.s[w11, 6:7, vgx2], {z31.h, z0.h}, z15.h // 11000001, 01101111, 01101011, 11101011
-// CHECK, INST: smlsl za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
+smlsl za.s[w11, 6:7, vgx2], {z31.h, z0.h}, z15.h // 11000001-01101111-01101011-11101011
+// CHECK-INST: smlsl za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xeb,0x6b,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f6beb <unknown>
smlsl za.s[w11, 6:7], {z31.h - z0.h}, z15.h // 11000001-01101111-01101011-11101011
-// CHECK, INST: smlsl za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
+// CHECK-INST: smlsl za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xeb,0x6b,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f6beb <unknown>
-smlsl za.s[w8, 2:3, vgx2], {z17.h, z18.h}, z0.h // 11000001, 01100000, 00001010, 00101001
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
+smlsl za.s[w8, 2:3, vgx2], {z17.h, z18.h}, z0.h // 11000001-01100000-00001010-00101001
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x29,0x0a,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600a29 <unknown>
smlsl za.s[w8, 2:3], {z17.h - z18.h}, z0.h // 11000001-01100000-00001010-00101001
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x29,0x0a,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600a29 <unknown>
-smlsl za.s[w8, 2:3, vgx2], {z1.h, z2.h}, z14.h // 11000001, 01101110, 00001000, 00101001
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
+smlsl za.s[w8, 2:3, vgx2], {z1.h, z2.h}, z14.h // 11000001-01101110-00001000-00101001
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x29,0x08,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0829 <unknown>
smlsl za.s[w8, 2:3], {z1.h - z2.h}, z14.h // 11000001-01101110-00001000-00101001
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x29,0x08,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0829 <unknown>
-smlsl za.s[w10, 0:1, vgx2], {z19.h, z20.h}, z4.h // 11000001, 01100100, 01001010, 01101000
-// CHECK, INST: smlsl za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
+smlsl za.s[w10, 0:1, vgx2], {z19.h, z20.h}, z4.h // 11000001-01100100-01001010-01101000
+// CHECK-INST: smlsl za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x68,0x4a,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1644a68 <unknown>
smlsl za.s[w10, 0:1], {z19.h - z20.h}, z4.h // 11000001-01100100-01001010-01101000
-// CHECK, INST: smlsl za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
+// CHECK-INST: smlsl za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x68,0x4a,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1644a68 <unknown>
-smlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h // 11000001, 01100010, 00001001, 10001000
-// CHECK, INST: smlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
+smlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h // 11000001-01100010-00001001-10001000
+// CHECK-INST: smlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x88,0x09,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1620988 <unknown>
smlsl za.s[w8, 0:1], {z12.h - z13.h}, z2.h // 11000001-01100010-00001001-10001000
-// CHECK, INST: smlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
+// CHECK-INST: smlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x88,0x09,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1620988 <unknown>
-smlsl za.s[w10, 2:3, vgx2], {z1.h, z2.h}, z10.h // 11000001, 01101010, 01001000, 00101001
-// CHECK, INST: smlsl za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
+smlsl za.s[w10, 2:3, vgx2], {z1.h, z2.h}, z10.h // 11000001-01101010-01001000-00101001
+// CHECK-INST: smlsl za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x29,0x48,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a4829 <unknown>
smlsl za.s[w10, 2:3], {z1.h - z2.h}, z10.h // 11000001-01101010-01001000-00101001
-// CHECK, INST: smlsl za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
+// CHECK-INST: smlsl za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x29,0x48,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a4829 <unknown>
-smlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h // 11000001, 01101110, 00001010, 11001001
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
+smlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h // 11000001-01101110-00001010-11001001
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xc9,0x0a,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0ac9 <unknown>
smlsl za.s[w8, 2:3], {z22.h - z23.h}, z14.h // 11000001-01101110-00001010-11001001
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xc9,0x0a,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0ac9 <unknown>
-smlsl za.s[w11, 4:5, vgx2], {z9.h, z10.h}, z1.h // 11000001, 01100001, 01101001, 00101010
-// CHECK, INST: smlsl za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
+smlsl za.s[w11, 4:5, vgx2], {z9.h, z10.h}, z1.h // 11000001-01100001-01101001-00101010
+// CHECK-INST: smlsl za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x2a,0x69,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c161692a <unknown>
smlsl za.s[w11, 4:5], {z9.h - z10.h}, z1.h // 11000001-01100001-01101001-00101010
-// CHECK, INST: smlsl za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
+// CHECK-INST: smlsl za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x2a,0x69,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c161692a <unknown>
-smlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h // 11000001, 01101011, 00101001, 10001011
-// CHECK, INST: smlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
+smlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h // 11000001-01101011-00101001-10001011
+// CHECK-INST: smlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x8b,0x29,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16b298b <unknown>
smlsl za.s[w9, 6:7], {z12.h - z13.h}, z11.h // 11000001-01101011-00101001-10001011
-// CHECK, INST: smlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
+// CHECK-INST: smlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x8b,0x29,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16b298b <unknown>
-smlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001, 11010000, 00010000, 00001000
-// CHECK, INST: smlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
+smlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001-11010000-00010000-00001000
+// CHECK-INST: smlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x08,0x10,0xd0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d01008 <unknown>
smlsl za.s[w8, 0:1], {z0.h - z1.h}, z0.h[0] // 11000001-11010000-00010000-00001000
-// CHECK, INST: smlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
+// CHECK-INST: smlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x08,0x10,0xd0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d01008 <unknown>
-smlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h[3] // 11000001, 11010101, 01010101, 01001101
-// CHECK, INST: smlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
+smlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h[3] // 11000001-11010101-01010101-01001101
+// CHECK-INST: smlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
// CHECK-ENCODING: [0x4d,0x55,0xd5,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d5554d <unknown>
smlsl za.s[w10, 2:3], {z10.h - z11.h}, z5.h[3] // 11000001-11010101-01010101-01001101
-// CHECK, INST: smlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
+// CHECK-INST: smlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
// CHECK-ENCODING: [0x4d,0x55,0xd5,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d5554d <unknown>
-smlsl za.s[w11, 6:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001, 11011000, 01111101, 10001111
-// CHECK, INST: smlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
+smlsl za.s[w11, 6:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001-11011000-01111101-10001111
+// CHECK-INST: smlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x8f,0x7d,0xd8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d87d8f <unknown>
smlsl za.s[w11, 6:7], {z12.h - z13.h}, z8.h[7] // 11000001-11011000-01111101-10001111
-// CHECK, INST: smlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
+// CHECK-INST: smlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x8f,0x7d,0xd8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d87d8f <unknown>
-smlsl za.s[w11, 6:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001, 11011111, 01111111, 11001111
-// CHECK, INST: smlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
+smlsl za.s[w11, 6:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001-11011111-01111111-11001111
+// CHECK-INST: smlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xcf,0x7f,0xdf,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1df7fcf <unknown>
smlsl za.s[w11, 6:7], {z30.h - z31.h}, z15.h[7] // 11000001-11011111-01111111-11001111
-// CHECK, INST: smlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
+// CHECK-INST: smlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xcf,0x7f,0xdf,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1df7fcf <unknown>
-smlsl za.s[w8, 2:3, vgx2], {z16.h, z17.h}, z0.h[7] // 11000001, 11010000, 00011110, 00001101
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
+smlsl za.s[w8, 2:3, vgx2], {z16.h, z17.h}, z0.h[7] // 11000001-11010000-00011110-00001101
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
// CHECK-ENCODING: [0x0d,0x1e,0xd0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d01e0d <unknown>
smlsl za.s[w8, 2:3], {z16.h - z17.h}, z0.h[7] // 11000001-11010000-00011110-00001101
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
// CHECK-ENCODING: [0x0d,0x1e,0xd0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d01e0d <unknown>
-smlsl za.s[w8, 2:3, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001, 11011110, 00010100, 00001001
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
+smlsl za.s[w8, 2:3, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001-11011110-00010100-00001001
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x09,0x14,0xde,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1de1409 <unknown>
smlsl za.s[w8, 2:3], {z0.h - z1.h}, z14.h[2] // 11000001-11011110-00010100-00001001
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x09,0x14,0xde,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1de1409 <unknown>
-smlsl za.s[w10, 0:1, vgx2], {z18.h, z19.h}, z4.h[2] // 11000001, 11010100, 01010110, 01001000
-// CHECK, INST: smlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
+smlsl za.s[w10, 0:1, vgx2], {z18.h, z19.h}, z4.h[2] // 11000001-11010100-01010110-01001000
+// CHECK-INST: smlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
// CHECK-ENCODING: [0x48,0x56,0xd4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d45648 <unknown>
smlsl za.s[w10, 0:1], {z18.h - z19.h}, z4.h[2] // 11000001-11010100-01010110-01001000
-// CHECK, INST: smlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
+// CHECK-INST: smlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
// CHECK-ENCODING: [0x48,0x56,0xd4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d45648 <unknown>
-smlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001, 11010010, 00011001, 10001000
-// CHECK, INST: smlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
+smlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001-11010010-00011001-10001000
+// CHECK-INST: smlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0x88,0x19,0xd2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d21988 <unknown>
smlsl za.s[w8, 0:1], {z12.h - z13.h}, z2.h[4] // 11000001-11010010-00011001-10001000
-// CHECK, INST: smlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
+// CHECK-INST: smlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0x88,0x19,0xd2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d21988 <unknown>
-smlsl za.s[w10, 2:3, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001, 11011010, 01011000, 00001001
-// CHECK, INST: smlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
+smlsl za.s[w10, 2:3, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001-11011010-01011000-00001001
+// CHECK-INST: smlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x09,0x58,0xda,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1da5809 <unknown>
smlsl za.s[w10, 2:3], {z0.h - z1.h}, z10.h[4] // 11000001-11011010-01011000-00001001
-// CHECK, INST: smlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
+// CHECK-INST: smlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x09,0x58,0xda,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1da5809 <unknown>
-smlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001, 11011110, 00011010, 11001101
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
+smlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001-11011110-00011010-11001101
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xcd,0x1a,0xde,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1de1acd <unknown>
smlsl za.s[w8, 2:3], {z22.h - z23.h}, z14.h[5] // 11000001-11011110-00011010-11001101
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xcd,0x1a,0xde,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1de1acd <unknown>
-smlsl za.s[w11, 4:5, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001, 11010001, 01110101, 00001010
-// CHECK, INST: smlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
+smlsl za.s[w11, 4:5, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001-11010001-01110101-00001010
+// CHECK-INST: smlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x0a,0x75,0xd1,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d1750a <unknown>
smlsl za.s[w11, 4:5], {z8.h - z9.h}, z1.h[2] // 11000001-11010001-01110101-00001010
-// CHECK, INST: smlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
+// CHECK-INST: smlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x0a,0x75,0xd1,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d1750a <unknown>
-smlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h[5] // 11000001, 11011011, 00111001, 10001111
-// CHECK, INST: smlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
+smlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h[5] // 11000001-11011011-00111001-10001111
+// CHECK-INST: smlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
// CHECK-ENCODING: [0x8f,0x39,0xdb,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1db398f <unknown>
smlsl za.s[w9, 6:7], {z12.h - z13.h}, z11.h[5] // 11000001-11011011-00111001-10001111
-// CHECK, INST: smlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
+// CHECK-INST: smlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
// CHECK-ENCODING: [0x8f,0x39,0xdb,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1db398f <unknown>
-smlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001, 11100000, 00001000, 00001000
-// CHECK, INST: smlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+smlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001-11100000-00001000-00001000
+// CHECK-INST: smlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x08,0x08,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e00808 <unknown>
smlsl za.s[w8, 0:1], {z0.h - z1.h}, {z0.h - z1.h} // 11000001-11100000-00001000-00001000
-// CHECK, INST: smlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+// CHECK-INST: smlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x08,0x08,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e00808 <unknown>
-smlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001, 11110100, 01001001, 01001001
-// CHECK, INST: smlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+smlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001-11110100-01001001-01001001
+// CHECK-INST: smlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x49,0x49,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44949 <unknown>
smlsl za.s[w10, 2:3], {z10.h - z11.h}, {z20.h - z21.h} // 11000001-11110100-01001001-01001001
-// CHECK, INST: smlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+// CHECK-INST: smlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x49,0x49,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44949 <unknown>
-smlsl za.s[w11, 6:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001, 11101000, 01101001, 10001011
-// CHECK, INST: smlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+smlsl za.s[w11, 6:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001-11101000-01101001-10001011
+// CHECK-INST: smlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x8b,0x69,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e8698b <unknown>
smlsl za.s[w11, 6:7], {z12.h - z13.h}, {z8.h - z9.h} // 11000001-11101000-01101001-10001011
-// CHECK, INST: smlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+// CHECK-INST: smlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x8b,0x69,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e8698b <unknown>
-smlsl za.s[w11, 6:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001, 11111110, 01101011, 11001011
-// CHECK, INST: smlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+smlsl za.s[w11, 6:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001-11111110-01101011-11001011
+// CHECK-INST: smlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xcb,0x6b,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe6bcb <unknown>
smlsl za.s[w11, 6:7], {z30.h - z31.h}, {z30.h - z31.h} // 11000001-11111110-01101011-11001011
-// CHECK, INST: smlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+// CHECK-INST: smlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xcb,0x6b,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe6bcb <unknown>
-smlsl za.s[w8, 2:3, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001, 11110000, 00001010, 00001001
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+smlsl za.s[w8, 2:3, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001-11110000-00001010-00001001
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x09,0x0a,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f00a09 <unknown>
smlsl za.s[w8, 2:3], {z16.h - z17.h}, {z16.h - z17.h} // 11000001-11110000-00001010-00001001
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x09,0x0a,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f00a09 <unknown>
-smlsl za.s[w8, 2:3, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001, 11111110, 00001000, 00001001
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+smlsl za.s[w8, 2:3, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001-11111110-00001000-00001001
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x09,0x08,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0809 <unknown>
smlsl za.s[w8, 2:3], {z0.h - z1.h}, {z30.h - z31.h} // 11000001-11111110-00001000-00001001
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x09,0x08,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0809 <unknown>
-smlsl za.s[w10, 0:1, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001, 11110100, 01001010, 01001000
-// CHECK, INST: smlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+smlsl za.s[w10, 0:1, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001-11110100-01001010-01001000
+// CHECK-INST: smlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x48,0x4a,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44a48 <unknown>
smlsl za.s[w10, 0:1], {z18.h - z19.h}, {z20.h - z21.h} // 11000001-11110100-01001010-01001000
-// CHECK, INST: smlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+// CHECK-INST: smlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x48,0x4a,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44a48 <unknown>
-smlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001, 11100010, 00001001, 10001000
-// CHECK, INST: smlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+smlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001-11100010-00001001-10001000
+// CHECK-INST: smlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x88,0x09,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e20988 <unknown>
smlsl za.s[w8, 0:1], {z12.h - z13.h}, {z2.h - z3.h} // 11000001-11100010-00001001-10001000
-// CHECK, INST: smlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+// CHECK-INST: smlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x88,0x09,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e20988 <unknown>
-smlsl za.s[w10, 2:3, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001, 11111010, 01001000, 00001001
-// CHECK, INST: smlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+smlsl za.s[w10, 2:3, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001-11111010-01001000-00001001
+// CHECK-INST: smlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x09,0x48,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa4809 <unknown>
smlsl za.s[w10, 2:3], {z0.h - z1.h}, {z26.h - z27.h} // 11000001-11111010-01001000-00001001
-// CHECK, INST: smlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+// CHECK-INST: smlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x09,0x48,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa4809 <unknown>
-smlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001, 11111110, 00001010, 11001001
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+smlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001-11111110-00001010-11001001
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc9,0x0a,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0ac9 <unknown>
smlsl za.s[w8, 2:3], {z22.h - z23.h}, {z30.h - z31.h} // 11000001-11111110-00001010-11001001
-// CHECK, INST: smlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+// CHECK-INST: smlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc9,0x0a,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0ac9 <unknown>
-smlsl za.s[w11, 4:5, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001, 11100000, 01101001, 00001010
-// CHECK, INST: smlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+smlsl za.s[w11, 4:5, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001-11100000-01101001-00001010
+// CHECK-INST: smlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x0a,0x69,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e0690a <unknown>
smlsl za.s[w11, 4:5], {z8.h - z9.h}, {z0.h - z1.h} // 11000001-11100000-01101001-00001010
-// CHECK, INST: smlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+// CHECK-INST: smlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x0a,0x69,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e0690a <unknown>
-smlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001, 11101010, 00101001, 10001011
-// CHECK, INST: smlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+smlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001-11101010-00101001-10001011
+// CHECK-INST: smlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x8b,0x29,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ea298b <unknown>
smlsl za.s[w9, 6:7], {z12.h - z13.h}, {z10.h - z11.h} // 11000001-11101010-00101001-10001011
-// CHECK, INST: smlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+// CHECK-INST: smlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x8b,0x29,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ea298b <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/smlsll.s b/llvm/test/MC/AArch64/SME2/smlsll.s
index 9aedb01281378..b796cffecfef9 100644
--- a/llvm/test/MC/AArch64/SME2/smlsll.s
+++ b/llvm/test/MC/AArch64/SME2/smlsll.s
@@ -304,871 +304,871 @@ smlsll za.d[w9, 12:15], z12.h, z11.h[6] // 11000001-10001011-10101001-10001011
// CHECK-UNKNOWN: c18ba98b <unknown>
-smlsll za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b // 11000001, 00100000, 00000000, 00001000
-// CHECK, INST: smlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
+smlsll za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b // 11000001-00100000-00000000-00001000
+// CHECK-INST: smlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
// CHECK-ENCODING: [0x08,0x00,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200008 <unknown>
smlsll za.s[w8, 0:3], {z0.b - z1.b}, z0.b // 11000001-00100000-00000000-00001000
-// CHECK, INST: smlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
+// CHECK-INST: smlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
// CHECK-ENCODING: [0x08,0x00,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200008 <unknown>
-smlsll za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b // 11000001, 00100101, 01000001, 01001001
-// CHECK, INST: smlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
+smlsll za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b // 11000001-00100101-01000001-01001001
+// CHECK-INST: smlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
// CHECK-ENCODING: [0x49,0x41,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254149 <unknown>
smlsll za.s[w10, 4:7], {z10.b - z11.b}, z5.b // 11000001-00100101-01000001-01001001
-// CHECK, INST: smlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
+// CHECK-INST: smlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
// CHECK-ENCODING: [0x49,0x41,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254149 <unknown>
-smlsll za.s[w11, 4:7, vgx2], {z13.b, z14.b}, z8.b // 11000001, 00101000, 01100001, 10101001
-// CHECK, INST: smlsll za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
+smlsll za.s[w11, 4:7, vgx2], {z13.b, z14.b}, z8.b // 11000001-00101000-01100001-10101001
+// CHECK-INST: smlsll za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
// CHECK-ENCODING: [0xa9,0x61,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12861a9 <unknown>
smlsll za.s[w11, 4:7], {z13.b - z14.b}, z8.b // 11000001-00101000-01100001-10101001
-// CHECK, INST: smlsll za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
+// CHECK-INST: smlsll za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
// CHECK-ENCODING: [0xa9,0x61,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12861a9 <unknown>
-smlsll za.s[w11, 4:7, vgx2], {z31.b, z0.b}, z15.b // 11000001, 00101111, 01100011, 11101001
-// CHECK, INST: smlsll za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
+smlsll za.s[w11, 4:7, vgx2], {z31.b, z0.b}, z15.b // 11000001-00101111-01100011-11101001
+// CHECK-INST: smlsll za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
// CHECK-ENCODING: [0xe9,0x63,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f63e9 <unknown>
smlsll za.s[w11, 4:7], {z31.b - z0.b}, z15.b // 11000001-00101111-01100011-11101001
-// CHECK, INST: smlsll za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
+// CHECK-INST: smlsll za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
// CHECK-ENCODING: [0xe9,0x63,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f63e9 <unknown>
-smlsll za.s[w8, 4:7, vgx2], {z17.b, z18.b}, z0.b // 11000001, 00100000, 00000010, 00101001
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
+smlsll za.s[w8, 4:7, vgx2], {z17.b, z18.b}, z0.b // 11000001-00100000-00000010-00101001
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
// CHECK-ENCODING: [0x29,0x02,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200229 <unknown>
smlsll za.s[w8, 4:7], {z17.b - z18.b}, z0.b // 11000001-00100000-00000010-00101001
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
// CHECK-ENCODING: [0x29,0x02,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200229 <unknown>
-smlsll za.s[w8, 4:7, vgx2], {z1.b, z2.b}, z14.b // 11000001, 00101110, 00000000, 00101001
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
+smlsll za.s[w8, 4:7, vgx2], {z1.b, z2.b}, z14.b // 11000001-00101110-00000000-00101001
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
// CHECK-ENCODING: [0x29,0x00,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0029 <unknown>
smlsll za.s[w8, 4:7], {z1.b - z2.b}, z14.b // 11000001-00101110-00000000-00101001
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
// CHECK-ENCODING: [0x29,0x00,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0029 <unknown>
-smlsll za.s[w10, 0:3, vgx2], {z19.b, z20.b}, z4.b // 11000001, 00100100, 01000010, 01101000
-// CHECK, INST: smlsll za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
+smlsll za.s[w10, 0:3, vgx2], {z19.b, z20.b}, z4.b // 11000001-00100100-01000010-01101000
+// CHECK-INST: smlsll za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
// CHECK-ENCODING: [0x68,0x42,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244268 <unknown>
smlsll za.s[w10, 0:3], {z19.b - z20.b}, z4.b // 11000001-00100100-01000010-01101000
-// CHECK, INST: smlsll za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
+// CHECK-INST: smlsll za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
// CHECK-ENCODING: [0x68,0x42,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244268 <unknown>
-smlsll za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b // 11000001, 00100010, 00000001, 10001000
-// CHECK, INST: smlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
+smlsll za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b // 11000001-00100010-00000001-10001000
+// CHECK-INST: smlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
// CHECK-ENCODING: [0x88,0x01,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220188 <unknown>
smlsll za.s[w8, 0:3], {z12.b - z13.b}, z2.b // 11000001-00100010-00000001-10001000
-// CHECK, INST: smlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
+// CHECK-INST: smlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
// CHECK-ENCODING: [0x88,0x01,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220188 <unknown>
-smlsll za.s[w10, 4:7, vgx2], {z1.b, z2.b}, z10.b // 11000001, 00101010, 01000000, 00101001
-// CHECK, INST: smlsll za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
+smlsll za.s[w10, 4:7, vgx2], {z1.b, z2.b}, z10.b // 11000001-00101010-01000000-00101001
+// CHECK-INST: smlsll za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
// CHECK-ENCODING: [0x29,0x40,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4029 <unknown>
smlsll za.s[w10, 4:7], {z1.b - z2.b}, z10.b // 11000001-00101010-01000000-00101001
-// CHECK, INST: smlsll za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
+// CHECK-INST: smlsll za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
// CHECK-ENCODING: [0x29,0x40,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4029 <unknown>
-smlsll za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b // 11000001, 00101110, 00000010, 11001001
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
+smlsll za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b // 11000001-00101110-00000010-11001001
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
// CHECK-ENCODING: [0xc9,0x02,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e02c9 <unknown>
smlsll za.s[w8, 4:7], {z22.b - z23.b}, z14.b // 11000001-00101110-00000010-11001001
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
// CHECK-ENCODING: [0xc9,0x02,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e02c9 <unknown>
-smlsll za.s[w11, 0:3, vgx2], {z9.b, z10.b}, z1.b // 11000001, 00100001, 01100001, 00101000
-// CHECK, INST: smlsll za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
+smlsll za.s[w11, 0:3, vgx2], {z9.b, z10.b}, z1.b // 11000001-00100001-01100001-00101000
+// CHECK-INST: smlsll za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
// CHECK-ENCODING: [0x28,0x61,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1216128 <unknown>
smlsll za.s[w11, 0:3], {z9.b - z10.b}, z1.b // 11000001-00100001-01100001-00101000
-// CHECK, INST: smlsll za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
+// CHECK-INST: smlsll za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
// CHECK-ENCODING: [0x28,0x61,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1216128 <unknown>
-smlsll za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b // 11000001, 00101011, 00100001, 10001001
-// CHECK, INST: smlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
+smlsll za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b // 11000001-00101011-00100001-10001001
+// CHECK-INST: smlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
// CHECK-ENCODING: [0x89,0x21,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b2189 <unknown>
smlsll za.s[w9, 4:7], {z12.b - z13.b}, z11.b // 11000001-00101011-00100001-10001001
-// CHECK, INST: smlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
+// CHECK-INST: smlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
// CHECK-ENCODING: [0x89,0x21,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b2189 <unknown>
-smlsll za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b[0] // 11000001, 00010000, 00000000, 00001000
-// CHECK, INST: smlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
+smlsll za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b[0] // 11000001-00010000-00000000-00001000
+// CHECK-INST: smlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
// CHECK-ENCODING: [0x08,0x00,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100008 <unknown>
smlsll za.s[w8, 0:3], {z0.b - z1.b}, z0.b[0] // 11000001-00010000-00000000-00001000
-// CHECK, INST: smlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
+// CHECK-INST: smlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
// CHECK-ENCODING: [0x08,0x00,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100008 <unknown>
-smlsll za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b[6] // 11000001, 00010101, 01000101, 01001101
-// CHECK, INST: smlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
+smlsll za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b[6] // 11000001-00010101-01000101-01001101
+// CHECK-INST: smlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
// CHECK-ENCODING: [0x4d,0x45,0x15,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c115454d <unknown>
smlsll za.s[w10, 4:7], {z10.b - z11.b}, z5.b[6] // 11000001-00010101-01000101-01001101
-// CHECK, INST: smlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
+// CHECK-INST: smlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
// CHECK-ENCODING: [0x4d,0x45,0x15,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c115454d <unknown>
-smlsll za.s[w11, 4:7, vgx2], {z12.b, z13.b}, z8.b[15] // 11000001, 00011000, 01101101, 10001111
-// CHECK, INST: smlsll za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
+smlsll za.s[w11, 4:7, vgx2], {z12.b, z13.b}, z8.b[15] // 11000001-00011000-01101101-10001111
+// CHECK-INST: smlsll za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
// CHECK-ENCODING: [0x8f,0x6d,0x18,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1186d8f <unknown>
smlsll za.s[w11, 4:7], {z12.b - z13.b}, z8.b[15] // 11000001-00011000-01101101-10001111
-// CHECK, INST: smlsll za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
+// CHECK-INST: smlsll za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
// CHECK-ENCODING: [0x8f,0x6d,0x18,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1186d8f <unknown>
-smlsll za.s[w11, 4:7, vgx2], {z30.b, z31.b}, z15.b[15] // 11000001, 00011111, 01101111, 11001111
-// CHECK, INST: smlsll za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
+smlsll za.s[w11, 4:7, vgx2], {z30.b, z31.b}, z15.b[15] // 11000001-00011111-01101111-11001111
+// CHECK-INST: smlsll za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
// CHECK-ENCODING: [0xcf,0x6f,0x1f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11f6fcf <unknown>
smlsll za.s[w11, 4:7], {z30.b - z31.b}, z15.b[15] // 11000001-00011111-01101111-11001111
-// CHECK, INST: smlsll za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
+// CHECK-INST: smlsll za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
// CHECK-ENCODING: [0xcf,0x6f,0x1f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11f6fcf <unknown>
-smlsll za.s[w8, 4:7, vgx2], {z16.b, z17.b}, z0.b[14] // 11000001, 00010000, 00001110, 00001101
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
+smlsll za.s[w8, 4:7, vgx2], {z16.b, z17.b}, z0.b[14] // 11000001-00010000-00001110-00001101
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
// CHECK-ENCODING: [0x0d,0x0e,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100e0d <unknown>
smlsll za.s[w8, 4:7], {z16.b - z17.b}, z0.b[14] // 11000001-00010000-00001110-00001101
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
// CHECK-ENCODING: [0x0d,0x0e,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100e0d <unknown>
-smlsll za.s[w8, 4:7, vgx2], {z0.b, z1.b}, z14.b[4] // 11000001, 00011110, 00000100, 00001001
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
+smlsll za.s[w8, 4:7, vgx2], {z0.b, z1.b}, z14.b[4] // 11000001-00011110-00000100-00001001
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
// CHECK-ENCODING: [0x09,0x04,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0409 <unknown>
smlsll za.s[w8, 4:7], {z0.b - z1.b}, z14.b[4] // 11000001-00011110-00000100-00001001
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
// CHECK-ENCODING: [0x09,0x04,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0409 <unknown>
-smlsll za.s[w10, 0:3, vgx2], {z18.b, z19.b}, z4.b[4] // 11000001, 00010100, 01000110, 01001000
-// CHECK, INST: smlsll za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
+smlsll za.s[w10, 0:3, vgx2], {z18.b, z19.b}, z4.b[4] // 11000001-00010100-01000110-01001000
+// CHECK-INST: smlsll za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
// CHECK-ENCODING: [0x48,0x46,0x14,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1144648 <unknown>
smlsll za.s[w10, 0:3], {z18.b - z19.b}, z4.b[4] // 11000001-00010100-01000110-01001000
-// CHECK, INST: smlsll za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
+// CHECK-INST: smlsll za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
// CHECK-ENCODING: [0x48,0x46,0x14,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1144648 <unknown>
-smlsll za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b[8] // 11000001, 00010010, 00001001, 10001000
-// CHECK, INST: smlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
+smlsll za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b[8] // 11000001-00010010-00001001-10001000
+// CHECK-INST: smlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
// CHECK-ENCODING: [0x88,0x09,0x12,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1120988 <unknown>
smlsll za.s[w8, 0:3], {z12.b - z13.b}, z2.b[8] // 11000001-00010010-00001001-10001000
-// CHECK, INST: smlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
+// CHECK-INST: smlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
// CHECK-ENCODING: [0x88,0x09,0x12,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1120988 <unknown>
-smlsll za.s[w10, 4:7, vgx2], {z0.b, z1.b}, z10.b[8] // 11000001, 00011010, 01001000, 00001001
-// CHECK, INST: smlsll za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
+smlsll za.s[w10, 4:7, vgx2], {z0.b, z1.b}, z10.b[8] // 11000001-00011010-01001000-00001001
+// CHECK-INST: smlsll za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
// CHECK-ENCODING: [0x09,0x48,0x1a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11a4809 <unknown>
smlsll za.s[w10, 4:7], {z0.b - z1.b}, z10.b[8] // 11000001-00011010-01001000-00001001
-// CHECK, INST: smlsll za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
+// CHECK-INST: smlsll za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
// CHECK-ENCODING: [0x09,0x48,0x1a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11a4809 <unknown>
-smlsll za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b[10] // 11000001, 00011110, 00001010, 11001101
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
+smlsll za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b[10] // 11000001-00011110-00001010-11001101
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
// CHECK-ENCODING: [0xcd,0x0a,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0acd <unknown>
smlsll za.s[w8, 4:7], {z22.b - z23.b}, z14.b[10] // 11000001-00011110-00001010-11001101
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
// CHECK-ENCODING: [0xcd,0x0a,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0acd <unknown>
-smlsll za.s[w11, 0:3, vgx2], {z8.b, z9.b}, z1.b[5] // 11000001, 00010001, 01100101, 00001010
-// CHECK, INST: smlsll za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
+smlsll za.s[w11, 0:3, vgx2], {z8.b, z9.b}, z1.b[5] // 11000001-00010001-01100101-00001010
+// CHECK-INST: smlsll za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
// CHECK-ENCODING: [0x0a,0x65,0x11,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c111650a <unknown>
smlsll za.s[w11, 0:3], {z8.b - z9.b}, z1.b[5] // 11000001-00010001-01100101-00001010
-// CHECK, INST: smlsll za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
+// CHECK-INST: smlsll za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
// CHECK-ENCODING: [0x0a,0x65,0x11,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c111650a <unknown>
-smlsll za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b[11] // 11000001, 00011011, 00101001, 10001111
-// CHECK, INST: smlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
+smlsll za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b[11] // 11000001-00011011-00101001-10001111
+// CHECK-INST: smlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
// CHECK-ENCODING: [0x8f,0x29,0x1b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11b298f <unknown>
smlsll za.s[w9, 4:7], {z12.b - z13.b}, z11.b[11] // 11000001-00011011-00101001-10001111
-// CHECK, INST: smlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
+// CHECK-INST: smlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
// CHECK-ENCODING: [0x8f,0x29,0x1b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11b298f <unknown>
-smlsll za.s[w8, 0:3, vgx2], {z0.b, z1.b}, {z0.b, z1.b} // 11000001, 10100000, 00000000, 00001000
-// CHECK, INST: smlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
+smlsll za.s[w8, 0:3, vgx2], {z0.b, z1.b}, {z0.b, z1.b} // 11000001-10100000-00000000-00001000
+// CHECK-INST: smlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x08,0x00,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00008 <unknown>
smlsll za.s[w8, 0:3], {z0.b - z1.b}, {z0.b - z1.b} // 11000001-10100000-00000000-00001000
-// CHECK, INST: smlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
+// CHECK-INST: smlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x08,0x00,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00008 <unknown>
-smlsll za.s[w10, 4:7, vgx2], {z10.b, z11.b}, {z20.b, z21.b} // 11000001, 10110100, 01000001, 01001001
-// CHECK, INST: smlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
+smlsll za.s[w10, 4:7, vgx2], {z10.b, z11.b}, {z20.b, z21.b} // 11000001-10110100-01000001-01001001
+// CHECK-INST: smlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x49,0x41,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44149 <unknown>
smlsll za.s[w10, 4:7], {z10.b - z11.b}, {z20.b - z21.b} // 11000001-10110100-01000001-01001001
-// CHECK, INST: smlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
+// CHECK-INST: smlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x49,0x41,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44149 <unknown>
-smlsll za.s[w11, 4:7, vgx2], {z12.b, z13.b}, {z8.b, z9.b} // 11000001, 10101000, 01100001, 10001001
-// CHECK, INST: smlsll za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
+smlsll za.s[w11, 4:7, vgx2], {z12.b, z13.b}, {z8.b, z9.b} // 11000001-10101000-01100001-10001001
+// CHECK-INST: smlsll za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
// CHECK-ENCODING: [0x89,0x61,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a86189 <unknown>
smlsll za.s[w11, 4:7], {z12.b - z13.b}, {z8.b - z9.b} // 11000001-10101000-01100001-10001001
-// CHECK, INST: smlsll za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
+// CHECK-INST: smlsll za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
// CHECK-ENCODING: [0x89,0x61,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a86189 <unknown>
-smlsll za.s[w11, 4:7, vgx2], {z30.b, z31.b}, {z30.b, z31.b} // 11000001, 10111110, 01100011, 11001001
-// CHECK, INST: smlsll za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
+smlsll za.s[w11, 4:7, vgx2], {z30.b, z31.b}, {z30.b, z31.b} // 11000001-10111110-01100011-11001001
+// CHECK-INST: smlsll za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xc9,0x63,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be63c9 <unknown>
smlsll za.s[w11, 4:7], {z30.b - z31.b}, {z30.b - z31.b} // 11000001-10111110-01100011-11001001
-// CHECK, INST: smlsll za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
+// CHECK-INST: smlsll za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xc9,0x63,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be63c9 <unknown>
-smlsll za.s[w8, 4:7, vgx2], {z16.b, z17.b}, {z16.b, z17.b} // 11000001, 10110000, 00000010, 00001001
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
+smlsll za.s[w8, 4:7, vgx2], {z16.b, z17.b}, {z16.b, z17.b} // 11000001-10110000-00000010-00001001
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
// CHECK-ENCODING: [0x09,0x02,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00209 <unknown>
smlsll za.s[w8, 4:7], {z16.b - z17.b}, {z16.b - z17.b} // 11000001-10110000-00000010-00001001
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
// CHECK-ENCODING: [0x09,0x02,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00209 <unknown>
-smlsll za.s[w8, 4:7, vgx2], {z0.b, z1.b}, {z30.b, z31.b} // 11000001, 10111110, 00000000, 00001001
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
+smlsll za.s[w8, 4:7, vgx2], {z0.b, z1.b}, {z30.b, z31.b} // 11000001-10111110-00000000-00001001
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0x09,0x00,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0009 <unknown>
smlsll za.s[w8, 4:7], {z0.b - z1.b}, {z30.b - z31.b} // 11000001-10111110-00000000-00001001
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0x09,0x00,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0009 <unknown>
-smlsll za.s[w10, 0:3, vgx2], {z18.b, z19.b}, {z20.b, z21.b} // 11000001, 10110100, 01000010, 01001000
-// CHECK, INST: smlsll za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
+smlsll za.s[w10, 0:3, vgx2], {z18.b, z19.b}, {z20.b, z21.b} // 11000001-10110100-01000010-01001000
+// CHECK-INST: smlsll za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x48,0x42,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44248 <unknown>
smlsll za.s[w10, 0:3], {z18.b - z19.b}, {z20.b - z21.b} // 11000001-10110100-01000010-01001000
-// CHECK, INST: smlsll za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
+// CHECK-INST: smlsll za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x48,0x42,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44248 <unknown>
-smlsll za.s[w8, 0:3, vgx2], {z12.b, z13.b}, {z2.b, z3.b} // 11000001, 10100010, 00000001, 10001000
-// CHECK, INST: smlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
+smlsll za.s[w8, 0:3, vgx2], {z12.b, z13.b}, {z2.b, z3.b} // 11000001-10100010-00000001-10001000
+// CHECK-INST: smlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
// CHECK-ENCODING: [0x88,0x01,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20188 <unknown>
smlsll za.s[w8, 0:3], {z12.b - z13.b}, {z2.b - z3.b} // 11000001-10100010-00000001-10001000
-// CHECK, INST: smlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
+// CHECK-INST: smlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
// CHECK-ENCODING: [0x88,0x01,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20188 <unknown>
-smlsll za.s[w10, 4:7, vgx2], {z0.b, z1.b}, {z26.b, z27.b} // 11000001, 10111010, 01000000, 00001001
-// CHECK, INST: smlsll za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
+smlsll za.s[w10, 4:7, vgx2], {z0.b, z1.b}, {z26.b, z27.b} // 11000001-10111010-01000000-00001001
+// CHECK-INST: smlsll za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
// CHECK-ENCODING: [0x09,0x40,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4009 <unknown>
smlsll za.s[w10, 4:7], {z0.b - z1.b}, {z26.b - z27.b} // 11000001-10111010-01000000-00001001
-// CHECK, INST: smlsll za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
+// CHECK-INST: smlsll za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
// CHECK-ENCODING: [0x09,0x40,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4009 <unknown>
-smlsll za.s[w8, 4:7, vgx2], {z22.b, z23.b}, {z30.b, z31.b} // 11000001, 10111110, 00000010, 11001001
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
+smlsll za.s[w8, 4:7, vgx2], {z22.b, z23.b}, {z30.b, z31.b} // 11000001-10111110-00000010-11001001
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xc9,0x02,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be02c9 <unknown>
smlsll za.s[w8, 4:7], {z22.b - z23.b}, {z30.b - z31.b} // 11000001-10111110-00000010-11001001
-// CHECK, INST: smlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
+// CHECK-INST: smlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xc9,0x02,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be02c9 <unknown>
-smlsll za.s[w11, 0:3, vgx2], {z8.b, z9.b}, {z0.b, z1.b} // 11000001, 10100000, 01100001, 00001000
-// CHECK, INST: smlsll za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
+smlsll za.s[w11, 0:3, vgx2], {z8.b, z9.b}, {z0.b, z1.b} // 11000001-10100000-01100001-00001000
+// CHECK-INST: smlsll za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x08,0x61,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a06108 <unknown>
smlsll za.s[w11, 0:3], {z8.b - z9.b}, {z0.b - z1.b} // 11000001-10100000-01100001-00001000
-// CHECK, INST: smlsll za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
+// CHECK-INST: smlsll za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x08,0x61,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a06108 <unknown>
-smlsll za.s[w9, 4:7, vgx2], {z12.b, z13.b}, {z10.b, z11.b} // 11000001, 10101010, 00100001, 10001001
-// CHECK, INST: smlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
+smlsll za.s[w9, 4:7, vgx2], {z12.b, z13.b}, {z10.b, z11.b} // 11000001-10101010-00100001-10001001
+// CHECK-INST: smlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
// CHECK-ENCODING: [0x89,0x21,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa2189 <unknown>
smlsll za.s[w9, 4:7], {z12.b - z13.b}, {z10.b - z11.b} // 11000001-10101010-00100001-10001001
-// CHECK, INST: smlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
+// CHECK-INST: smlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
// CHECK-ENCODING: [0x89,0x21,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa2189 <unknown>
-smlsll za.d[w8, 0:3, vgx2], {z0.h, z1.h}, z0.h // 11000001, 01100000, 00000000, 00001000
-// CHECK, INST: smlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h
+smlsll za.d[w8, 0:3, vgx2], {z0.h, z1.h}, z0.h // 11000001-01100000-00000000-00001000
+// CHECK-INST: smlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x08,0x00,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600008 <unknown>
smlsll za.d[w8, 0:3], {z0.h - z1.h}, z0.h // 11000001-01100000-00000000-00001000
-// CHECK, INST: smlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h
+// CHECK-INST: smlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x08,0x00,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600008 <unknown>
-smlsll za.d[w10, 4:7, vgx2], {z10.h, z11.h}, z5.h // 11000001, 01100101, 01000001, 01001001
-// CHECK, INST: smlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h
+smlsll za.d[w10, 4:7, vgx2], {z10.h, z11.h}, z5.h // 11000001-01100101-01000001-01001001
+// CHECK-INST: smlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x49,0x41,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1654149 <unknown>
smlsll za.d[w10, 4:7], {z10.h - z11.h}, z5.h // 11000001-01100101-01000001-01001001
-// CHECK, INST: smlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h
+// CHECK-INST: smlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x49,0x41,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1654149 <unknown>
-smlsll za.d[w11, 4:7, vgx2], {z13.h, z14.h}, z8.h // 11000001, 01101000, 01100001, 10101001
-// CHECK, INST: smlsll za.d[w11, 4:7, vgx2], { z13.h, z14.h }, z8.h
+smlsll za.d[w11, 4:7, vgx2], {z13.h, z14.h}, z8.h // 11000001-01101000-01100001-10101001
+// CHECK-INST: smlsll za.d[w11, 4:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xa9,0x61,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16861a9 <unknown>
smlsll za.d[w11, 4:7], {z13.h - z14.h}, z8.h // 11000001-01101000-01100001-10101001
-// CHECK, INST: smlsll za.d[w11, 4:7, vgx2], { z13.h, z14.h }, z8.h
+// CHECK-INST: smlsll za.d[w11, 4:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xa9,0x61,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16861a9 <unknown>
-smlsll za.d[w11, 4:7, vgx2], {z31.h, z0.h}, z15.h // 11000001, 01101111, 01100011, 11101001
-// CHECK, INST: smlsll za.d[w11, 4:7, vgx2], { z31.h, z0.h }, z15.h
+smlsll za.d[w11, 4:7, vgx2], {z31.h, z0.h}, z15.h // 11000001-01101111-01100011-11101001
+// CHECK-INST: smlsll za.d[w11, 4:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xe9,0x63,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f63e9 <unknown>
smlsll za.d[w11, 4:7], {z31.h - z0.h}, z15.h // 11000001-01101111-01100011-11101001
-// CHECK, INST: smlsll za.d[w11, 4:7, vgx2], { z31.h, z0.h }, z15.h
+// CHECK-INST: smlsll za.d[w11, 4:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xe9,0x63,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f63e9 <unknown>
-smlsll za.d[w8, 4:7, vgx2], {z17.h, z18.h}, z0.h // 11000001, 01100000, 00000010, 00101001
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z17.h, z18.h }, z0.h
+smlsll za.d[w8, 4:7, vgx2], {z17.h, z18.h}, z0.h // 11000001-01100000-00000010-00101001
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x29,0x02,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600229 <unknown>
smlsll za.d[w8, 4:7], {z17.h - z18.h}, z0.h // 11000001-01100000-00000010-00101001
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z17.h, z18.h }, z0.h
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x29,0x02,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600229 <unknown>
-smlsll za.d[w8, 4:7, vgx2], {z1.h, z2.h}, z14.h // 11000001, 01101110, 00000000, 00101001
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z1.h, z2.h }, z14.h
+smlsll za.d[w8, 4:7, vgx2], {z1.h, z2.h}, z14.h // 11000001-01101110-00000000-00101001
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x29,0x00,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0029 <unknown>
smlsll za.d[w8, 4:7], {z1.h - z2.h}, z14.h // 11000001-01101110-00000000-00101001
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z1.h, z2.h }, z14.h
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x29,0x00,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0029 <unknown>
-smlsll za.d[w10, 0:3, vgx2], {z19.h, z20.h}, z4.h // 11000001, 01100100, 01000010, 01101000
-// CHECK, INST: smlsll za.d[w10, 0:3, vgx2], { z19.h, z20.h }, z4.h
+smlsll za.d[w10, 0:3, vgx2], {z19.h, z20.h}, z4.h // 11000001-01100100-01000010-01101000
+// CHECK-INST: smlsll za.d[w10, 0:3, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x68,0x42,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1644268 <unknown>
smlsll za.d[w10, 0:3], {z19.h - z20.h}, z4.h // 11000001-01100100-01000010-01101000
-// CHECK, INST: smlsll za.d[w10, 0:3, vgx2], { z19.h, z20.h }, z4.h
+// CHECK-INST: smlsll za.d[w10, 0:3, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x68,0x42,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1644268 <unknown>
-smlsll za.d[w8, 0:3, vgx2], {z12.h, z13.h}, z2.h // 11000001, 01100010, 00000001, 10001000
-// CHECK, INST: smlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h
+smlsll za.d[w8, 0:3, vgx2], {z12.h, z13.h}, z2.h // 11000001-01100010-00000001-10001000
+// CHECK-INST: smlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x88,0x01,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1620188 <unknown>
smlsll za.d[w8, 0:3], {z12.h - z13.h}, z2.h // 11000001-01100010-00000001-10001000
-// CHECK, INST: smlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h
+// CHECK-INST: smlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x88,0x01,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1620188 <unknown>
-smlsll za.d[w10, 4:7, vgx2], {z1.h, z2.h}, z10.h // 11000001, 01101010, 01000000, 00101001
-// CHECK, INST: smlsll za.d[w10, 4:7, vgx2], { z1.h, z2.h }, z10.h
+smlsll za.d[w10, 4:7, vgx2], {z1.h, z2.h}, z10.h // 11000001-01101010-01000000-00101001
+// CHECK-INST: smlsll za.d[w10, 4:7, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x29,0x40,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a4029 <unknown>
smlsll za.d[w10, 4:7], {z1.h - z2.h}, z10.h // 11000001-01101010-01000000-00101001
-// CHECK, INST: smlsll za.d[w10, 4:7, vgx2], { z1.h, z2.h }, z10.h
+// CHECK-INST: smlsll za.d[w10, 4:7, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x29,0x40,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a4029 <unknown>
-smlsll za.d[w8, 4:7, vgx2], {z22.h, z23.h}, z14.h // 11000001, 01101110, 00000010, 11001001
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h
+smlsll za.d[w8, 4:7, vgx2], {z22.h, z23.h}, z14.h // 11000001-01101110-00000010-11001001
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xc9,0x02,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e02c9 <unknown>
smlsll za.d[w8, 4:7], {z22.h - z23.h}, z14.h // 11000001-01101110-00000010-11001001
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xc9,0x02,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e02c9 <unknown>
-smlsll za.d[w11, 0:3, vgx2], {z9.h, z10.h}, z1.h // 11000001, 01100001, 01100001, 00101000
-// CHECK, INST: smlsll za.d[w11, 0:3, vgx2], { z9.h, z10.h }, z1.h
+smlsll za.d[w11, 0:3, vgx2], {z9.h, z10.h}, z1.h // 11000001-01100001-01100001-00101000
+// CHECK-INST: smlsll za.d[w11, 0:3, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x28,0x61,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1616128 <unknown>
smlsll za.d[w11, 0:3], {z9.h - z10.h}, z1.h // 11000001-01100001-01100001-00101000
-// CHECK, INST: smlsll za.d[w11, 0:3, vgx2], { z9.h, z10.h }, z1.h
+// CHECK-INST: smlsll za.d[w11, 0:3, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x28,0x61,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1616128 <unknown>
-smlsll za.d[w9, 4:7, vgx2], {z12.h, z13.h}, z11.h // 11000001, 01101011, 00100001, 10001001
-// CHECK, INST: smlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h
+smlsll za.d[w9, 4:7, vgx2], {z12.h, z13.h}, z11.h // 11000001-01101011-00100001-10001001
+// CHECK-INST: smlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x89,0x21,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16b2189 <unknown>
smlsll za.d[w9, 4:7], {z12.h - z13.h}, z11.h // 11000001-01101011-00100001-10001001
-// CHECK, INST: smlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h
+// CHECK-INST: smlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x89,0x21,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16b2189 <unknown>
-smlsll za.d[w8, 0:3, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001, 10010000, 00000000, 00001000
-// CHECK, INST: smlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h[0]
+smlsll za.d[w8, 0:3, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001-10010000-00000000-00001000
+// CHECK-INST: smlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x08,0x00,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1900008 <unknown>
smlsll za.d[w8, 0:3], {z0.h - z1.h}, z0.h[0] // 11000001-10010000-00000000-00001000
-// CHECK, INST: smlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h[0]
+// CHECK-INST: smlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x08,0x00,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1900008 <unknown>
-smlsll za.d[w10, 4:7, vgx2], {z10.h, z11.h}, z5.h[6] // 11000001, 10010101, 01000101, 01001101
-// CHECK, INST: smlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h[6]
+smlsll za.d[w10, 4:7, vgx2], {z10.h, z11.h}, z5.h[6] // 11000001-10010101-01000101-01001101
+// CHECK-INST: smlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h[6]
// CHECK-ENCODING: [0x4d,0x45,0x95,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c195454d <unknown>
smlsll za.d[w10, 4:7], {z10.h - z11.h}, z5.h[6] // 11000001-10010101-01000101-01001101
-// CHECK, INST: smlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h[6]
+// CHECK-INST: smlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h[6]
// CHECK-ENCODING: [0x4d,0x45,0x95,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c195454d <unknown>
-smlsll za.d[w11, 4:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001, 10011000, 01100101, 10001111
-// CHECK, INST: smlsll za.d[w11, 4:7, vgx2], { z12.h, z13.h }, z8.h[7]
+smlsll za.d[w11, 4:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001-10011000-01100101-10001111
+// CHECK-INST: smlsll za.d[w11, 4:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x8f,0x65,0x98,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c198658f <unknown>
smlsll za.d[w11, 4:7], {z12.h - z13.h}, z8.h[7] // 11000001-10011000-01100101-10001111
-// CHECK, INST: smlsll za.d[w11, 4:7, vgx2], { z12.h, z13.h }, z8.h[7]
+// CHECK-INST: smlsll za.d[w11, 4:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x8f,0x65,0x98,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c198658f <unknown>
-smlsll za.d[w11, 4:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001, 10011111, 01100111, 11001111
-// CHECK, INST: smlsll za.d[w11, 4:7, vgx2], { z30.h, z31.h }, z15.h[7]
+smlsll za.d[w11, 4:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001-10011111-01100111-11001111
+// CHECK-INST: smlsll za.d[w11, 4:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xcf,0x67,0x9f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19f67cf <unknown>
smlsll za.d[w11, 4:7], {z30.h - z31.h}, z15.h[7] // 11000001-10011111-01100111-11001111
-// CHECK, INST: smlsll za.d[w11, 4:7, vgx2], { z30.h, z31.h }, z15.h[7]
+// CHECK-INST: smlsll za.d[w11, 4:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xcf,0x67,0x9f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19f67cf <unknown>
-smlsll za.d[w8, 4:7, vgx2], {z16.h, z17.h}, z0.h[6] // 11000001, 10010000, 00000110, 00001101
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z16.h, z17.h }, z0.h[6]
+smlsll za.d[w8, 4:7, vgx2], {z16.h, z17.h}, z0.h[6] // 11000001-10010000-00000110-00001101
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z16.h, z17.h }, z0.h[6]
// CHECK-ENCODING: [0x0d,0x06,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c190060d <unknown>
smlsll za.d[w8, 4:7], {z16.h - z17.h}, z0.h[6] // 11000001-10010000-00000110-00001101
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z16.h, z17.h }, z0.h[6]
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z16.h, z17.h }, z0.h[6]
// CHECK-ENCODING: [0x0d,0x06,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c190060d <unknown>
-smlsll za.d[w8, 4:7, vgx2], {z0.h, z1.h}, z14.h[4] // 11000001, 10011110, 00000100, 00001001
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z0.h, z1.h }, z14.h[4]
+smlsll za.d[w8, 4:7, vgx2], {z0.h, z1.h}, z14.h[4] // 11000001-10011110-00000100-00001001
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z0.h, z1.h }, z14.h[4]
// CHECK-ENCODING: [0x09,0x04,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e0409 <unknown>
smlsll za.d[w8, 4:7], {z0.h - z1.h}, z14.h[4] // 11000001-10011110-00000100-00001001
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z0.h, z1.h }, z14.h[4]
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z0.h, z1.h }, z14.h[4]
// CHECK-ENCODING: [0x09,0x04,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e0409 <unknown>
-smlsll za.d[w10, 0:3, vgx2], {z18.h, z19.h}, z4.h[4] // 11000001, 10010100, 01000110, 01001000
-// CHECK, INST: smlsll za.d[w10, 0:3, vgx2], { z18.h, z19.h }, z4.h[4]
+smlsll za.d[w10, 0:3, vgx2], {z18.h, z19.h}, z4.h[4] // 11000001-10010100-01000110-01001000
+// CHECK-INST: smlsll za.d[w10, 0:3, vgx2], { z18.h, z19.h }, z4.h[4]
// CHECK-ENCODING: [0x48,0x46,0x94,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1944648 <unknown>
smlsll za.d[w10, 0:3], {z18.h - z19.h}, z4.h[4] // 11000001-10010100-01000110-01001000
-// CHECK, INST: smlsll za.d[w10, 0:3, vgx2], { z18.h, z19.h }, z4.h[4]
+// CHECK-INST: smlsll za.d[w10, 0:3, vgx2], { z18.h, z19.h }, z4.h[4]
// CHECK-ENCODING: [0x48,0x46,0x94,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1944648 <unknown>
-smlsll za.d[w8, 0:3, vgx2], {z12.h, z13.h}, z2.h[0] // 11000001, 10010010, 00000001, 10001000
-// CHECK, INST: smlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h[0]
+smlsll za.d[w8, 0:3, vgx2], {z12.h, z13.h}, z2.h[0] // 11000001-10010010-00000001-10001000
+// CHECK-INST: smlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h[0]
// CHECK-ENCODING: [0x88,0x01,0x92,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1920188 <unknown>
smlsll za.d[w8, 0:3], {z12.h - z13.h}, z2.h[0] // 11000001-10010010-00000001-10001000
-// CHECK, INST: smlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h[0]
+// CHECK-INST: smlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h[0]
// CHECK-ENCODING: [0x88,0x01,0x92,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1920188 <unknown>
-smlsll za.d[w10, 4:7, vgx2], {z0.h, z1.h}, z10.h[0] // 11000001, 10011010, 01000000, 00001001
-// CHECK, INST: smlsll za.d[w10, 4:7, vgx2], { z0.h, z1.h }, z10.h[0]
+smlsll za.d[w10, 4:7, vgx2], {z0.h, z1.h}, z10.h[0] // 11000001-10011010-01000000-00001001
+// CHECK-INST: smlsll za.d[w10, 4:7, vgx2], { z0.h, z1.h }, z10.h[0]
// CHECK-ENCODING: [0x09,0x40,0x9a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19a4009 <unknown>
smlsll za.d[w10, 4:7], {z0.h - z1.h}, z10.h[0] // 11000001-10011010-01000000-00001001
-// CHECK, INST: smlsll za.d[w10, 4:7, vgx2], { z0.h, z1.h }, z10.h[0]
+// CHECK-INST: smlsll za.d[w10, 4:7, vgx2], { z0.h, z1.h }, z10.h[0]
// CHECK-ENCODING: [0x09,0x40,0x9a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19a4009 <unknown>
-smlsll za.d[w8, 4:7, vgx2], {z22.h, z23.h}, z14.h[2] // 11000001, 10011110, 00000010, 11001101
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h[2]
+smlsll za.d[w8, 4:7, vgx2], {z22.h, z23.h}, z14.h[2] // 11000001-10011110-00000010-11001101
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h[2]
// CHECK-ENCODING: [0xcd,0x02,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e02cd <unknown>
smlsll za.d[w8, 4:7], {z22.h - z23.h}, z14.h[2] // 11000001-10011110-00000010-11001101
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h[2]
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h[2]
// CHECK-ENCODING: [0xcd,0x02,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e02cd <unknown>
-smlsll za.d[w11, 0:3, vgx2], {z8.h, z9.h}, z1.h[5] // 11000001, 10010001, 01100101, 00001010
-// CHECK, INST: smlsll za.d[w11, 0:3, vgx2], { z8.h, z9.h }, z1.h[5]
+smlsll za.d[w11, 0:3, vgx2], {z8.h, z9.h}, z1.h[5] // 11000001-10010001-01100101-00001010
+// CHECK-INST: smlsll za.d[w11, 0:3, vgx2], { z8.h, z9.h }, z1.h[5]
// CHECK-ENCODING: [0x0a,0x65,0x91,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c191650a <unknown>
smlsll za.d[w11, 0:3], {z8.h - z9.h}, z1.h[5] // 11000001-10010001-01100101-00001010
-// CHECK, INST: smlsll za.d[w11, 0:3, vgx2], { z8.h, z9.h }, z1.h[5]
+// CHECK-INST: smlsll za.d[w11, 0:3, vgx2], { z8.h, z9.h }, z1.h[5]
// CHECK-ENCODING: [0x0a,0x65,0x91,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c191650a <unknown>
-smlsll za.d[w9, 4:7, vgx2], {z12.h, z13.h}, z11.h[3] // 11000001, 10011011, 00100001, 10001111
-// CHECK, INST: smlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h[3]
+smlsll za.d[w9, 4:7, vgx2], {z12.h, z13.h}, z11.h[3] // 11000001-10011011-00100001-10001111
+// CHECK-INST: smlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h[3]
// CHECK-ENCODING: [0x8f,0x21,0x9b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19b218f <unknown>
smlsll za.d[w9, 4:7], {z12.h - z13.h}, z11.h[3] // 11000001-10011011-00100001-10001111
-// CHECK, INST: smlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h[3]
+// CHECK-INST: smlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h[3]
// CHECK-ENCODING: [0x8f,0x21,0x9b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19b218f <unknown>
-smlsll za.d[w8, 0:3, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001, 11100000, 00000000, 00001000
-// CHECK, INST: smlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+smlsll za.d[w8, 0:3, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001-11100000-00000000-00001000
+// CHECK-INST: smlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x08,0x00,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e00008 <unknown>
smlsll za.d[w8, 0:3], {z0.h - z1.h}, {z0.h - z1.h} // 11000001-11100000-00000000-00001000
-// CHECK, INST: smlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+// CHECK-INST: smlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x08,0x00,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e00008 <unknown>
-smlsll za.d[w10, 4:7, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001, 11110100, 01000001, 01001001
-// CHECK, INST: smlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+smlsll za.d[w10, 4:7, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001-11110100-01000001-01001001
+// CHECK-INST: smlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x49,0x41,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44149 <unknown>
smlsll za.d[w10, 4:7], {z10.h - z11.h}, {z20.h - z21.h} // 11000001-11110100-01000001-01001001
-// CHECK, INST: smlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+// CHECK-INST: smlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x49,0x41,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44149 <unknown>
-smlsll za.d[w11, 4:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001, 11101000, 01100001, 10001001
-// CHECK, INST: smlsll za.d[w11, 4:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+smlsll za.d[w11, 4:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001-11101000-01100001-10001001
+// CHECK-INST: smlsll za.d[w11, 4:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x89,0x61,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e86189 <unknown>
smlsll za.d[w11, 4:7], {z12.h - z13.h}, {z8.h - z9.h} // 11000001-11101000-01100001-10001001
-// CHECK, INST: smlsll za.d[w11, 4:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+// CHECK-INST: smlsll za.d[w11, 4:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x89,0x61,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e86189 <unknown>
-smlsll za.d[w11, 4:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001, 11111110, 01100011, 11001001
-// CHECK, INST: smlsll za.d[w11, 4:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+smlsll za.d[w11, 4:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001-11111110-01100011-11001001
+// CHECK-INST: smlsll za.d[w11, 4:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc9,0x63,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe63c9 <unknown>
smlsll za.d[w11, 4:7], {z30.h - z31.h}, {z30.h - z31.h} // 11000001-11111110-01100011-11001001
-// CHECK, INST: smlsll za.d[w11, 4:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+// CHECK-INST: smlsll za.d[w11, 4:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc9,0x63,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe63c9 <unknown>
-smlsll za.d[w8, 4:7, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001, 11110000, 00000010, 00001001
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+smlsll za.d[w8, 4:7, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001-11110000-00000010-00001001
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x09,0x02,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f00209 <unknown>
smlsll za.d[w8, 4:7], {z16.h - z17.h}, {z16.h - z17.h} // 11000001-11110000-00000010-00001001
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x09,0x02,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f00209 <unknown>
-smlsll za.d[w8, 4:7, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001, 11111110, 00000000, 00001001
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+smlsll za.d[w8, 4:7, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001-11111110-00000000-00001001
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x09,0x00,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0009 <unknown>
smlsll za.d[w8, 4:7], {z0.h - z1.h}, {z30.h - z31.h} // 11000001-11111110-00000000-00001001
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x09,0x00,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0009 <unknown>
-smlsll za.d[w10, 0:3, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001, 11110100, 01000010, 01001000
-// CHECK, INST: smlsll za.d[w10, 0:3, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+smlsll za.d[w10, 0:3, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001-11110100-01000010-01001000
+// CHECK-INST: smlsll za.d[w10, 0:3, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x48,0x42,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44248 <unknown>
smlsll za.d[w10, 0:3], {z18.h - z19.h}, {z20.h - z21.h} // 11000001-11110100-01000010-01001000
-// CHECK, INST: smlsll za.d[w10, 0:3, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+// CHECK-INST: smlsll za.d[w10, 0:3, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x48,0x42,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44248 <unknown>
-smlsll za.d[w8, 0:3, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001, 11100010, 00000001, 10001000
-// CHECK, INST: smlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+smlsll za.d[w8, 0:3, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001-11100010-00000001-10001000
+// CHECK-INST: smlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x88,0x01,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e20188 <unknown>
smlsll za.d[w8, 0:3], {z12.h - z13.h}, {z2.h - z3.h} // 11000001-11100010-00000001-10001000
-// CHECK, INST: smlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+// CHECK-INST: smlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x88,0x01,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e20188 <unknown>
-smlsll za.d[w10, 4:7, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001, 11111010, 01000000, 00001001
-// CHECK, INST: smlsll za.d[w10, 4:7, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+smlsll za.d[w10, 4:7, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001-11111010-01000000-00001001
+// CHECK-INST: smlsll za.d[w10, 4:7, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x09,0x40,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa4009 <unknown>
smlsll za.d[w10, 4:7], {z0.h - z1.h}, {z26.h - z27.h} // 11000001-11111010-01000000-00001001
-// CHECK, INST: smlsll za.d[w10, 4:7, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+// CHECK-INST: smlsll za.d[w10, 4:7, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x09,0x40,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa4009 <unknown>
-smlsll za.d[w8, 4:7, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001, 11111110, 00000010, 11001001
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+smlsll za.d[w8, 4:7, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001-11111110-00000010-11001001
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc9,0x02,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe02c9 <unknown>
smlsll za.d[w8, 4:7], {z22.h - z23.h}, {z30.h - z31.h} // 11000001-11111110-00000010-11001001
-// CHECK, INST: smlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+// CHECK-INST: smlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xc9,0x02,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe02c9 <unknown>
-smlsll za.d[w11, 0:3, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001, 11100000, 01100001, 00001000
-// CHECK, INST: smlsll za.d[w11, 0:3, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+smlsll za.d[w11, 0:3, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001-11100000-01100001-00001000
+// CHECK-INST: smlsll za.d[w11, 0:3, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x08,0x61,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e06108 <unknown>
smlsll za.d[w11, 0:3], {z8.h - z9.h}, {z0.h - z1.h} // 11000001-11100000-01100001-00001000
-// CHECK, INST: smlsll za.d[w11, 0:3, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+// CHECK-INST: smlsll za.d[w11, 0:3, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x08,0x61,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e06108 <unknown>
-smlsll za.d[w9, 4:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001, 11101010, 00100001, 10001001
-// CHECK, INST: smlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+smlsll za.d[w9, 4:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001-11101010-00100001-10001001
+// CHECK-INST: smlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x89,0x21,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ea2189 <unknown>
smlsll za.d[w9, 4:7], {z12.h - z13.h}, {z10.h - z11.h} // 11000001-11101010-00100001-10001001
-// CHECK, INST: smlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+// CHECK-INST: smlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x89,0x21,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ea2189 <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/sub.s b/llvm/test/MC/AArch64/SME2/sub.s
index 43838ace114b7..791c06c53b038 100644
--- a/llvm/test/MC/AArch64/SME2/sub.s
+++ b/llvm/test/MC/AArch64/SME2/sub.s
@@ -157,7 +157,7 @@ sub za.s[w9, 7], {z12.s, z13.s} // 11000001-10100000-00111101-10011111
// CHECK-UNKNOWN: c1a03d9f <unknown>
-sub za.s[w8, 0, vgx2], {z0.s, z1.s}, z0.s // 11000001, 00100000, 00011000, 00011000
+sub za.s[w8, 0, vgx2], {z0.s, z1.s}, z0.s // 11000001-00100000-00011000-00011000
// CHECK-INST: sub za.s[w8, 0, vgx2], { z0.s, z1.s }, z0.s
// CHECK-ENCODING: [0x18,0x18,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -169,7 +169,7 @@ sub za.s[w8, 0], {z0.s - z1.s}, z0.s // 11000001-00100000-00011000-00011000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1201818 <unknown>
-sub za.s[w10, 5, vgx2], {z10.s, z11.s}, z5.s // 11000001, 00100101, 01011001, 01011101
+sub za.s[w10, 5, vgx2], {z10.s, z11.s}, z5.s // 11000001-00100101-01011001-01011101
// CHECK-INST: sub za.s[w10, 5, vgx2], { z10.s, z11.s }, z5.s
// CHECK-ENCODING: [0x5d,0x59,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -181,7 +181,7 @@ sub za.s[w10, 5], {z10.s - z11.s}, z5.s // 11000001-00100101-01011001-01011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c125595d <unknown>
-sub za.s[w11, 7, vgx2], {z13.s, z14.s}, z8.s // 11000001, 00101000, 01111001, 10111111
+sub za.s[w11, 7, vgx2], {z13.s, z14.s}, z8.s // 11000001-00101000-01111001-10111111
// CHECK-INST: sub za.s[w11, 7, vgx2], { z13.s, z14.s }, z8.s
// CHECK-ENCODING: [0xbf,0x79,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -193,7 +193,7 @@ sub za.s[w11, 7], {z13.s - z14.s}, z8.s // 11000001-00101000-01111001-10111
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12879bf <unknown>
-sub za.s[w11, 7, vgx2], {z31.s, z0.s}, z15.s // 11000001, 00101111, 01111011, 11111111
+sub za.s[w11, 7, vgx2], {z31.s, z0.s}, z15.s // 11000001-00101111-01111011-11111111
// CHECK-INST: sub za.s[w11, 7, vgx2], { z31.s, z0.s }, z15.s
// CHECK-ENCODING: [0xff,0x7b,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -205,7 +205,7 @@ sub za.s[w11, 7], {z31.s - z0.s}, z15.s // 11000001-00101111-01111011-11111
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f7bff <unknown>
-sub za.s[w8, 5, vgx2], {z17.s, z18.s}, z0.s // 11000001, 00100000, 00011010, 00111101
+sub za.s[w8, 5, vgx2], {z17.s, z18.s}, z0.s // 11000001-00100000-00011010-00111101
// CHECK-INST: sub za.s[w8, 5, vgx2], { z17.s, z18.s }, z0.s
// CHECK-ENCODING: [0x3d,0x1a,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -217,7 +217,7 @@ sub za.s[w8, 5], {z17.s - z18.s}, z0.s // 11000001-00100000-00011010-001111
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1201a3d <unknown>
-sub za.s[w8, 1, vgx2], {z1.s, z2.s}, z14.s // 11000001, 00101110, 00011000, 00111001
+sub za.s[w8, 1, vgx2], {z1.s, z2.s}, z14.s // 11000001-00101110-00011000-00111001
// CHECK-INST: sub za.s[w8, 1, vgx2], { z1.s, z2.s }, z14.s
// CHECK-ENCODING: [0x39,0x18,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -229,7 +229,7 @@ sub za.s[w8, 1], {z1.s - z2.s}, z14.s // 11000001-00101110-00011000-0011100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e1839 <unknown>
-sub za.s[w10, 0, vgx2], {z19.s, z20.s}, z4.s // 11000001, 00100100, 01011010, 01111000
+sub za.s[w10, 0, vgx2], {z19.s, z20.s}, z4.s // 11000001-00100100-01011010-01111000
// CHECK-INST: sub za.s[w10, 0, vgx2], { z19.s, z20.s }, z4.s
// CHECK-ENCODING: [0x78,0x5a,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -241,7 +241,7 @@ sub za.s[w10, 0], {z19.s - z20.s}, z4.s // 11000001-00100100-01011010-01111
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1245a78 <unknown>
-sub za.s[w8, 0, vgx2], {z12.s, z13.s}, z2.s // 11000001, 00100010, 00011001, 10011000
+sub za.s[w8, 0, vgx2], {z12.s, z13.s}, z2.s // 11000001-00100010-00011001-10011000
// CHECK-INST: sub za.s[w8, 0, vgx2], { z12.s, z13.s }, z2.s
// CHECK-ENCODING: [0x98,0x19,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -253,7 +253,7 @@ sub za.s[w8, 0], {z12.s - z13.s}, z2.s // 11000001-00100010-00011001-100110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1221998 <unknown>
-sub za.s[w10, 1, vgx2], {z1.s, z2.s}, z10.s // 11000001, 00101010, 01011000, 00111001
+sub za.s[w10, 1, vgx2], {z1.s, z2.s}, z10.s // 11000001-00101010-01011000-00111001
// CHECK-INST: sub za.s[w10, 1, vgx2], { z1.s, z2.s }, z10.s
// CHECK-ENCODING: [0x39,0x58,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -265,7 +265,7 @@ sub za.s[w10, 1], {z1.s - z2.s}, z10.s // 11000001-00101010-01011000-001110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a5839 <unknown>
-sub za.s[w8, 5, vgx2], {z22.s, z23.s}, z14.s // 11000001, 00101110, 00011010, 11011101
+sub za.s[w8, 5, vgx2], {z22.s, z23.s}, z14.s // 11000001-00101110-00011010-11011101
// CHECK-INST: sub za.s[w8, 5, vgx2], { z22.s, z23.s }, z14.s
// CHECK-ENCODING: [0xdd,0x1a,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -277,7 +277,7 @@ sub za.s[w8, 5], {z22.s - z23.s}, z14.s // 11000001-00101110-00011010-11011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e1add <unknown>
-sub za.s[w11, 2, vgx2], {z9.s, z10.s}, z1.s // 11000001, 00100001, 01111001, 00111010
+sub za.s[w11, 2, vgx2], {z9.s, z10.s}, z1.s // 11000001-00100001-01111001-00111010
// CHECK-INST: sub za.s[w11, 2, vgx2], { z9.s, z10.s }, z1.s
// CHECK-ENCODING: [0x3a,0x79,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -289,7 +289,7 @@ sub za.s[w11, 2], {z9.s - z10.s}, z1.s // 11000001-00100001-01111001-001110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c121793a <unknown>
-sub za.s[w9, 7, vgx2], {z12.s, z13.s}, z11.s // 11000001, 00101011, 00111001, 10011111
+sub za.s[w9, 7, vgx2], {z12.s, z13.s}, z11.s // 11000001-00101011-00111001-10011111
// CHECK-INST: sub za.s[w9, 7, vgx2], { z12.s, z13.s }, z11.s
// CHECK-ENCODING: [0x9f,0x39,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -302,7 +302,7 @@ sub za.s[w9, 7], {z12.s - z13.s}, z11.s // 11000001-00101011-00111001-10011
// CHECK-UNKNOWN: c12b399f <unknown>
-sub za.s[w8, 0, vgx2], {z0.s, z1.s}, {z0.s, z1.s} // 11000001, 10100000, 00011000, 00011000
+sub za.s[w8, 0, vgx2], {z0.s, z1.s}, {z0.s, z1.s} // 11000001-10100000-00011000-00011000
// CHECK-INST: sub za.s[w8, 0, vgx2], { z0.s, z1.s }, { z0.s, z1.s }
// CHECK-ENCODING: [0x18,0x18,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -314,7 +314,7 @@ sub za.s[w8, 0], {z0.s - z1.s}, {z0.s - z1.s} // 11000001-10100000-00011000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a01818 <unknown>
-sub za.s[w10, 5, vgx2], {z10.s, z11.s}, {z20.s, z21.s} // 11000001, 10110100, 01011001, 01011101
+sub za.s[w10, 5, vgx2], {z10.s, z11.s}, {z20.s, z21.s} // 11000001-10110100-01011001-01011101
// CHECK-INST: sub za.s[w10, 5, vgx2], { z10.s, z11.s }, { z20.s, z21.s }
// CHECK-ENCODING: [0x5d,0x59,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -326,7 +326,7 @@ sub za.s[w10, 5], {z10.s - z11.s}, {z20.s - z21.s} // 11000001-10110100-010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b4595d <unknown>
-sub za.s[w11, 7, vgx2], {z12.s, z13.s}, {z8.s, z9.s} // 11000001, 10101000, 01111001, 10011111
+sub za.s[w11, 7, vgx2], {z12.s, z13.s}, {z8.s, z9.s} // 11000001-10101000-01111001-10011111
// CHECK-INST: sub za.s[w11, 7, vgx2], { z12.s, z13.s }, { z8.s, z9.s }
// CHECK-ENCODING: [0x9f,0x79,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -338,7 +338,7 @@ sub za.s[w11, 7], {z12.s - z13.s}, {z8.s - z9.s} // 11000001-10101000-01111
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a8799f <unknown>
-sub za.s[w11, 7, vgx2], {z30.s, z31.s}, {z30.s, z31.s} // 11000001, 10111110, 01111011, 11011111
+sub za.s[w11, 7, vgx2], {z30.s, z31.s}, {z30.s, z31.s} // 11000001-10111110-01111011-11011111
// CHECK-INST: sub za.s[w11, 7, vgx2], { z30.s, z31.s }, { z30.s, z31.s }
// CHECK-ENCODING: [0xdf,0x7b,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -350,7 +350,7 @@ sub za.s[w11, 7], {z30.s - z31.s}, {z30.s - z31.s} // 11000001-10111110-011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be7bdf <unknown>
-sub za.s[w8, 5, vgx2], {z16.s, z17.s}, {z16.s, z17.s} // 11000001, 10110000, 00011010, 00011101
+sub za.s[w8, 5, vgx2], {z16.s, z17.s}, {z16.s, z17.s} // 11000001-10110000-00011010-00011101
// CHECK-INST: sub za.s[w8, 5, vgx2], { z16.s, z17.s }, { z16.s, z17.s }
// CHECK-ENCODING: [0x1d,0x1a,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -362,7 +362,7 @@ sub za.s[w8, 5], {z16.s - z17.s}, {z16.s - z17.s} // 11000001-10110000-0001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b01a1d <unknown>
-sub za.s[w8, 1, vgx2], {z0.s, z1.s}, {z30.s, z31.s} // 11000001, 10111110, 00011000, 00011001
+sub za.s[w8, 1, vgx2], {z0.s, z1.s}, {z30.s, z31.s} // 11000001-10111110-00011000-00011001
// CHECK-INST: sub za.s[w8, 1, vgx2], { z0.s, z1.s }, { z30.s, z31.s }
// CHECK-ENCODING: [0x19,0x18,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -374,7 +374,7 @@ sub za.s[w8, 1], {z0.s - z1.s}, {z30.s - z31.s} // 11000001-10111110-000110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be1819 <unknown>
-sub za.s[w10, 0, vgx2], {z18.s, z19.s}, {z20.s, z21.s} // 11000001, 10110100, 01011010, 01011000
+sub za.s[w10, 0, vgx2], {z18.s, z19.s}, {z20.s, z21.s} // 11000001-10110100-01011010-01011000
// CHECK-INST: sub za.s[w10, 0, vgx2], { z18.s, z19.s }, { z20.s, z21.s }
// CHECK-ENCODING: [0x58,0x5a,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -386,7 +386,7 @@ sub za.s[w10, 0], {z18.s - z19.s}, {z20.s - z21.s} // 11000001-10110100-010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b45a58 <unknown>
-sub za.s[w8, 0, vgx2], {z12.s, z13.s}, {z2.s, z3.s} // 11000001, 10100010, 00011001, 10011000
+sub za.s[w8, 0, vgx2], {z12.s, z13.s}, {z2.s, z3.s} // 11000001-10100010-00011001-10011000
// CHECK-INST: sub za.s[w8, 0, vgx2], { z12.s, z13.s }, { z2.s, z3.s }
// CHECK-ENCODING: [0x98,0x19,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -398,7 +398,7 @@ sub za.s[w8, 0], {z12.s - z13.s}, {z2.s - z3.s} // 11000001-10100010-000110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a21998 <unknown>
-sub za.s[w10, 1, vgx2], {z0.s, z1.s}, {z26.s, z27.s} // 11000001, 10111010, 01011000, 00011001
+sub za.s[w10, 1, vgx2], {z0.s, z1.s}, {z26.s, z27.s} // 11000001-10111010-01011000-00011001
// CHECK-INST: sub za.s[w10, 1, vgx2], { z0.s, z1.s }, { z26.s, z27.s }
// CHECK-ENCODING: [0x19,0x58,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -410,7 +410,7 @@ sub za.s[w10, 1], {z0.s - z1.s}, {z26.s - z27.s} // 11000001-10111010-01011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba5819 <unknown>
-sub za.s[w8, 5, vgx2], {z22.s, z23.s}, {z30.s, z31.s} // 11000001, 10111110, 00011010, 11011101
+sub za.s[w8, 5, vgx2], {z22.s, z23.s}, {z30.s, z31.s} // 11000001-10111110-00011010-11011101
// CHECK-INST: sub za.s[w8, 5, vgx2], { z22.s, z23.s }, { z30.s, z31.s }
// CHECK-ENCODING: [0xdd,0x1a,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -422,7 +422,7 @@ sub za.s[w8, 5], {z22.s - z23.s}, {z30.s - z31.s} // 11000001-10111110-0001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be1add <unknown>
-sub za.s[w11, 2, vgx2], {z8.s, z9.s}, {z0.s, z1.s} // 11000001, 10100000, 01111001, 00011010
+sub za.s[w11, 2, vgx2], {z8.s, z9.s}, {z0.s, z1.s} // 11000001-10100000-01111001-00011010
// CHECK-INST: sub za.s[w11, 2, vgx2], { z8.s, z9.s }, { z0.s, z1.s }
// CHECK-ENCODING: [0x1a,0x79,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -434,7 +434,7 @@ sub za.s[w11, 2], {z8.s - z9.s}, {z0.s - z1.s} // 11000001-10100000-0111100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a0791a <unknown>
-sub za.s[w9, 7, vgx2], {z12.s, z13.s}, {z10.s, z11.s} // 11000001, 10101010, 00111001, 10011111
+sub za.s[w9, 7, vgx2], {z12.s, z13.s}, {z10.s, z11.s} // 11000001-10101010-00111001-10011111
// CHECK-INST: sub za.s[w9, 7, vgx2], { z12.s, z13.s }, { z10.s, z11.s }
// CHECK-ENCODING: [0x9f,0x39,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -591,7 +591,7 @@ sub za.d[w9, 7], {z12.d, z13.d} // 11000001-11100000-00111101-10011111
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e03d9f <unknown>
-sub za.d[w8, 0, vgx2], {z0.d, z1.d}, z0.d // 11000001, 01100000, 00011000, 00011000
+sub za.d[w8, 0, vgx2], {z0.d, z1.d}, z0.d // 11000001-01100000-00011000-00011000
// CHECK-INST: sub za.d[w8, 0, vgx2], { z0.d, z1.d }, z0.d
// CHECK-ENCODING: [0x18,0x18,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -603,7 +603,7 @@ sub za.d[w8, 0], {z0.d - z1.d}, z0.d // 11000001-01100000-00011000-00011000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1601818 <unknown>
-sub za.d[w10, 5, vgx2], {z10.d, z11.d}, z5.d // 11000001, 01100101, 01011001, 01011101
+sub za.d[w10, 5, vgx2], {z10.d, z11.d}, z5.d // 11000001-01100101-01011001-01011101
// CHECK-INST: sub za.d[w10, 5, vgx2], { z10.d, z11.d }, z5.d
// CHECK-ENCODING: [0x5d,0x59,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -615,7 +615,7 @@ sub za.d[w10, 5], {z10.d - z11.d}, z5.d // 11000001-01100101-01011001-01011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c165595d <unknown>
-sub za.d[w11, 7, vgx2], {z13.d, z14.d}, z8.d // 11000001, 01101000, 01111001, 10111111
+sub za.d[w11, 7, vgx2], {z13.d, z14.d}, z8.d // 11000001-01101000-01111001-10111111
// CHECK-INST: sub za.d[w11, 7, vgx2], { z13.d, z14.d }, z8.d
// CHECK-ENCODING: [0xbf,0x79,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -627,7 +627,7 @@ sub za.d[w11, 7], {z13.d - z14.d}, z8.d // 11000001-01101000-01111001-10111
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16879bf <unknown>
-sub za.d[w11, 7, vgx2], {z31.d, z0.d}, z15.d // 11000001, 01101111, 01111011, 11111111
+sub za.d[w11, 7, vgx2], {z31.d, z0.d}, z15.d // 11000001-01101111-01111011-11111111
// CHECK-INST: sub za.d[w11, 7, vgx2], { z31.d, z0.d }, z15.d
// CHECK-ENCODING: [0xff,0x7b,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -639,7 +639,7 @@ sub za.d[w11, 7], {z31.d - z0.d}, z15.d // 11000001-01101111-01111011-11111
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f7bff <unknown>
-sub za.d[w8, 5, vgx2], {z17.d, z18.d}, z0.d // 11000001, 01100000, 00011010, 00111101
+sub za.d[w8, 5, vgx2], {z17.d, z18.d}, z0.d // 11000001-01100000-00011010-00111101
// CHECK-INST: sub za.d[w8, 5, vgx2], { z17.d, z18.d }, z0.d
// CHECK-ENCODING: [0x3d,0x1a,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -651,7 +651,7 @@ sub za.d[w8, 5], {z17.d - z18.d}, z0.d // 11000001-01100000-00011010-001111
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1601a3d <unknown>
-sub za.d[w8, 1, vgx2], {z1.d, z2.d}, z14.d // 11000001, 01101110, 00011000, 00111001
+sub za.d[w8, 1, vgx2], {z1.d, z2.d}, z14.d // 11000001-01101110-00011000-00111001
// CHECK-INST: sub za.d[w8, 1, vgx2], { z1.d, z2.d }, z14.d
// CHECK-ENCODING: [0x39,0x18,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -663,7 +663,7 @@ sub za.d[w8, 1], {z1.d - z2.d}, z14.d // 11000001-01101110-00011000-0011100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e1839 <unknown>
-sub za.d[w10, 0, vgx2], {z19.d, z20.d}, z4.d // 11000001, 01100100, 01011010, 01111000
+sub za.d[w10, 0, vgx2], {z19.d, z20.d}, z4.d // 11000001-01100100-01011010-01111000
// CHECK-INST: sub za.d[w10, 0, vgx2], { z19.d, z20.d }, z4.d
// CHECK-ENCODING: [0x78,0x5a,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -675,7 +675,7 @@ sub za.d[w10, 0], {z19.d - z20.d}, z4.d // 11000001-01100100-01011010-01111
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1645a78 <unknown>
-sub za.d[w8, 0, vgx2], {z12.d, z13.d}, z2.d // 11000001, 01100010, 00011001, 10011000
+sub za.d[w8, 0, vgx2], {z12.d, z13.d}, z2.d // 11000001-01100010-00011001-10011000
// CHECK-INST: sub za.d[w8, 0, vgx2], { z12.d, z13.d }, z2.d
// CHECK-ENCODING: [0x98,0x19,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -687,7 +687,7 @@ sub za.d[w8, 0], {z12.d - z13.d}, z2.d // 11000001-01100010-00011001-100110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1621998 <unknown>
-sub za.d[w10, 1, vgx2], {z1.d, z2.d}, z10.d // 11000001, 01101010, 01011000, 00111001
+sub za.d[w10, 1, vgx2], {z1.d, z2.d}, z10.d // 11000001-01101010-01011000-00111001
// CHECK-INST: sub za.d[w10, 1, vgx2], { z1.d, z2.d }, z10.d
// CHECK-ENCODING: [0x39,0x58,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -699,7 +699,7 @@ sub za.d[w10, 1], {z1.d - z2.d}, z10.d // 11000001-01101010-01011000-001110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a5839 <unknown>
-sub za.d[w8, 5, vgx2], {z22.d, z23.d}, z14.d // 11000001, 01101110, 00011010, 11011101
+sub za.d[w8, 5, vgx2], {z22.d, z23.d}, z14.d // 11000001-01101110-00011010-11011101
// CHECK-INST: sub za.d[w8, 5, vgx2], { z22.d, z23.d }, z14.d
// CHECK-ENCODING: [0xdd,0x1a,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -711,7 +711,7 @@ sub za.d[w8, 5], {z22.d - z23.d}, z14.d // 11000001-01101110-00011010-11011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e1add <unknown>
-sub za.d[w11, 2, vgx2], {z9.d, z10.d}, z1.d // 11000001, 01100001, 01111001, 00111010
+sub za.d[w11, 2, vgx2], {z9.d, z10.d}, z1.d // 11000001-01100001-01111001-00111010
// CHECK-INST: sub za.d[w11, 2, vgx2], { z9.d, z10.d }, z1.d
// CHECK-ENCODING: [0x3a,0x79,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -723,7 +723,7 @@ sub za.d[w11, 2], {z9.d - z10.d}, z1.d // 11000001-01100001-01111001-001110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c161793a <unknown>
-sub za.d[w9, 7, vgx2], {z12.d, z13.d}, z11.d // 11000001, 01101011, 00111001, 10011111
+sub za.d[w9, 7, vgx2], {z12.d, z13.d}, z11.d // 11000001-01101011-00111001-10011111
// CHECK-INST: sub za.d[w9, 7, vgx2], { z12.d, z13.d }, z11.d
// CHECK-ENCODING: [0x9f,0x39,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -736,7 +736,7 @@ sub za.d[w9, 7], {z12.d - z13.d}, z11.d // 11000001-01101011-00111001-10011
// CHECK-UNKNOWN: c16b399f <unknown>
-sub za.d[w8, 0, vgx2], {z0.d, z1.d}, {z0.d, z1.d} // 11000001, 11100000, 00011000, 00011000
+sub za.d[w8, 0, vgx2], {z0.d, z1.d}, {z0.d, z1.d} // 11000001-11100000-00011000-00011000
// CHECK-INST: sub za.d[w8, 0, vgx2], { z0.d, z1.d }, { z0.d, z1.d }
// CHECK-ENCODING: [0x18,0x18,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -748,7 +748,7 @@ sub za.d[w8, 0], {z0.d - z1.d}, {z0.d - z1.d} // 11000001-11100000-00011000
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e01818 <unknown>
-sub za.d[w10, 5, vgx2], {z10.d, z11.d}, {z20.d, z21.d} // 11000001, 11110100, 01011001, 01011101
+sub za.d[w10, 5, vgx2], {z10.d, z11.d}, {z20.d, z21.d} // 11000001-11110100-01011001-01011101
// CHECK-INST: sub za.d[w10, 5, vgx2], { z10.d, z11.d }, { z20.d, z21.d }
// CHECK-ENCODING: [0x5d,0x59,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -760,7 +760,7 @@ sub za.d[w10, 5], {z10.d - z11.d}, {z20.d - z21.d} // 11000001-11110100-010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f4595d <unknown>
-sub za.d[w11, 7, vgx2], {z12.d, z13.d}, {z8.d, z9.d} // 11000001, 11101000, 01111001, 10011111
+sub za.d[w11, 7, vgx2], {z12.d, z13.d}, {z8.d, z9.d} // 11000001-11101000-01111001-10011111
// CHECK-INST: sub za.d[w11, 7, vgx2], { z12.d, z13.d }, { z8.d, z9.d }
// CHECK-ENCODING: [0x9f,0x79,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -772,7 +772,7 @@ sub za.d[w11, 7], {z12.d - z13.d}, {z8.d - z9.d} // 11000001-11101000-01111
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e8799f <unknown>
-sub za.d[w11, 7, vgx2], {z30.d, z31.d}, {z30.d, z31.d} // 11000001, 11111110, 01111011, 11011111
+sub za.d[w11, 7, vgx2], {z30.d, z31.d}, {z30.d, z31.d} // 11000001-11111110-01111011-11011111
// CHECK-INST: sub za.d[w11, 7, vgx2], { z30.d, z31.d }, { z30.d, z31.d }
// CHECK-ENCODING: [0xdf,0x7b,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -784,7 +784,7 @@ sub za.d[w11, 7], {z30.d - z31.d}, {z30.d - z31.d} // 11000001-11111110-011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe7bdf <unknown>
-sub za.d[w8, 5, vgx2], {z16.d, z17.d}, {z16.d, z17.d} // 11000001, 11110000, 00011010, 00011101
+sub za.d[w8, 5, vgx2], {z16.d, z17.d}, {z16.d, z17.d} // 11000001-11110000-00011010-00011101
// CHECK-INST: sub za.d[w8, 5, vgx2], { z16.d, z17.d }, { z16.d, z17.d }
// CHECK-ENCODING: [0x1d,0x1a,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -796,7 +796,7 @@ sub za.d[w8, 5], {z16.d - z17.d}, {z16.d - z17.d} // 11000001-11110000-0001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f01a1d <unknown>
-sub za.d[w8, 1, vgx2], {z0.d, z1.d}, {z30.d, z31.d} // 11000001, 11111110, 00011000, 00011001
+sub za.d[w8, 1, vgx2], {z0.d, z1.d}, {z30.d, z31.d} // 11000001-11111110-00011000-00011001
// CHECK-INST: sub za.d[w8, 1, vgx2], { z0.d, z1.d }, { z30.d, z31.d }
// CHECK-ENCODING: [0x19,0x18,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -808,7 +808,7 @@ sub za.d[w8, 1], {z0.d - z1.d}, {z30.d - z31.d} // 11000001-11111110-000110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe1819 <unknown>
-sub za.d[w10, 0, vgx2], {z18.d, z19.d}, {z20.d, z21.d} // 11000001, 11110100, 01011010, 01011000
+sub za.d[w10, 0, vgx2], {z18.d, z19.d}, {z20.d, z21.d} // 11000001-11110100-01011010-01011000
// CHECK-INST: sub za.d[w10, 0, vgx2], { z18.d, z19.d }, { z20.d, z21.d }
// CHECK-ENCODING: [0x58,0x5a,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -820,7 +820,7 @@ sub za.d[w10, 0], {z18.d - z19.d}, {z20.d - z21.d} // 11000001-11110100-010
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f45a58 <unknown>
-sub za.d[w8, 0, vgx2], {z12.d, z13.d}, {z2.d, z3.d} // 11000001, 11100010, 00011001, 10011000
+sub za.d[w8, 0, vgx2], {z12.d, z13.d}, {z2.d, z3.d} // 11000001-11100010-00011001-10011000
// CHECK-INST: sub za.d[w8, 0, vgx2], { z12.d, z13.d }, { z2.d, z3.d }
// CHECK-ENCODING: [0x98,0x19,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -832,7 +832,7 @@ sub za.d[w8, 0], {z12.d - z13.d}, {z2.d - z3.d} // 11000001-11100010-000110
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e21998 <unknown>
-sub za.d[w10, 1, vgx2], {z0.d, z1.d}, {z26.d, z27.d} // 11000001, 11111010, 01011000, 00011001
+sub za.d[w10, 1, vgx2], {z0.d, z1.d}, {z26.d, z27.d} // 11000001-11111010-01011000-00011001
// CHECK-INST: sub za.d[w10, 1, vgx2], { z0.d, z1.d }, { z26.d, z27.d }
// CHECK-ENCODING: [0x19,0x58,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -844,7 +844,7 @@ sub za.d[w10, 1], {z0.d - z1.d}, {z26.d - z27.d} // 11000001-11111010-01011
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa5819 <unknown>
-sub za.d[w8, 5, vgx2], {z22.d, z23.d}, {z30.d, z31.d} // 11000001, 11111110, 00011010, 11011101
+sub za.d[w8, 5, vgx2], {z22.d, z23.d}, {z30.d, z31.d} // 11000001-11111110-00011010-11011101
// CHECK-INST: sub za.d[w8, 5, vgx2], { z22.d, z23.d }, { z30.d, z31.d }
// CHECK-ENCODING: [0xdd,0x1a,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -856,7 +856,7 @@ sub za.d[w8, 5], {z22.d - z23.d}, {z30.d - z31.d} // 11000001-11111110-0001
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe1add <unknown>
-sub za.d[w11, 2, vgx2], {z8.d, z9.d}, {z0.d, z1.d} // 11000001, 11100000, 01111001, 00011010
+sub za.d[w11, 2, vgx2], {z8.d, z9.d}, {z0.d, z1.d} // 11000001-11100000-01111001-00011010
// CHECK-INST: sub za.d[w11, 2, vgx2], { z8.d, z9.d }, { z0.d, z1.d }
// CHECK-ENCODING: [0x1a,0x79,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
@@ -868,7 +868,7 @@ sub za.d[w11, 2], {z8.d - z9.d}, {z0.d - z1.d} // 11000001-11100000-0111100
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e0791a <unknown>
-sub za.d[w9, 7, vgx2], {z12.d, z13.d}, {z10.d, z11.d} // 11000001, 11101010, 00111001, 10011111
+sub za.d[w9, 7, vgx2], {z12.d, z13.d}, {z10.d, z11.d} // 11000001-11101010-00111001-10011111
// CHECK-INST: sub za.d[w9, 7, vgx2], { z12.d, z13.d }, { z10.d, z11.d }
// CHECK-ENCODING: [0x9f,0x39,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
diff --git a/llvm/test/MC/AArch64/SME2/sumlall.s b/llvm/test/MC/AArch64/SME2/sumlall.s
index 9bd7c50dcff54..ee1f72ae5e57c 100644
--- a/llvm/test/MC/AArch64/SME2/sumlall.s
+++ b/llvm/test/MC/AArch64/SME2/sumlall.s
@@ -158,436 +158,436 @@ usmlall za.s[w9, 12:15], z12.b, z11.b[10] // 11000001-00001011-10101001-1000011
// CHECK-UNKNOWN: c10ba987 <unknown>
-usmlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b // 11000001, 00100000, 00000000, 00000100
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
+usmlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b // 11000001-00100000-00000000-00000100
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
// CHECK-ENCODING: [0x04,0x00,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200004 <unknown>
usmlall za.s[w8, 0:3], {z0.b - z1.b}, z0.b // 11000001-00100000-00000000-00000100
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
// CHECK-ENCODING: [0x04,0x00,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200004 <unknown>
-usmlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b // 11000001, 00100101, 01000001, 01000101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
+usmlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b // 11000001-00100101-01000001-01000101
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
// CHECK-ENCODING: [0x45,0x41,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254145 <unknown>
usmlall za.s[w10, 4:7], {z10.b - z11.b}, z5.b // 11000001-00100101-01000001-01000101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
// CHECK-ENCODING: [0x45,0x41,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254145 <unknown>
-usmlall za.s[w11, 4:7, vgx2], {z13.b, z14.b}, z8.b // 11000001, 00101000, 01100001, 10100101
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
+usmlall za.s[w11, 4:7, vgx2], {z13.b, z14.b}, z8.b // 11000001-00101000-01100001-10100101
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
// CHECK-ENCODING: [0xa5,0x61,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12861a5 <unknown>
usmlall za.s[w11, 4:7], {z13.b - z14.b}, z8.b // 11000001-00101000-01100001-10100101
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
// CHECK-ENCODING: [0xa5,0x61,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12861a5 <unknown>
-usmlall za.s[w11, 4:7, vgx2], {z31.b, z0.b}, z15.b // 11000001, 00101111, 01100011, 11100101
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
+usmlall za.s[w11, 4:7, vgx2], {z31.b, z0.b}, z15.b // 11000001-00101111-01100011-11100101
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
// CHECK-ENCODING: [0xe5,0x63,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f63e5 <unknown>
usmlall za.s[w11, 4:7], {z31.b - z0.b}, z15.b // 11000001-00101111-01100011-11100101
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
// CHECK-ENCODING: [0xe5,0x63,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f63e5 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z17.b, z18.b}, z0.b // 11000001, 00100000, 00000010, 00100101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
+usmlall za.s[w8, 4:7, vgx2], {z17.b, z18.b}, z0.b // 11000001-00100000-00000010-00100101
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
// CHECK-ENCODING: [0x25,0x02,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200225 <unknown>
usmlall za.s[w8, 4:7], {z17.b - z18.b}, z0.b // 11000001-00100000-00000010-00100101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
// CHECK-ENCODING: [0x25,0x02,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200225 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z1.b, z2.b}, z14.b // 11000001, 00101110, 00000000, 00100101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
+usmlall za.s[w8, 4:7, vgx2], {z1.b, z2.b}, z14.b // 11000001-00101110-00000000-00100101
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
// CHECK-ENCODING: [0x25,0x00,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0025 <unknown>
usmlall za.s[w8, 4:7], {z1.b - z2.b}, z14.b // 11000001-00101110-00000000-00100101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
// CHECK-ENCODING: [0x25,0x00,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0025 <unknown>
-usmlall za.s[w10, 0:3, vgx2], {z19.b, z20.b}, z4.b // 11000001, 00100100, 01000010, 01100100
-// CHECK, INST: usmlall za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
+usmlall za.s[w10, 0:3, vgx2], {z19.b, z20.b}, z4.b // 11000001-00100100-01000010-01100100
+// CHECK-INST: usmlall za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
// CHECK-ENCODING: [0x64,0x42,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244264 <unknown>
usmlall za.s[w10, 0:3], {z19.b - z20.b}, z4.b // 11000001-00100100-01000010-01100100
-// CHECK, INST: usmlall za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
+// CHECK-INST: usmlall za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
// CHECK-ENCODING: [0x64,0x42,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244264 <unknown>
-usmlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b // 11000001, 00100010, 00000001, 10000100
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
+usmlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b // 11000001-00100010-00000001-10000100
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
// CHECK-ENCODING: [0x84,0x01,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220184 <unknown>
usmlall za.s[w8, 0:3], {z12.b - z13.b}, z2.b // 11000001-00100010-00000001-10000100
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
// CHECK-ENCODING: [0x84,0x01,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220184 <unknown>
-usmlall za.s[w10, 4:7, vgx2], {z1.b, z2.b}, z10.b // 11000001, 00101010, 01000000, 00100101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
+usmlall za.s[w10, 4:7, vgx2], {z1.b, z2.b}, z10.b // 11000001-00101010-01000000-00100101
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
// CHECK-ENCODING: [0x25,0x40,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4025 <unknown>
usmlall za.s[w10, 4:7], {z1.b - z2.b}, z10.b // 11000001-00101010-01000000-00100101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
// CHECK-ENCODING: [0x25,0x40,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4025 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b // 11000001, 00101110, 00000010, 11000101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
+usmlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b // 11000001-00101110-00000010-11000101
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
// CHECK-ENCODING: [0xc5,0x02,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e02c5 <unknown>
usmlall za.s[w8, 4:7], {z22.b - z23.b}, z14.b // 11000001-00101110-00000010-11000101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
// CHECK-ENCODING: [0xc5,0x02,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e02c5 <unknown>
-usmlall za.s[w11, 0:3, vgx2], {z9.b, z10.b}, z1.b // 11000001, 00100001, 01100001, 00100100
-// CHECK, INST: usmlall za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
+usmlall za.s[w11, 0:3, vgx2], {z9.b, z10.b}, z1.b // 11000001-00100001-01100001-00100100
+// CHECK-INST: usmlall za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
// CHECK-ENCODING: [0x24,0x61,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1216124 <unknown>
usmlall za.s[w11, 0:3], {z9.b - z10.b}, z1.b // 11000001-00100001-01100001-00100100
-// CHECK, INST: usmlall za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
+// CHECK-INST: usmlall za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
// CHECK-ENCODING: [0x24,0x61,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1216124 <unknown>
-usmlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b // 11000001, 00101011, 00100001, 10000101
-// CHECK, INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
+usmlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b // 11000001-00101011-00100001-10000101
+// CHECK-INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
// CHECK-ENCODING: [0x85,0x21,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b2185 <unknown>
usmlall za.s[w9, 4:7], {z12.b - z13.b}, z11.b // 11000001-00101011-00100001-10000101
-// CHECK, INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
+// CHECK-INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
// CHECK-ENCODING: [0x85,0x21,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b2185 <unknown>
-usmlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b[0] // 11000001, 00010000, 00000000, 00100000
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
+usmlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b[0] // 11000001-00010000-00000000-00100000
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
// CHECK-ENCODING: [0x20,0x00,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100020 <unknown>
usmlall za.s[w8, 0:3], {z0.b - z1.b}, z0.b[0] // 11000001-00010000-00000000-00100000
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
// CHECK-ENCODING: [0x20,0x00,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100020 <unknown>
-usmlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b[6] // 11000001, 00010101, 01000101, 01100101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
+usmlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b[6] // 11000001-00010101-01000101-01100101
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
// CHECK-ENCODING: [0x65,0x45,0x15,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1154565 <unknown>
usmlall za.s[w10, 4:7], {z10.b - z11.b}, z5.b[6] // 11000001-00010101-01000101-01100101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
// CHECK-ENCODING: [0x65,0x45,0x15,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1154565 <unknown>
-usmlall za.s[w11, 4:7, vgx2], {z12.b, z13.b}, z8.b[15] // 11000001, 00011000, 01101101, 10100111
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
+usmlall za.s[w11, 4:7, vgx2], {z12.b, z13.b}, z8.b[15] // 11000001-00011000-01101101-10100111
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
// CHECK-ENCODING: [0xa7,0x6d,0x18,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1186da7 <unknown>
usmlall za.s[w11, 4:7], {z12.b - z13.b}, z8.b[15] // 11000001-00011000-01101101-10100111
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
// CHECK-ENCODING: [0xa7,0x6d,0x18,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1186da7 <unknown>
-usmlall za.s[w11, 4:7, vgx2], {z30.b, z31.b}, z15.b[15] // 11000001, 00011111, 01101111, 11100111
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
+usmlall za.s[w11, 4:7, vgx2], {z30.b, z31.b}, z15.b[15] // 11000001-00011111-01101111-11100111
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
// CHECK-ENCODING: [0xe7,0x6f,0x1f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11f6fe7 <unknown>
usmlall za.s[w11, 4:7], {z30.b - z31.b}, z15.b[15] // 11000001-00011111-01101111-11100111
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
// CHECK-ENCODING: [0xe7,0x6f,0x1f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11f6fe7 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z16.b, z17.b}, z0.b[14] // 11000001, 00010000, 00001110, 00100101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
+usmlall za.s[w8, 4:7, vgx2], {z16.b, z17.b}, z0.b[14] // 11000001-00010000-00001110-00100101
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
// CHECK-ENCODING: [0x25,0x0e,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100e25 <unknown>
usmlall za.s[w8, 4:7], {z16.b - z17.b}, z0.b[14] // 11000001-00010000-00001110-00100101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
// CHECK-ENCODING: [0x25,0x0e,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100e25 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z0.b, z1.b}, z14.b[4] // 11000001, 00011110, 00000100, 00100001
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
+usmlall za.s[w8, 4:7, vgx2], {z0.b, z1.b}, z14.b[4] // 11000001-00011110-00000100-00100001
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
// CHECK-ENCODING: [0x21,0x04,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0421 <unknown>
usmlall za.s[w8, 4:7], {z0.b - z1.b}, z14.b[4] // 11000001-00011110-00000100-00100001
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
// CHECK-ENCODING: [0x21,0x04,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0421 <unknown>
-usmlall za.s[w10, 0:3, vgx2], {z18.b, z19.b}, z4.b[4] // 11000001, 00010100, 01000110, 01100000
-// CHECK, INST: usmlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
+usmlall za.s[w10, 0:3, vgx2], {z18.b, z19.b}, z4.b[4] // 11000001-00010100-01000110-01100000
+// CHECK-INST: usmlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
// CHECK-ENCODING: [0x60,0x46,0x14,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1144660 <unknown>
usmlall za.s[w10, 0:3], {z18.b - z19.b}, z4.b[4] // 11000001-00010100-01000110-01100000
-// CHECK, INST: usmlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
+// CHECK-INST: usmlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
// CHECK-ENCODING: [0x60,0x46,0x14,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1144660 <unknown>
-usmlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b[8] // 11000001, 00010010, 00001001, 10100000
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
+usmlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b[8] // 11000001-00010010-00001001-10100000
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
// CHECK-ENCODING: [0xa0,0x09,0x12,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11209a0 <unknown>
usmlall za.s[w8, 0:3], {z12.b - z13.b}, z2.b[8] // 11000001-00010010-00001001-10100000
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
// CHECK-ENCODING: [0xa0,0x09,0x12,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11209a0 <unknown>
-usmlall za.s[w10, 4:7, vgx2], {z0.b, z1.b}, z10.b[8] // 11000001, 00011010, 01001000, 00100001
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
+usmlall za.s[w10, 4:7, vgx2], {z0.b, z1.b}, z10.b[8] // 11000001-00011010-01001000-00100001
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
// CHECK-ENCODING: [0x21,0x48,0x1a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11a4821 <unknown>
usmlall za.s[w10, 4:7], {z0.b - z1.b}, z10.b[8] // 11000001-00011010-01001000-00100001
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
// CHECK-ENCODING: [0x21,0x48,0x1a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11a4821 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b[10] // 11000001, 00011110, 00001010, 11100101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
+usmlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b[10] // 11000001-00011110-00001010-11100101
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
// CHECK-ENCODING: [0xe5,0x0a,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0ae5 <unknown>
usmlall za.s[w8, 4:7], {z22.b - z23.b}, z14.b[10] // 11000001-00011110-00001010-11100101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
// CHECK-ENCODING: [0xe5,0x0a,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0ae5 <unknown>
-usmlall za.s[w11, 0:3, vgx2], {z8.b, z9.b}, z1.b[5] // 11000001, 00010001, 01100101, 00100010
-// CHECK, INST: usmlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
+usmlall za.s[w11, 0:3, vgx2], {z8.b, z9.b}, z1.b[5] // 11000001-00010001-01100101-00100010
+// CHECK-INST: usmlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
// CHECK-ENCODING: [0x22,0x65,0x11,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1116522 <unknown>
usmlall za.s[w11, 0:3], {z8.b - z9.b}, z1.b[5] // 11000001-00010001-01100101-00100010
-// CHECK, INST: usmlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
+// CHECK-INST: usmlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
// CHECK-ENCODING: [0x22,0x65,0x11,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1116522 <unknown>
-usmlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b[11] // 11000001, 00011011, 00101001, 10100111
-// CHECK, INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
+usmlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b[11] // 11000001-00011011-00101001-10100111
+// CHECK-INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
// CHECK-ENCODING: [0xa7,0x29,0x1b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11b29a7 <unknown>
usmlall za.s[w9, 4:7], {z12.b - z13.b}, z11.b[11] // 11000001-00011011-00101001-10100111
-// CHECK, INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
+// CHECK-INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
// CHECK-ENCODING: [0xa7,0x29,0x1b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11b29a7 <unknown>
-usmlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, {z0.b, z1.b} // 11000001, 10100000, 00000000, 00000100
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
+usmlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, {z0.b, z1.b} // 11000001-10100000-00000000-00000100
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x04,0x00,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00004 <unknown>
usmlall za.s[w8, 0:3], {z0.b - z1.b}, {z0.b - z1.b} // 11000001-10100000-00000000-00000100
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x04,0x00,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00004 <unknown>
-usmlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, {z20.b, z21.b} // 11000001, 10110100, 01000001, 01000101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
+usmlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, {z20.b, z21.b} // 11000001-10110100-01000001-01000101
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x45,0x41,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44145 <unknown>
usmlall za.s[w10, 4:7], {z10.b - z11.b}, {z20.b - z21.b} // 11000001-10110100-01000001-01000101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x45,0x41,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44145 <unknown>
-usmlall za.s[w11, 4:7, vgx2], {z12.b, z13.b}, {z8.b, z9.b} // 11000001, 10101000, 01100001, 10000101
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
+usmlall za.s[w11, 4:7, vgx2], {z12.b, z13.b}, {z8.b, z9.b} // 11000001-10101000-01100001-10000101
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
// CHECK-ENCODING: [0x85,0x61,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a86185 <unknown>
usmlall za.s[w11, 4:7], {z12.b - z13.b}, {z8.b - z9.b} // 11000001-10101000-01100001-10000101
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
// CHECK-ENCODING: [0x85,0x61,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a86185 <unknown>
-usmlall za.s[w11, 4:7, vgx2], {z30.b, z31.b}, {z30.b, z31.b} // 11000001, 10111110, 01100011, 11000101
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
+usmlall za.s[w11, 4:7, vgx2], {z30.b, z31.b}, {z30.b, z31.b} // 11000001-10111110-01100011-11000101
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xc5,0x63,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be63c5 <unknown>
usmlall za.s[w11, 4:7], {z30.b - z31.b}, {z30.b - z31.b} // 11000001-10111110-01100011-11000101
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xc5,0x63,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be63c5 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z16.b, z17.b}, {z16.b, z17.b} // 11000001, 10110000, 00000010, 00000101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
+usmlall za.s[w8, 4:7, vgx2], {z16.b, z17.b}, {z16.b, z17.b} // 11000001-10110000-00000010-00000101
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
// CHECK-ENCODING: [0x05,0x02,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00205 <unknown>
usmlall za.s[w8, 4:7], {z16.b - z17.b}, {z16.b - z17.b} // 11000001-10110000-00000010-00000101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
// CHECK-ENCODING: [0x05,0x02,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00205 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z0.b, z1.b}, {z30.b, z31.b} // 11000001, 10111110, 00000000, 00000101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
+usmlall za.s[w8, 4:7, vgx2], {z0.b, z1.b}, {z30.b, z31.b} // 11000001-10111110-00000000-00000101
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0x05,0x00,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0005 <unknown>
usmlall za.s[w8, 4:7], {z0.b - z1.b}, {z30.b - z31.b} // 11000001-10111110-00000000-00000101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0x05,0x00,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0005 <unknown>
-usmlall za.s[w10, 0:3, vgx2], {z18.b, z19.b}, {z20.b, z21.b} // 11000001, 10110100, 01000010, 01000100
-// CHECK, INST: usmlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
+usmlall za.s[w10, 0:3, vgx2], {z18.b, z19.b}, {z20.b, z21.b} // 11000001-10110100-01000010-01000100
+// CHECK-INST: usmlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x44,0x42,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44244 <unknown>
usmlall za.s[w10, 0:3], {z18.b - z19.b}, {z20.b - z21.b} // 11000001-10110100-01000010-01000100
-// CHECK, INST: usmlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
+// CHECK-INST: usmlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x44,0x42,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44244 <unknown>
-usmlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, {z2.b, z3.b} // 11000001, 10100010, 00000001, 10000100
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
+usmlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, {z2.b, z3.b} // 11000001-10100010-00000001-10000100
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
// CHECK-ENCODING: [0x84,0x01,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20184 <unknown>
usmlall za.s[w8, 0:3], {z12.b - z13.b}, {z2.b - z3.b} // 11000001-10100010-00000001-10000100
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
// CHECK-ENCODING: [0x84,0x01,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20184 <unknown>
-usmlall za.s[w10, 4:7, vgx2], {z0.b, z1.b}, {z26.b, z27.b} // 11000001, 10111010, 01000000, 00000101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
+usmlall za.s[w10, 4:7, vgx2], {z0.b, z1.b}, {z26.b, z27.b} // 11000001-10111010-01000000-00000101
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
// CHECK-ENCODING: [0x05,0x40,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4005 <unknown>
usmlall za.s[w10, 4:7], {z0.b - z1.b}, {z26.b - z27.b} // 11000001-10111010-01000000-00000101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
// CHECK-ENCODING: [0x05,0x40,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4005 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, {z30.b, z31.b} // 11000001, 10111110, 00000010, 11000101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
+usmlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, {z30.b, z31.b} // 11000001-10111110-00000010-11000101
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xc5,0x02,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be02c5 <unknown>
usmlall za.s[w8, 4:7], {z22.b - z23.b}, {z30.b - z31.b} // 11000001-10111110-00000010-11000101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xc5,0x02,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be02c5 <unknown>
-usmlall za.s[w11, 0:3, vgx2], {z8.b, z9.b}, {z0.b, z1.b} // 11000001, 10100000, 01100001, 00000100
-// CHECK, INST: usmlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
+usmlall za.s[w11, 0:3, vgx2], {z8.b, z9.b}, {z0.b, z1.b} // 11000001-10100000-01100001-00000100
+// CHECK-INST: usmlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x04,0x61,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a06104 <unknown>
usmlall za.s[w11, 0:3], {z8.b - z9.b}, {z0.b - z1.b} // 11000001-10100000-01100001-00000100
-// CHECK, INST: usmlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
+// CHECK-INST: usmlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x04,0x61,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a06104 <unknown>
-usmlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, {z10.b, z11.b} // 11000001, 10101010, 00100001, 10000101
-// CHECK, INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
+usmlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, {z10.b, z11.b} // 11000001-10101010-00100001-10000101
+// CHECK-INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
// CHECK-ENCODING: [0x85,0x21,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa2185 <unknown>
usmlall za.s[w9, 4:7], {z12.b - z13.b}, {z10.b - z11.b} // 11000001-10101010-00100001-10000101
-// CHECK, INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
+// CHECK-INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
// CHECK-ENCODING: [0x85,0x21,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa2185 <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/umlal.s b/llvm/test/MC/AArch64/SME2/umlal.s
index 3d5d428388f88..238e9ff44531a 100644
--- a/llvm/test/MC/AArch64/SME2/umlal.s
+++ b/llvm/test/MC/AArch64/SME2/umlal.s
@@ -158,436 +158,436 @@ umlal za.s[w9, 14:15], z12.h, z11.h[6] // 11000001-11001011-10111001-10010111
// CHECK-UNKNOWN: c1cbb997 <unknown>
-umlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h // 11000001, 01100000, 00001000, 00010000
-// CHECK, INST: umlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+umlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h // 11000001-01100000-00001000-00010000
+// CHECK-INST: umlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x10,0x08,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600810 <unknown>
umlal za.s[w8, 0:1], {z0.h - z1.h}, z0.h // 11000001-01100000-00001000-00010000
-// CHECK, INST: umlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+// CHECK-INST: umlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x10,0x08,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600810 <unknown>
-umlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h // 11000001, 01100101, 01001001, 01010001
-// CHECK, INST: umlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
+umlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h // 11000001-01100101-01001001-01010001
+// CHECK-INST: umlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x51,0x49,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1654951 <unknown>
umlal za.s[w10, 2:3], {z10.h - z11.h}, z5.h // 11000001-01100101-01001001-01010001
-// CHECK, INST: umlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
+// CHECK-INST: umlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x51,0x49,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1654951 <unknown>
-umlal za.s[w11, 6:7, vgx2], {z13.h, z14.h}, z8.h // 11000001, 01101000, 01101001, 10110011
-// CHECK, INST: umlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
+umlal za.s[w11, 6:7, vgx2], {z13.h, z14.h}, z8.h // 11000001-01101000-01101001-10110011
+// CHECK-INST: umlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xb3,0x69,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16869b3 <unknown>
umlal za.s[w11, 6:7], {z13.h - z14.h}, z8.h // 11000001-01101000-01101001-10110011
-// CHECK, INST: umlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
+// CHECK-INST: umlal za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xb3,0x69,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16869b3 <unknown>
-umlal za.s[w11, 6:7, vgx2], {z31.h, z0.h}, z15.h // 11000001, 01101111, 01101011, 11110011
-// CHECK, INST: umlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
+umlal za.s[w11, 6:7, vgx2], {z31.h, z0.h}, z15.h // 11000001-01101111-01101011-11110011
+// CHECK-INST: umlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xf3,0x6b,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f6bf3 <unknown>
umlal za.s[w11, 6:7], {z31.h - z0.h}, z15.h // 11000001-01101111-01101011-11110011
-// CHECK, INST: umlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
+// CHECK-INST: umlal za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xf3,0x6b,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f6bf3 <unknown>
-umlal za.s[w8, 2:3, vgx2], {z17.h, z18.h}, z0.h // 11000001, 01100000, 00001010, 00110001
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
+umlal za.s[w8, 2:3, vgx2], {z17.h, z18.h}, z0.h // 11000001-01100000-00001010-00110001
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x31,0x0a,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600a31 <unknown>
umlal za.s[w8, 2:3], {z17.h - z18.h}, z0.h // 11000001-01100000-00001010-00110001
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x31,0x0a,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600a31 <unknown>
-umlal za.s[w8, 2:3, vgx2], {z1.h, z2.h}, z14.h // 11000001, 01101110, 00001000, 00110001
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
+umlal za.s[w8, 2:3, vgx2], {z1.h, z2.h}, z14.h // 11000001-01101110-00001000-00110001
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x31,0x08,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0831 <unknown>
umlal za.s[w8, 2:3], {z1.h - z2.h}, z14.h // 11000001-01101110-00001000-00110001
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x31,0x08,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0831 <unknown>
-umlal za.s[w10, 0:1, vgx2], {z19.h, z20.h}, z4.h // 11000001, 01100100, 01001010, 01110000
-// CHECK, INST: umlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
+umlal za.s[w10, 0:1, vgx2], {z19.h, z20.h}, z4.h // 11000001-01100100-01001010-01110000
+// CHECK-INST: umlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x70,0x4a,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1644a70 <unknown>
umlal za.s[w10, 0:1], {z19.h - z20.h}, z4.h // 11000001-01100100-01001010-01110000
-// CHECK, INST: umlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
+// CHECK-INST: umlal za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x70,0x4a,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1644a70 <unknown>
-umlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h // 11000001, 01100010, 00001001, 10010000
-// CHECK, INST: umlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
+umlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h // 11000001-01100010-00001001-10010000
+// CHECK-INST: umlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x90,0x09,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1620990 <unknown>
umlal za.s[w8, 0:1], {z12.h - z13.h}, z2.h // 11000001-01100010-00001001-10010000
-// CHECK, INST: umlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
+// CHECK-INST: umlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x90,0x09,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1620990 <unknown>
-umlal za.s[w10, 2:3, vgx2], {z1.h, z2.h}, z10.h // 11000001, 01101010, 01001000, 00110001
-// CHECK, INST: umlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
+umlal za.s[w10, 2:3, vgx2], {z1.h, z2.h}, z10.h // 11000001-01101010-01001000-00110001
+// CHECK-INST: umlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x31,0x48,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a4831 <unknown>
umlal za.s[w10, 2:3], {z1.h - z2.h}, z10.h // 11000001-01101010-01001000-00110001
-// CHECK, INST: umlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
+// CHECK-INST: umlal za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x31,0x48,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a4831 <unknown>
-umlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h // 11000001, 01101110, 00001010, 11010001
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
+umlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h // 11000001-01101110-00001010-11010001
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xd1,0x0a,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0ad1 <unknown>
umlal za.s[w8, 2:3], {z22.h - z23.h}, z14.h // 11000001-01101110-00001010-11010001
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xd1,0x0a,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0ad1 <unknown>
-umlal za.s[w11, 4:5, vgx2], {z9.h, z10.h}, z1.h // 11000001, 01100001, 01101001, 00110010
-// CHECK, INST: umlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
+umlal za.s[w11, 4:5, vgx2], {z9.h, z10.h}, z1.h // 11000001-01100001-01101001-00110010
+// CHECK-INST: umlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x32,0x69,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1616932 <unknown>
umlal za.s[w11, 4:5], {z9.h - z10.h}, z1.h // 11000001-01100001-01101001-00110010
-// CHECK, INST: umlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
+// CHECK-INST: umlal za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x32,0x69,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1616932 <unknown>
-umlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h // 11000001, 01101011, 00101001, 10010011
-// CHECK, INST: umlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
+umlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h // 11000001-01101011-00101001-10010011
+// CHECK-INST: umlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x93,0x29,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16b2993 <unknown>
umlal za.s[w9, 6:7], {z12.h - z13.h}, z11.h // 11000001-01101011-00101001-10010011
-// CHECK, INST: umlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
+// CHECK-INST: umlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x93,0x29,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16b2993 <unknown>
-umlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001, 11010000, 00010000, 00010000
-// CHECK, INST: umlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
+umlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001-11010000-00010000-00010000
+// CHECK-INST: umlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x10,0x10,0xd0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d01010 <unknown>
umlal za.s[w8, 0:1], {z0.h - z1.h}, z0.h[0] // 11000001-11010000-00010000-00010000
-// CHECK, INST: umlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
+// CHECK-INST: umlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x10,0x10,0xd0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d01010 <unknown>
-umlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h[3] // 11000001, 11010101, 01010101, 01010101
-// CHECK, INST: umlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
+umlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h[3] // 11000001-11010101-01010101-01010101
+// CHECK-INST: umlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
// CHECK-ENCODING: [0x55,0x55,0xd5,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d55555 <unknown>
umlal za.s[w10, 2:3], {z10.h - z11.h}, z5.h[3] // 11000001-11010101-01010101-01010101
-// CHECK, INST: umlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
+// CHECK-INST: umlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
// CHECK-ENCODING: [0x55,0x55,0xd5,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d55555 <unknown>
-umlal za.s[w11, 6:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001, 11011000, 01111101, 10010111
-// CHECK, INST: umlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
+umlal za.s[w11, 6:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001-11011000-01111101-10010111
+// CHECK-INST: umlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x97,0x7d,0xd8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d87d97 <unknown>
umlal za.s[w11, 6:7], {z12.h - z13.h}, z8.h[7] // 11000001-11011000-01111101-10010111
-// CHECK, INST: umlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
+// CHECK-INST: umlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x97,0x7d,0xd8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d87d97 <unknown>
-umlal za.s[w11, 6:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001, 11011111, 01111111, 11010111
-// CHECK, INST: umlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
+umlal za.s[w11, 6:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001-11011111-01111111-11010111
+// CHECK-INST: umlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xd7,0x7f,0xdf,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1df7fd7 <unknown>
umlal za.s[w11, 6:7], {z30.h - z31.h}, z15.h[7] // 11000001-11011111-01111111-11010111
-// CHECK, INST: umlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
+// CHECK-INST: umlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xd7,0x7f,0xdf,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1df7fd7 <unknown>
-umlal za.s[w8, 2:3, vgx2], {z16.h, z17.h}, z0.h[7] // 11000001, 11010000, 00011110, 00010101
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
+umlal za.s[w8, 2:3, vgx2], {z16.h, z17.h}, z0.h[7] // 11000001-11010000-00011110-00010101
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
// CHECK-ENCODING: [0x15,0x1e,0xd0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d01e15 <unknown>
umlal za.s[w8, 2:3], {z16.h - z17.h}, z0.h[7] // 11000001-11010000-00011110-00010101
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
// CHECK-ENCODING: [0x15,0x1e,0xd0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d01e15 <unknown>
-umlal za.s[w8, 2:3, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001, 11011110, 00010100, 00010001
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
+umlal za.s[w8, 2:3, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001-11011110-00010100-00010001
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x11,0x14,0xde,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1de1411 <unknown>
umlal za.s[w8, 2:3], {z0.h - z1.h}, z14.h[2] // 11000001-11011110-00010100-00010001
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x11,0x14,0xde,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1de1411 <unknown>
-umlal za.s[w10, 0:1, vgx2], {z18.h, z19.h}, z4.h[2] // 11000001, 11010100, 01010110, 01010000
-// CHECK, INST: umlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
+umlal za.s[w10, 0:1, vgx2], {z18.h, z19.h}, z4.h[2] // 11000001-11010100-01010110-01010000
+// CHECK-INST: umlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
// CHECK-ENCODING: [0x50,0x56,0xd4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d45650 <unknown>
umlal za.s[w10, 0:1], {z18.h - z19.h}, z4.h[2] // 11000001-11010100-01010110-01010000
-// CHECK, INST: umlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
+// CHECK-INST: umlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
// CHECK-ENCODING: [0x50,0x56,0xd4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d45650 <unknown>
-umlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001, 11010010, 00011001, 10010000
-// CHECK, INST: umlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
+umlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001-11010010-00011001-10010000
+// CHECK-INST: umlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0x90,0x19,0xd2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d21990 <unknown>
umlal za.s[w8, 0:1], {z12.h - z13.h}, z2.h[4] // 11000001-11010010-00011001-10010000
-// CHECK, INST: umlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
+// CHECK-INST: umlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0x90,0x19,0xd2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d21990 <unknown>
-umlal za.s[w10, 2:3, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001, 11011010, 01011000, 00010001
-// CHECK, INST: umlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
+umlal za.s[w10, 2:3, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001-11011010-01011000-00010001
+// CHECK-INST: umlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x11,0x58,0xda,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1da5811 <unknown>
umlal za.s[w10, 2:3], {z0.h - z1.h}, z10.h[4] // 11000001-11011010-01011000-00010001
-// CHECK, INST: umlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
+// CHECK-INST: umlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x11,0x58,0xda,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1da5811 <unknown>
-umlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001, 11011110, 00011010, 11010101
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
+umlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001-11011110-00011010-11010101
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xd5,0x1a,0xde,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1de1ad5 <unknown>
umlal za.s[w8, 2:3], {z22.h - z23.h}, z14.h[5] // 11000001-11011110-00011010-11010101
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xd5,0x1a,0xde,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1de1ad5 <unknown>
-umlal za.s[w11, 4:5, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001, 11010001, 01110101, 00010010
-// CHECK, INST: umlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
+umlal za.s[w11, 4:5, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001-11010001-01110101-00010010
+// CHECK-INST: umlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x12,0x75,0xd1,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d17512 <unknown>
umlal za.s[w11, 4:5], {z8.h - z9.h}, z1.h[2] // 11000001-11010001-01110101-00010010
-// CHECK, INST: umlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
+// CHECK-INST: umlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x12,0x75,0xd1,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d17512 <unknown>
-umlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h[5] // 11000001, 11011011, 00111001, 10010111
-// CHECK, INST: umlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
+umlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h[5] // 11000001-11011011-00111001-10010111
+// CHECK-INST: umlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
// CHECK-ENCODING: [0x97,0x39,0xdb,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1db3997 <unknown>
umlal za.s[w9, 6:7], {z12.h - z13.h}, z11.h[5] // 11000001-11011011-00111001-10010111
-// CHECK, INST: umlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
+// CHECK-INST: umlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
// CHECK-ENCODING: [0x97,0x39,0xdb,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1db3997 <unknown>
-umlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001, 11100000, 00001000, 00010000
-// CHECK, INST: umlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+umlal za.s[w8, 0:1, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001-11100000-00001000-00010000
+// CHECK-INST: umlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x10,0x08,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e00810 <unknown>
umlal za.s[w8, 0:1], {z0.h - z1.h}, {z0.h - z1.h} // 11000001-11100000-00001000-00010000
-// CHECK, INST: umlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+// CHECK-INST: umlal za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x10,0x08,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e00810 <unknown>
-umlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001, 11110100, 01001001, 01010001
-// CHECK, INST: umlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+umlal za.s[w10, 2:3, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001-11110100-01001001-01010001
+// CHECK-INST: umlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x51,0x49,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44951 <unknown>
umlal za.s[w10, 2:3], {z10.h - z11.h}, {z20.h - z21.h} // 11000001-11110100-01001001-01010001
-// CHECK, INST: umlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+// CHECK-INST: umlal za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x51,0x49,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44951 <unknown>
-umlal za.s[w11, 6:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001, 11101000, 01101001, 10010011
-// CHECK, INST: umlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+umlal za.s[w11, 6:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001-11101000-01101001-10010011
+// CHECK-INST: umlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x93,0x69,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e86993 <unknown>
umlal za.s[w11, 6:7], {z12.h - z13.h}, {z8.h - z9.h} // 11000001-11101000-01101001-10010011
-// CHECK, INST: umlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+// CHECK-INST: umlal za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x93,0x69,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e86993 <unknown>
-umlal za.s[w11, 6:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001, 11111110, 01101011, 11010011
-// CHECK, INST: umlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+umlal za.s[w11, 6:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001-11111110-01101011-11010011
+// CHECK-INST: umlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd3,0x6b,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe6bd3 <unknown>
umlal za.s[w11, 6:7], {z30.h - z31.h}, {z30.h - z31.h} // 11000001-11111110-01101011-11010011
-// CHECK, INST: umlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+// CHECK-INST: umlal za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd3,0x6b,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe6bd3 <unknown>
-umlal za.s[w8, 2:3, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001, 11110000, 00001010, 00010001
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+umlal za.s[w8, 2:3, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001-11110000-00001010-00010001
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x11,0x0a,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f00a11 <unknown>
umlal za.s[w8, 2:3], {z16.h - z17.h}, {z16.h - z17.h} // 11000001-11110000-00001010-00010001
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x11,0x0a,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f00a11 <unknown>
-umlal za.s[w8, 2:3, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001, 11111110, 00001000, 00010001
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+umlal za.s[w8, 2:3, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001-11111110-00001000-00010001
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x11,0x08,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0811 <unknown>
umlal za.s[w8, 2:3], {z0.h - z1.h}, {z30.h - z31.h} // 11000001-11111110-00001000-00010001
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x11,0x08,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0811 <unknown>
-umlal za.s[w10, 0:1, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001, 11110100, 01001010, 01010000
-// CHECK, INST: umlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+umlal za.s[w10, 0:1, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001-11110100-01001010-01010000
+// CHECK-INST: umlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x50,0x4a,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44a50 <unknown>
umlal za.s[w10, 0:1], {z18.h - z19.h}, {z20.h - z21.h} // 11000001-11110100-01001010-01010000
-// CHECK, INST: umlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+// CHECK-INST: umlal za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x50,0x4a,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44a50 <unknown>
-umlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001, 11100010, 00001001, 10010000
-// CHECK, INST: umlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+umlal za.s[w8, 0:1, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001-11100010-00001001-10010000
+// CHECK-INST: umlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x90,0x09,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e20990 <unknown>
umlal za.s[w8, 0:1], {z12.h - z13.h}, {z2.h - z3.h} // 11000001-11100010-00001001-10010000
-// CHECK, INST: umlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+// CHECK-INST: umlal za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x90,0x09,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e20990 <unknown>
-umlal za.s[w10, 2:3, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001, 11111010, 01001000, 00010001
-// CHECK, INST: umlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+umlal za.s[w10, 2:3, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001-11111010-01001000-00010001
+// CHECK-INST: umlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x11,0x48,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa4811 <unknown>
umlal za.s[w10, 2:3], {z0.h - z1.h}, {z26.h - z27.h} // 11000001-11111010-01001000-00010001
-// CHECK, INST: umlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+// CHECK-INST: umlal za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x11,0x48,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa4811 <unknown>
-umlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001, 11111110, 00001010, 11010001
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+umlal za.s[w8, 2:3, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001-11111110-00001010-11010001
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd1,0x0a,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0ad1 <unknown>
umlal za.s[w8, 2:3], {z22.h - z23.h}, {z30.h - z31.h} // 11000001-11111110-00001010-11010001
-// CHECK, INST: umlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+// CHECK-INST: umlal za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd1,0x0a,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0ad1 <unknown>
-umlal za.s[w11, 4:5, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001, 11100000, 01101001, 00010010
-// CHECK, INST: umlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+umlal za.s[w11, 4:5, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001-11100000-01101001-00010010
+// CHECK-INST: umlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x12,0x69,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e06912 <unknown>
umlal za.s[w11, 4:5], {z8.h - z9.h}, {z0.h - z1.h} // 11000001-11100000-01101001-00010010
-// CHECK, INST: umlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+// CHECK-INST: umlal za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x12,0x69,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e06912 <unknown>
-umlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001, 11101010, 00101001, 10010011
-// CHECK, INST: umlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+umlal za.s[w9, 6:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001-11101010-00101001-10010011
+// CHECK-INST: umlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x93,0x29,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ea2993 <unknown>
umlal za.s[w9, 6:7], {z12.h - z13.h}, {z10.h - z11.h} // 11000001-11101010-00101001-10010011
-// CHECK, INST: umlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+// CHECK-INST: umlal za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x93,0x29,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ea2993 <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/umlall.s b/llvm/test/MC/AArch64/SME2/umlall.s
index 76df50e6bb2f2..72fb9ae7c5dd2 100644
--- a/llvm/test/MC/AArch64/SME2/umlall.s
+++ b/llvm/test/MC/AArch64/SME2/umlall.s
@@ -304,871 +304,871 @@ umlall za.d[w9, 12:15], z12.h, z11.h[6] // 11000001-10001011-10101001-10010011
// CHECK-UNKNOWN: c18ba993 <unknown>
-umlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b // 11000001, 00100000, 00000000, 00010000
-// CHECK, INST: umlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
+umlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b // 11000001-00100000-00000000-00010000
+// CHECK-INST: umlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
// CHECK-ENCODING: [0x10,0x00,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200010 <unknown>
umlall za.s[w8, 0:3], {z0.b - z1.b}, z0.b // 11000001-00100000-00000000-00010000
-// CHECK, INST: umlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
+// CHECK-INST: umlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
// CHECK-ENCODING: [0x10,0x00,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200010 <unknown>
-umlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b // 11000001, 00100101, 01000001, 01010001
-// CHECK, INST: umlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
+umlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b // 11000001-00100101-01000001-01010001
+// CHECK-INST: umlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
// CHECK-ENCODING: [0x51,0x41,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254151 <unknown>
umlall za.s[w10, 4:7], {z10.b - z11.b}, z5.b // 11000001-00100101-01000001-01010001
-// CHECK, INST: umlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
+// CHECK-INST: umlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
// CHECK-ENCODING: [0x51,0x41,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254151 <unknown>
-umlall za.s[w11, 4:7, vgx2], {z13.b, z14.b}, z8.b // 11000001, 00101000, 01100001, 10110001
-// CHECK, INST: umlall za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
+umlall za.s[w11, 4:7, vgx2], {z13.b, z14.b}, z8.b // 11000001-00101000-01100001-10110001
+// CHECK-INST: umlall za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
// CHECK-ENCODING: [0xb1,0x61,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12861b1 <unknown>
umlall za.s[w11, 4:7], {z13.b - z14.b}, z8.b // 11000001-00101000-01100001-10110001
-// CHECK, INST: umlall za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
+// CHECK-INST: umlall za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
// CHECK-ENCODING: [0xb1,0x61,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12861b1 <unknown>
-umlall za.s[w11, 4:7, vgx2], {z31.b, z0.b}, z15.b // 11000001, 00101111, 01100011, 11110001
-// CHECK, INST: umlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
+umlall za.s[w11, 4:7, vgx2], {z31.b, z0.b}, z15.b // 11000001-00101111-01100011-11110001
+// CHECK-INST: umlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
// CHECK-ENCODING: [0xf1,0x63,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f63f1 <unknown>
umlall za.s[w11, 4:7], {z31.b - z0.b}, z15.b // 11000001-00101111-01100011-11110001
-// CHECK, INST: umlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
+// CHECK-INST: umlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
// CHECK-ENCODING: [0xf1,0x63,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f63f1 <unknown>
-umlall za.s[w8, 4:7, vgx2], {z17.b, z18.b}, z0.b // 11000001, 00100000, 00000010, 00110001
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
+umlall za.s[w8, 4:7, vgx2], {z17.b, z18.b}, z0.b // 11000001-00100000-00000010-00110001
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
// CHECK-ENCODING: [0x31,0x02,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200231 <unknown>
umlall za.s[w8, 4:7], {z17.b - z18.b}, z0.b // 11000001-00100000-00000010-00110001
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
// CHECK-ENCODING: [0x31,0x02,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200231 <unknown>
-umlall za.s[w8, 4:7, vgx2], {z1.b, z2.b}, z14.b // 11000001, 00101110, 00000000, 00110001
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
+umlall za.s[w8, 4:7, vgx2], {z1.b, z2.b}, z14.b // 11000001-00101110-00000000-00110001
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
// CHECK-ENCODING: [0x31,0x00,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0031 <unknown>
umlall za.s[w8, 4:7], {z1.b - z2.b}, z14.b // 11000001-00101110-00000000-00110001
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
// CHECK-ENCODING: [0x31,0x00,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0031 <unknown>
-umlall za.s[w10, 0:3, vgx2], {z19.b, z20.b}, z4.b // 11000001, 00100100, 01000010, 01110000
-// CHECK, INST: umlall za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
+umlall za.s[w10, 0:3, vgx2], {z19.b, z20.b}, z4.b // 11000001-00100100-01000010-01110000
+// CHECK-INST: umlall za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
// CHECK-ENCODING: [0x70,0x42,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244270 <unknown>
umlall za.s[w10, 0:3], {z19.b - z20.b}, z4.b // 11000001-00100100-01000010-01110000
-// CHECK, INST: umlall za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
+// CHECK-INST: umlall za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
// CHECK-ENCODING: [0x70,0x42,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244270 <unknown>
-umlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b // 11000001, 00100010, 00000001, 10010000
-// CHECK, INST: umlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
+umlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b // 11000001-00100010-00000001-10010000
+// CHECK-INST: umlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
// CHECK-ENCODING: [0x90,0x01,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220190 <unknown>
umlall za.s[w8, 0:3], {z12.b - z13.b}, z2.b // 11000001-00100010-00000001-10010000
-// CHECK, INST: umlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
+// CHECK-INST: umlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
// CHECK-ENCODING: [0x90,0x01,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220190 <unknown>
-umlall za.s[w10, 4:7, vgx2], {z1.b, z2.b}, z10.b // 11000001, 00101010, 01000000, 00110001
-// CHECK, INST: umlall za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
+umlall za.s[w10, 4:7, vgx2], {z1.b, z2.b}, z10.b // 11000001-00101010-01000000-00110001
+// CHECK-INST: umlall za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
// CHECK-ENCODING: [0x31,0x40,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4031 <unknown>
umlall za.s[w10, 4:7], {z1.b - z2.b}, z10.b // 11000001-00101010-01000000-00110001
-// CHECK, INST: umlall za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
+// CHECK-INST: umlall za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
// CHECK-ENCODING: [0x31,0x40,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4031 <unknown>
-umlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b // 11000001, 00101110, 00000010, 11010001
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
+umlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b // 11000001-00101110-00000010-11010001
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
// CHECK-ENCODING: [0xd1,0x02,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e02d1 <unknown>
umlall za.s[w8, 4:7], {z22.b - z23.b}, z14.b // 11000001-00101110-00000010-11010001
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
// CHECK-ENCODING: [0xd1,0x02,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e02d1 <unknown>
-umlall za.s[w11, 0:3, vgx2], {z9.b, z10.b}, z1.b // 11000001, 00100001, 01100001, 00110000
-// CHECK, INST: umlall za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
+umlall za.s[w11, 0:3, vgx2], {z9.b, z10.b}, z1.b // 11000001-00100001-01100001-00110000
+// CHECK-INST: umlall za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
// CHECK-ENCODING: [0x30,0x61,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1216130 <unknown>
umlall za.s[w11, 0:3], {z9.b - z10.b}, z1.b // 11000001-00100001-01100001-00110000
-// CHECK, INST: umlall za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
+// CHECK-INST: umlall za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
// CHECK-ENCODING: [0x30,0x61,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1216130 <unknown>
-umlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b // 11000001, 00101011, 00100001, 10010001
-// CHECK, INST: umlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
+umlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b // 11000001-00101011-00100001-10010001
+// CHECK-INST: umlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
// CHECK-ENCODING: [0x91,0x21,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b2191 <unknown>
umlall za.s[w9, 4:7], {z12.b - z13.b}, z11.b // 11000001-00101011-00100001-10010001
-// CHECK, INST: umlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
+// CHECK-INST: umlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
// CHECK-ENCODING: [0x91,0x21,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b2191 <unknown>
-umlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b[0] // 11000001, 00010000, 00000000, 00010000
-// CHECK, INST: umlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
+umlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b[0] // 11000001-00010000-00000000-00010000
+// CHECK-INST: umlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
// CHECK-ENCODING: [0x10,0x00,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100010 <unknown>
umlall za.s[w8, 0:3], {z0.b - z1.b}, z0.b[0] // 11000001-00010000-00000000-00010000
-// CHECK, INST: umlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
+// CHECK-INST: umlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
// CHECK-ENCODING: [0x10,0x00,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100010 <unknown>
-umlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b[6] // 11000001, 00010101, 01000101, 01010101
-// CHECK, INST: umlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
+umlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b[6] // 11000001-00010101-01000101-01010101
+// CHECK-INST: umlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
// CHECK-ENCODING: [0x55,0x45,0x15,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1154555 <unknown>
umlall za.s[w10, 4:7], {z10.b - z11.b}, z5.b[6] // 11000001-00010101-01000101-01010101
-// CHECK, INST: umlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
+// CHECK-INST: umlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
// CHECK-ENCODING: [0x55,0x45,0x15,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1154555 <unknown>
-umlall za.s[w11, 4:7, vgx2], {z12.b, z13.b}, z8.b[15] // 11000001, 00011000, 01101101, 10010111
-// CHECK, INST: umlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
+umlall za.s[w11, 4:7, vgx2], {z12.b, z13.b}, z8.b[15] // 11000001-00011000-01101101-10010111
+// CHECK-INST: umlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
// CHECK-ENCODING: [0x97,0x6d,0x18,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1186d97 <unknown>
umlall za.s[w11, 4:7], {z12.b - z13.b}, z8.b[15] // 11000001-00011000-01101101-10010111
-// CHECK, INST: umlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
+// CHECK-INST: umlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
// CHECK-ENCODING: [0x97,0x6d,0x18,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1186d97 <unknown>
-umlall za.s[w11, 4:7, vgx2], {z30.b, z31.b}, z15.b[15] // 11000001, 00011111, 01101111, 11010111
-// CHECK, INST: umlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
+umlall za.s[w11, 4:7, vgx2], {z30.b, z31.b}, z15.b[15] // 11000001-00011111-01101111-11010111
+// CHECK-INST: umlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
// CHECK-ENCODING: [0xd7,0x6f,0x1f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11f6fd7 <unknown>
umlall za.s[w11, 4:7], {z30.b - z31.b}, z15.b[15] // 11000001-00011111-01101111-11010111
-// CHECK, INST: umlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
+// CHECK-INST: umlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
// CHECK-ENCODING: [0xd7,0x6f,0x1f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11f6fd7 <unknown>
-umlall za.s[w8, 4:7, vgx2], {z16.b, z17.b}, z0.b[14] // 11000001, 00010000, 00001110, 00010101
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
+umlall za.s[w8, 4:7, vgx2], {z16.b, z17.b}, z0.b[14] // 11000001-00010000-00001110-00010101
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
// CHECK-ENCODING: [0x15,0x0e,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100e15 <unknown>
umlall za.s[w8, 4:7], {z16.b - z17.b}, z0.b[14] // 11000001-00010000-00001110-00010101
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
// CHECK-ENCODING: [0x15,0x0e,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100e15 <unknown>
-umlall za.s[w8, 4:7, vgx2], {z0.b, z1.b}, z14.b[4] // 11000001, 00011110, 00000100, 00010001
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
+umlall za.s[w8, 4:7, vgx2], {z0.b, z1.b}, z14.b[4] // 11000001-00011110-00000100-00010001
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
// CHECK-ENCODING: [0x11,0x04,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0411 <unknown>
umlall za.s[w8, 4:7], {z0.b - z1.b}, z14.b[4] // 11000001-00011110-00000100-00010001
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
// CHECK-ENCODING: [0x11,0x04,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0411 <unknown>
-umlall za.s[w10, 0:3, vgx2], {z18.b, z19.b}, z4.b[4] // 11000001, 00010100, 01000110, 01010000
-// CHECK, INST: umlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
+umlall za.s[w10, 0:3, vgx2], {z18.b, z19.b}, z4.b[4] // 11000001-00010100-01000110-01010000
+// CHECK-INST: umlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
// CHECK-ENCODING: [0x50,0x46,0x14,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1144650 <unknown>
umlall za.s[w10, 0:3], {z18.b - z19.b}, z4.b[4] // 11000001-00010100-01000110-01010000
-// CHECK, INST: umlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
+// CHECK-INST: umlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
// CHECK-ENCODING: [0x50,0x46,0x14,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1144650 <unknown>
-umlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b[8] // 11000001, 00010010, 00001001, 10010000
-// CHECK, INST: umlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
+umlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b[8] // 11000001-00010010-00001001-10010000
+// CHECK-INST: umlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
// CHECK-ENCODING: [0x90,0x09,0x12,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1120990 <unknown>
umlall za.s[w8, 0:3], {z12.b - z13.b}, z2.b[8] // 11000001-00010010-00001001-10010000
-// CHECK, INST: umlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
+// CHECK-INST: umlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
// CHECK-ENCODING: [0x90,0x09,0x12,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1120990 <unknown>
-umlall za.s[w10, 4:7, vgx2], {z0.b, z1.b}, z10.b[8] // 11000001, 00011010, 01001000, 00010001
-// CHECK, INST: umlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
+umlall za.s[w10, 4:7, vgx2], {z0.b, z1.b}, z10.b[8] // 11000001-00011010-01001000-00010001
+// CHECK-INST: umlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
// CHECK-ENCODING: [0x11,0x48,0x1a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11a4811 <unknown>
umlall za.s[w10, 4:7], {z0.b - z1.b}, z10.b[8] // 11000001-00011010-01001000-00010001
-// CHECK, INST: umlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
+// CHECK-INST: umlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
// CHECK-ENCODING: [0x11,0x48,0x1a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11a4811 <unknown>
-umlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b[10] // 11000001, 00011110, 00001010, 11010101
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
+umlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b[10] // 11000001-00011110-00001010-11010101
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
// CHECK-ENCODING: [0xd5,0x0a,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0ad5 <unknown>
umlall za.s[w8, 4:7], {z22.b - z23.b}, z14.b[10] // 11000001-00011110-00001010-11010101
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
// CHECK-ENCODING: [0xd5,0x0a,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0ad5 <unknown>
-umlall za.s[w11, 0:3, vgx2], {z8.b, z9.b}, z1.b[5] // 11000001, 00010001, 01100101, 00010010
-// CHECK, INST: umlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
+umlall za.s[w11, 0:3, vgx2], {z8.b, z9.b}, z1.b[5] // 11000001-00010001-01100101-00010010
+// CHECK-INST: umlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
// CHECK-ENCODING: [0x12,0x65,0x11,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1116512 <unknown>
umlall za.s[w11, 0:3], {z8.b - z9.b}, z1.b[5] // 11000001-00010001-01100101-00010010
-// CHECK, INST: umlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
+// CHECK-INST: umlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
// CHECK-ENCODING: [0x12,0x65,0x11,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1116512 <unknown>
-umlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b[11] // 11000001, 00011011, 00101001, 10010111
-// CHECK, INST: umlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
+umlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b[11] // 11000001-00011011-00101001-10010111
+// CHECK-INST: umlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
// CHECK-ENCODING: [0x97,0x29,0x1b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11b2997 <unknown>
umlall za.s[w9, 4:7], {z12.b - z13.b}, z11.b[11] // 11000001-00011011-00101001-10010111
-// CHECK, INST: umlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
+// CHECK-INST: umlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
// CHECK-ENCODING: [0x97,0x29,0x1b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11b2997 <unknown>
-umlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, {z0.b, z1.b} // 11000001, 10100000, 00000000, 00010000
-// CHECK, INST: umlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
+umlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, {z0.b, z1.b} // 11000001-10100000-00000000-00010000
+// CHECK-INST: umlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x10,0x00,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00010 <unknown>
umlall za.s[w8, 0:3], {z0.b - z1.b}, {z0.b - z1.b} // 11000001-10100000-00000000-00010000
-// CHECK, INST: umlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
+// CHECK-INST: umlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x10,0x00,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00010 <unknown>
-umlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, {z20.b, z21.b} // 11000001, 10110100, 01000001, 01010001
-// CHECK, INST: umlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
+umlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, {z20.b, z21.b} // 11000001-10110100-01000001-01010001
+// CHECK-INST: umlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x51,0x41,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44151 <unknown>
umlall za.s[w10, 4:7], {z10.b - z11.b}, {z20.b - z21.b} // 11000001-10110100-01000001-01010001
-// CHECK, INST: umlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
+// CHECK-INST: umlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x51,0x41,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44151 <unknown>
-umlall za.s[w11, 4:7, vgx2], {z12.b, z13.b}, {z8.b, z9.b} // 11000001, 10101000, 01100001, 10010001
-// CHECK, INST: umlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
+umlall za.s[w11, 4:7, vgx2], {z12.b, z13.b}, {z8.b, z9.b} // 11000001-10101000-01100001-10010001
+// CHECK-INST: umlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
// CHECK-ENCODING: [0x91,0x61,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a86191 <unknown>
umlall za.s[w11, 4:7], {z12.b - z13.b}, {z8.b - z9.b} // 11000001-10101000-01100001-10010001
-// CHECK, INST: umlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
+// CHECK-INST: umlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
// CHECK-ENCODING: [0x91,0x61,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a86191 <unknown>
-umlall za.s[w11, 4:7, vgx2], {z30.b, z31.b}, {z30.b, z31.b} // 11000001, 10111110, 01100011, 11010001
-// CHECK, INST: umlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
+umlall za.s[w11, 4:7, vgx2], {z30.b, z31.b}, {z30.b, z31.b} // 11000001-10111110-01100011-11010001
+// CHECK-INST: umlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xd1,0x63,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be63d1 <unknown>
umlall za.s[w11, 4:7], {z30.b - z31.b}, {z30.b - z31.b} // 11000001-10111110-01100011-11010001
-// CHECK, INST: umlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
+// CHECK-INST: umlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xd1,0x63,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be63d1 <unknown>
-umlall za.s[w8, 4:7, vgx2], {z16.b, z17.b}, {z16.b, z17.b} // 11000001, 10110000, 00000010, 00010001
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
+umlall za.s[w8, 4:7, vgx2], {z16.b, z17.b}, {z16.b, z17.b} // 11000001-10110000-00000010-00010001
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
// CHECK-ENCODING: [0x11,0x02,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00211 <unknown>
umlall za.s[w8, 4:7], {z16.b - z17.b}, {z16.b - z17.b} // 11000001-10110000-00000010-00010001
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
// CHECK-ENCODING: [0x11,0x02,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00211 <unknown>
-umlall za.s[w8, 4:7, vgx2], {z0.b, z1.b}, {z30.b, z31.b} // 11000001, 10111110, 00000000, 00010001
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
+umlall za.s[w8, 4:7, vgx2], {z0.b, z1.b}, {z30.b, z31.b} // 11000001-10111110-00000000-00010001
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0x11,0x00,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0011 <unknown>
umlall za.s[w8, 4:7], {z0.b - z1.b}, {z30.b - z31.b} // 11000001-10111110-00000000-00010001
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0x11,0x00,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0011 <unknown>
-umlall za.s[w10, 0:3, vgx2], {z18.b, z19.b}, {z20.b, z21.b} // 11000001, 10110100, 01000010, 01010000
-// CHECK, INST: umlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
+umlall za.s[w10, 0:3, vgx2], {z18.b, z19.b}, {z20.b, z21.b} // 11000001-10110100-01000010-01010000
+// CHECK-INST: umlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x50,0x42,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44250 <unknown>
umlall za.s[w10, 0:3], {z18.b - z19.b}, {z20.b - z21.b} // 11000001-10110100-01000010-01010000
-// CHECK, INST: umlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
+// CHECK-INST: umlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x50,0x42,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44250 <unknown>
-umlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, {z2.b, z3.b} // 11000001, 10100010, 00000001, 10010000
-// CHECK, INST: umlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
+umlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, {z2.b, z3.b} // 11000001-10100010-00000001-10010000
+// CHECK-INST: umlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
// CHECK-ENCODING: [0x90,0x01,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20190 <unknown>
umlall za.s[w8, 0:3], {z12.b - z13.b}, {z2.b - z3.b} // 11000001-10100010-00000001-10010000
-// CHECK, INST: umlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
+// CHECK-INST: umlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
// CHECK-ENCODING: [0x90,0x01,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20190 <unknown>
-umlall za.s[w10, 4:7, vgx2], {z0.b, z1.b}, {z26.b, z27.b} // 11000001, 10111010, 01000000, 00010001
-// CHECK, INST: umlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
+umlall za.s[w10, 4:7, vgx2], {z0.b, z1.b}, {z26.b, z27.b} // 11000001-10111010-01000000-00010001
+// CHECK-INST: umlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
// CHECK-ENCODING: [0x11,0x40,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4011 <unknown>
umlall za.s[w10, 4:7], {z0.b - z1.b}, {z26.b - z27.b} // 11000001-10111010-01000000-00010001
-// CHECK, INST: umlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
+// CHECK-INST: umlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
// CHECK-ENCODING: [0x11,0x40,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4011 <unknown>
-umlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, {z30.b, z31.b} // 11000001, 10111110, 00000010, 11010001
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
+umlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, {z30.b, z31.b} // 11000001-10111110-00000010-11010001
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xd1,0x02,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be02d1 <unknown>
umlall za.s[w8, 4:7], {z22.b - z23.b}, {z30.b - z31.b} // 11000001-10111110-00000010-11010001
-// CHECK, INST: umlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
+// CHECK-INST: umlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xd1,0x02,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be02d1 <unknown>
-umlall za.s[w11, 0:3, vgx2], {z8.b, z9.b}, {z0.b, z1.b} // 11000001, 10100000, 01100001, 00010000
-// CHECK, INST: umlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
+umlall za.s[w11, 0:3, vgx2], {z8.b, z9.b}, {z0.b, z1.b} // 11000001-10100000-01100001-00010000
+// CHECK-INST: umlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x10,0x61,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a06110 <unknown>
umlall za.s[w11, 0:3], {z8.b - z9.b}, {z0.b - z1.b} // 11000001-10100000-01100001-00010000
-// CHECK, INST: umlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
+// CHECK-INST: umlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x10,0x61,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a06110 <unknown>
-umlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, {z10.b, z11.b} // 11000001, 10101010, 00100001, 10010001
-// CHECK, INST: umlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
+umlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, {z10.b, z11.b} // 11000001-10101010-00100001-10010001
+// CHECK-INST: umlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
// CHECK-ENCODING: [0x91,0x21,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa2191 <unknown>
umlall za.s[w9, 4:7], {z12.b - z13.b}, {z10.b - z11.b} // 11000001-10101010-00100001-10010001
-// CHECK, INST: umlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
+// CHECK-INST: umlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
// CHECK-ENCODING: [0x91,0x21,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa2191 <unknown>
-umlall za.d[w8, 0:3, vgx2], {z0.h, z1.h}, z0.h // 11000001, 01100000, 00000000, 00010000
-// CHECK, INST: umlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h
+umlall za.d[w8, 0:3, vgx2], {z0.h, z1.h}, z0.h // 11000001-01100000-00000000-00010000
+// CHECK-INST: umlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x10,0x00,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600010 <unknown>
umlall za.d[w8, 0:3], {z0.h - z1.h}, z0.h // 11000001-01100000-00000000-00010000
-// CHECK, INST: umlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h
+// CHECK-INST: umlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x10,0x00,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600010 <unknown>
-umlall za.d[w10, 4:7, vgx2], {z10.h, z11.h}, z5.h // 11000001, 01100101, 01000001, 01010001
-// CHECK, INST: umlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h
+umlall za.d[w10, 4:7, vgx2], {z10.h, z11.h}, z5.h // 11000001-01100101-01000001-01010001
+// CHECK-INST: umlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x51,0x41,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1654151 <unknown>
umlall za.d[w10, 4:7], {z10.h - z11.h}, z5.h // 11000001-01100101-01000001-01010001
-// CHECK, INST: umlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h
+// CHECK-INST: umlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x51,0x41,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1654151 <unknown>
-umlall za.d[w11, 4:7, vgx2], {z13.h, z14.h}, z8.h // 11000001, 01101000, 01100001, 10110001
-// CHECK, INST: umlall za.d[w11, 4:7, vgx2], { z13.h, z14.h }, z8.h
+umlall za.d[w11, 4:7, vgx2], {z13.h, z14.h}, z8.h // 11000001-01101000-01100001-10110001
+// CHECK-INST: umlall za.d[w11, 4:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xb1,0x61,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16861b1 <unknown>
umlall za.d[w11, 4:7], {z13.h - z14.h}, z8.h // 11000001-01101000-01100001-10110001
-// CHECK, INST: umlall za.d[w11, 4:7, vgx2], { z13.h, z14.h }, z8.h
+// CHECK-INST: umlall za.d[w11, 4:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xb1,0x61,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16861b1 <unknown>
-umlall za.d[w11, 4:7, vgx2], {z31.h, z0.h}, z15.h // 11000001, 01101111, 01100011, 11110001
-// CHECK, INST: umlall za.d[w11, 4:7, vgx2], { z31.h, z0.h }, z15.h
+umlall za.d[w11, 4:7, vgx2], {z31.h, z0.h}, z15.h // 11000001-01101111-01100011-11110001
+// CHECK-INST: umlall za.d[w11, 4:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xf1,0x63,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f63f1 <unknown>
umlall za.d[w11, 4:7], {z31.h - z0.h}, z15.h // 11000001-01101111-01100011-11110001
-// CHECK, INST: umlall za.d[w11, 4:7, vgx2], { z31.h, z0.h }, z15.h
+// CHECK-INST: umlall za.d[w11, 4:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xf1,0x63,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f63f1 <unknown>
-umlall za.d[w8, 4:7, vgx2], {z17.h, z18.h}, z0.h // 11000001, 01100000, 00000010, 00110001
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z17.h, z18.h }, z0.h
+umlall za.d[w8, 4:7, vgx2], {z17.h, z18.h}, z0.h // 11000001-01100000-00000010-00110001
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x31,0x02,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600231 <unknown>
umlall za.d[w8, 4:7], {z17.h - z18.h}, z0.h // 11000001-01100000-00000010-00110001
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z17.h, z18.h }, z0.h
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x31,0x02,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600231 <unknown>
-umlall za.d[w8, 4:7, vgx2], {z1.h, z2.h}, z14.h // 11000001, 01101110, 00000000, 00110001
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z1.h, z2.h }, z14.h
+umlall za.d[w8, 4:7, vgx2], {z1.h, z2.h}, z14.h // 11000001-01101110-00000000-00110001
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x31,0x00,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0031 <unknown>
umlall za.d[w8, 4:7], {z1.h - z2.h}, z14.h // 11000001-01101110-00000000-00110001
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z1.h, z2.h }, z14.h
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x31,0x00,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0031 <unknown>
-umlall za.d[w10, 0:3, vgx2], {z19.h, z20.h}, z4.h // 11000001, 01100100, 01000010, 01110000
-// CHECK, INST: umlall za.d[w10, 0:3, vgx2], { z19.h, z20.h }, z4.h
+umlall za.d[w10, 0:3, vgx2], {z19.h, z20.h}, z4.h // 11000001-01100100-01000010-01110000
+// CHECK-INST: umlall za.d[w10, 0:3, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x70,0x42,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1644270 <unknown>
umlall za.d[w10, 0:3], {z19.h - z20.h}, z4.h // 11000001-01100100-01000010-01110000
-// CHECK, INST: umlall za.d[w10, 0:3, vgx2], { z19.h, z20.h }, z4.h
+// CHECK-INST: umlall za.d[w10, 0:3, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x70,0x42,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1644270 <unknown>
-umlall za.d[w8, 0:3, vgx2], {z12.h, z13.h}, z2.h // 11000001, 01100010, 00000001, 10010000
-// CHECK, INST: umlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h
+umlall za.d[w8, 0:3, vgx2], {z12.h, z13.h}, z2.h // 11000001-01100010-00000001-10010000
+// CHECK-INST: umlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x90,0x01,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1620190 <unknown>
umlall za.d[w8, 0:3], {z12.h - z13.h}, z2.h // 11000001-01100010-00000001-10010000
-// CHECK, INST: umlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h
+// CHECK-INST: umlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x90,0x01,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1620190 <unknown>
-umlall za.d[w10, 4:7, vgx2], {z1.h, z2.h}, z10.h // 11000001, 01101010, 01000000, 00110001
-// CHECK, INST: umlall za.d[w10, 4:7, vgx2], { z1.h, z2.h }, z10.h
+umlall za.d[w10, 4:7, vgx2], {z1.h, z2.h}, z10.h // 11000001-01101010-01000000-00110001
+// CHECK-INST: umlall za.d[w10, 4:7, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x31,0x40,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a4031 <unknown>
umlall za.d[w10, 4:7], {z1.h - z2.h}, z10.h // 11000001-01101010-01000000-00110001
-// CHECK, INST: umlall za.d[w10, 4:7, vgx2], { z1.h, z2.h }, z10.h
+// CHECK-INST: umlall za.d[w10, 4:7, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x31,0x40,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a4031 <unknown>
-umlall za.d[w8, 4:7, vgx2], {z22.h, z23.h}, z14.h // 11000001, 01101110, 00000010, 11010001
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h
+umlall za.d[w8, 4:7, vgx2], {z22.h, z23.h}, z14.h // 11000001-01101110-00000010-11010001
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xd1,0x02,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e02d1 <unknown>
umlall za.d[w8, 4:7], {z22.h - z23.h}, z14.h // 11000001-01101110-00000010-11010001
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xd1,0x02,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e02d1 <unknown>
-umlall za.d[w11, 0:3, vgx2], {z9.h, z10.h}, z1.h // 11000001, 01100001, 01100001, 00110000
-// CHECK, INST: umlall za.d[w11, 0:3, vgx2], { z9.h, z10.h }, z1.h
+umlall za.d[w11, 0:3, vgx2], {z9.h, z10.h}, z1.h // 11000001-01100001-01100001-00110000
+// CHECK-INST: umlall za.d[w11, 0:3, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x30,0x61,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1616130 <unknown>
umlall za.d[w11, 0:3], {z9.h - z10.h}, z1.h // 11000001-01100001-01100001-00110000
-// CHECK, INST: umlall za.d[w11, 0:3, vgx2], { z9.h, z10.h }, z1.h
+// CHECK-INST: umlall za.d[w11, 0:3, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x30,0x61,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1616130 <unknown>
-umlall za.d[w9, 4:7, vgx2], {z12.h, z13.h}, z11.h // 11000001, 01101011, 00100001, 10010001
-// CHECK, INST: umlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h
+umlall za.d[w9, 4:7, vgx2], {z12.h, z13.h}, z11.h // 11000001-01101011-00100001-10010001
+// CHECK-INST: umlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x91,0x21,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16b2191 <unknown>
umlall za.d[w9, 4:7], {z12.h - z13.h}, z11.h // 11000001-01101011-00100001-10010001
-// CHECK, INST: umlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h
+// CHECK-INST: umlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x91,0x21,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16b2191 <unknown>
-umlall za.d[w8, 0:3, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001, 10010000, 00000000, 00010000
-// CHECK, INST: umlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h[0]
+umlall za.d[w8, 0:3, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001-10010000-00000000-00010000
+// CHECK-INST: umlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x10,0x00,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1900010 <unknown>
umlall za.d[w8, 0:3], {z0.h - z1.h}, z0.h[0] // 11000001-10010000-00000000-00010000
-// CHECK, INST: umlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h[0]
+// CHECK-INST: umlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x10,0x00,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1900010 <unknown>
-umlall za.d[w10, 4:7, vgx2], {z10.h, z11.h}, z5.h[6] // 11000001, 10010101, 01000101, 01010101
-// CHECK, INST: umlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h[6]
+umlall za.d[w10, 4:7, vgx2], {z10.h, z11.h}, z5.h[6] // 11000001-10010101-01000101-01010101
+// CHECK-INST: umlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h[6]
// CHECK-ENCODING: [0x55,0x45,0x95,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1954555 <unknown>
umlall za.d[w10, 4:7], {z10.h - z11.h}, z5.h[6] // 11000001-10010101-01000101-01010101
-// CHECK, INST: umlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h[6]
+// CHECK-INST: umlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h[6]
// CHECK-ENCODING: [0x55,0x45,0x95,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1954555 <unknown>
-umlall za.d[w11, 4:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001, 10011000, 01100101, 10010111
-// CHECK, INST: umlall za.d[w11, 4:7, vgx2], { z12.h, z13.h }, z8.h[7]
+umlall za.d[w11, 4:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001-10011000-01100101-10010111
+// CHECK-INST: umlall za.d[w11, 4:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x97,0x65,0x98,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1986597 <unknown>
umlall za.d[w11, 4:7], {z12.h - z13.h}, z8.h[7] // 11000001-10011000-01100101-10010111
-// CHECK, INST: umlall za.d[w11, 4:7, vgx2], { z12.h, z13.h }, z8.h[7]
+// CHECK-INST: umlall za.d[w11, 4:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x97,0x65,0x98,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1986597 <unknown>
-umlall za.d[w11, 4:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001, 10011111, 01100111, 11010111
-// CHECK, INST: umlall za.d[w11, 4:7, vgx2], { z30.h, z31.h }, z15.h[7]
+umlall za.d[w11, 4:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001-10011111-01100111-11010111
+// CHECK-INST: umlall za.d[w11, 4:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xd7,0x67,0x9f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19f67d7 <unknown>
umlall za.d[w11, 4:7], {z30.h - z31.h}, z15.h[7] // 11000001-10011111-01100111-11010111
-// CHECK, INST: umlall za.d[w11, 4:7, vgx2], { z30.h, z31.h }, z15.h[7]
+// CHECK-INST: umlall za.d[w11, 4:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xd7,0x67,0x9f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19f67d7 <unknown>
-umlall za.d[w8, 4:7, vgx2], {z16.h, z17.h}, z0.h[6] // 11000001, 10010000, 00000110, 00010101
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z16.h, z17.h }, z0.h[6]
+umlall za.d[w8, 4:7, vgx2], {z16.h, z17.h}, z0.h[6] // 11000001-10010000-00000110-00010101
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z16.h, z17.h }, z0.h[6]
// CHECK-ENCODING: [0x15,0x06,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1900615 <unknown>
umlall za.d[w8, 4:7], {z16.h - z17.h}, z0.h[6] // 11000001-10010000-00000110-00010101
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z16.h, z17.h }, z0.h[6]
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z16.h, z17.h }, z0.h[6]
// CHECK-ENCODING: [0x15,0x06,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1900615 <unknown>
-umlall za.d[w8, 4:7, vgx2], {z0.h, z1.h}, z14.h[4] // 11000001, 10011110, 00000100, 00010001
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z0.h, z1.h }, z14.h[4]
+umlall za.d[w8, 4:7, vgx2], {z0.h, z1.h}, z14.h[4] // 11000001-10011110-00000100-00010001
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z0.h, z1.h }, z14.h[4]
// CHECK-ENCODING: [0x11,0x04,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e0411 <unknown>
umlall za.d[w8, 4:7], {z0.h - z1.h}, z14.h[4] // 11000001-10011110-00000100-00010001
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z0.h, z1.h }, z14.h[4]
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z0.h, z1.h }, z14.h[4]
// CHECK-ENCODING: [0x11,0x04,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e0411 <unknown>
-umlall za.d[w10, 0:3, vgx2], {z18.h, z19.h}, z4.h[4] // 11000001, 10010100, 01000110, 01010000
-// CHECK, INST: umlall za.d[w10, 0:3, vgx2], { z18.h, z19.h }, z4.h[4]
+umlall za.d[w10, 0:3, vgx2], {z18.h, z19.h}, z4.h[4] // 11000001-10010100-01000110-01010000
+// CHECK-INST: umlall za.d[w10, 0:3, vgx2], { z18.h, z19.h }, z4.h[4]
// CHECK-ENCODING: [0x50,0x46,0x94,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1944650 <unknown>
umlall za.d[w10, 0:3], {z18.h - z19.h}, z4.h[4] // 11000001-10010100-01000110-01010000
-// CHECK, INST: umlall za.d[w10, 0:3, vgx2], { z18.h, z19.h }, z4.h[4]
+// CHECK-INST: umlall za.d[w10, 0:3, vgx2], { z18.h, z19.h }, z4.h[4]
// CHECK-ENCODING: [0x50,0x46,0x94,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1944650 <unknown>
-umlall za.d[w8, 0:3, vgx2], {z12.h, z13.h}, z2.h[0] // 11000001, 10010010, 00000001, 10010000
-// CHECK, INST: umlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h[0]
+umlall za.d[w8, 0:3, vgx2], {z12.h, z13.h}, z2.h[0] // 11000001-10010010-00000001-10010000
+// CHECK-INST: umlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h[0]
// CHECK-ENCODING: [0x90,0x01,0x92,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1920190 <unknown>
umlall za.d[w8, 0:3], {z12.h - z13.h}, z2.h[0] // 11000001-10010010-00000001-10010000
-// CHECK, INST: umlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h[0]
+// CHECK-INST: umlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h[0]
// CHECK-ENCODING: [0x90,0x01,0x92,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1920190 <unknown>
-umlall za.d[w10, 4:7, vgx2], {z0.h, z1.h}, z10.h[0] // 11000001, 10011010, 01000000, 00010001
-// CHECK, INST: umlall za.d[w10, 4:7, vgx2], { z0.h, z1.h }, z10.h[0]
+umlall za.d[w10, 4:7, vgx2], {z0.h, z1.h}, z10.h[0] // 11000001-10011010-01000000-00010001
+// CHECK-INST: umlall za.d[w10, 4:7, vgx2], { z0.h, z1.h }, z10.h[0]
// CHECK-ENCODING: [0x11,0x40,0x9a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19a4011 <unknown>
umlall za.d[w10, 4:7], {z0.h - z1.h}, z10.h[0] // 11000001-10011010-01000000-00010001
-// CHECK, INST: umlall za.d[w10, 4:7, vgx2], { z0.h, z1.h }, z10.h[0]
+// CHECK-INST: umlall za.d[w10, 4:7, vgx2], { z0.h, z1.h }, z10.h[0]
// CHECK-ENCODING: [0x11,0x40,0x9a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19a4011 <unknown>
-umlall za.d[w8, 4:7, vgx2], {z22.h, z23.h}, z14.h[2] // 11000001, 10011110, 00000010, 11010101
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h[2]
+umlall za.d[w8, 4:7, vgx2], {z22.h, z23.h}, z14.h[2] // 11000001-10011110-00000010-11010101
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h[2]
// CHECK-ENCODING: [0xd5,0x02,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e02d5 <unknown>
umlall za.d[w8, 4:7], {z22.h - z23.h}, z14.h[2] // 11000001-10011110-00000010-11010101
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h[2]
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h[2]
// CHECK-ENCODING: [0xd5,0x02,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e02d5 <unknown>
-umlall za.d[w11, 0:3, vgx2], {z8.h, z9.h}, z1.h[5] // 11000001, 10010001, 01100101, 00010010
-// CHECK, INST: umlall za.d[w11, 0:3, vgx2], { z8.h, z9.h }, z1.h[5]
+umlall za.d[w11, 0:3, vgx2], {z8.h, z9.h}, z1.h[5] // 11000001-10010001-01100101-00010010
+// CHECK-INST: umlall za.d[w11, 0:3, vgx2], { z8.h, z9.h }, z1.h[5]
// CHECK-ENCODING: [0x12,0x65,0x91,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1916512 <unknown>
umlall za.d[w11, 0:3], {z8.h - z9.h}, z1.h[5] // 11000001-10010001-01100101-00010010
-// CHECK, INST: umlall za.d[w11, 0:3, vgx2], { z8.h, z9.h }, z1.h[5]
+// CHECK-INST: umlall za.d[w11, 0:3, vgx2], { z8.h, z9.h }, z1.h[5]
// CHECK-ENCODING: [0x12,0x65,0x91,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1916512 <unknown>
-umlall za.d[w9, 4:7, vgx2], {z12.h, z13.h}, z11.h[3] // 11000001, 10011011, 00100001, 10010111
-// CHECK, INST: umlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h[3]
+umlall za.d[w9, 4:7, vgx2], {z12.h, z13.h}, z11.h[3] // 11000001-10011011-00100001-10010111
+// CHECK-INST: umlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h[3]
// CHECK-ENCODING: [0x97,0x21,0x9b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19b2197 <unknown>
umlall za.d[w9, 4:7], {z12.h - z13.h}, z11.h[3] // 11000001-10011011-00100001-10010111
-// CHECK, INST: umlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h[3]
+// CHECK-INST: umlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h[3]
// CHECK-ENCODING: [0x97,0x21,0x9b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19b2197 <unknown>
-umlall za.d[w8, 0:3, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001, 11100000, 00000000, 00010000
-// CHECK, INST: umlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+umlall za.d[w8, 0:3, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001-11100000-00000000-00010000
+// CHECK-INST: umlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x10,0x00,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e00010 <unknown>
umlall za.d[w8, 0:3], {z0.h - z1.h}, {z0.h - z1.h} // 11000001-11100000-00000000-00010000
-// CHECK, INST: umlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+// CHECK-INST: umlall za.d[w8, 0:3, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x10,0x00,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e00010 <unknown>
-umlall za.d[w10, 4:7, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001, 11110100, 01000001, 01010001
-// CHECK, INST: umlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+umlall za.d[w10, 4:7, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001-11110100-01000001-01010001
+// CHECK-INST: umlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x51,0x41,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44151 <unknown>
umlall za.d[w10, 4:7], {z10.h - z11.h}, {z20.h - z21.h} // 11000001-11110100-01000001-01010001
-// CHECK, INST: umlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+// CHECK-INST: umlall za.d[w10, 4:7, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x51,0x41,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44151 <unknown>
-umlall za.d[w11, 4:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001, 11101000, 01100001, 10010001
-// CHECK, INST: umlall za.d[w11, 4:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+umlall za.d[w11, 4:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001-11101000-01100001-10010001
+// CHECK-INST: umlall za.d[w11, 4:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x91,0x61,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e86191 <unknown>
umlall za.d[w11, 4:7], {z12.h - z13.h}, {z8.h - z9.h} // 11000001-11101000-01100001-10010001
-// CHECK, INST: umlall za.d[w11, 4:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+// CHECK-INST: umlall za.d[w11, 4:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x91,0x61,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e86191 <unknown>
-umlall za.d[w11, 4:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001, 11111110, 01100011, 11010001
-// CHECK, INST: umlall za.d[w11, 4:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+umlall za.d[w11, 4:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001-11111110-01100011-11010001
+// CHECK-INST: umlall za.d[w11, 4:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd1,0x63,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe63d1 <unknown>
umlall za.d[w11, 4:7], {z30.h - z31.h}, {z30.h - z31.h} // 11000001-11111110-01100011-11010001
-// CHECK, INST: umlall za.d[w11, 4:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+// CHECK-INST: umlall za.d[w11, 4:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd1,0x63,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe63d1 <unknown>
-umlall za.d[w8, 4:7, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001, 11110000, 00000010, 00010001
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+umlall za.d[w8, 4:7, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001-11110000-00000010-00010001
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x11,0x02,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f00211 <unknown>
umlall za.d[w8, 4:7], {z16.h - z17.h}, {z16.h - z17.h} // 11000001-11110000-00000010-00010001
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x11,0x02,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f00211 <unknown>
-umlall za.d[w8, 4:7, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001, 11111110, 00000000, 00010001
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+umlall za.d[w8, 4:7, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001-11111110-00000000-00010001
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x11,0x00,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0011 <unknown>
umlall za.d[w8, 4:7], {z0.h - z1.h}, {z30.h - z31.h} // 11000001-11111110-00000000-00010001
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x11,0x00,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0011 <unknown>
-umlall za.d[w10, 0:3, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001, 11110100, 01000010, 01010000
-// CHECK, INST: umlall za.d[w10, 0:3, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+umlall za.d[w10, 0:3, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001-11110100-01000010-01010000
+// CHECK-INST: umlall za.d[w10, 0:3, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x50,0x42,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44250 <unknown>
umlall za.d[w10, 0:3], {z18.h - z19.h}, {z20.h - z21.h} // 11000001-11110100-01000010-01010000
-// CHECK, INST: umlall za.d[w10, 0:3, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+// CHECK-INST: umlall za.d[w10, 0:3, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x50,0x42,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44250 <unknown>
-umlall za.d[w8, 0:3, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001, 11100010, 00000001, 10010000
-// CHECK, INST: umlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+umlall za.d[w8, 0:3, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001-11100010-00000001-10010000
+// CHECK-INST: umlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x90,0x01,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e20190 <unknown>
umlall za.d[w8, 0:3], {z12.h - z13.h}, {z2.h - z3.h} // 11000001-11100010-00000001-10010000
-// CHECK, INST: umlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+// CHECK-INST: umlall za.d[w8, 0:3, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x90,0x01,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e20190 <unknown>
-umlall za.d[w10, 4:7, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001, 11111010, 01000000, 00010001
-// CHECK, INST: umlall za.d[w10, 4:7, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+umlall za.d[w10, 4:7, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001-11111010-01000000-00010001
+// CHECK-INST: umlall za.d[w10, 4:7, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x11,0x40,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa4011 <unknown>
umlall za.d[w10, 4:7], {z0.h - z1.h}, {z26.h - z27.h} // 11000001-11111010-01000000-00010001
-// CHECK, INST: umlall za.d[w10, 4:7, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+// CHECK-INST: umlall za.d[w10, 4:7, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x11,0x40,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa4011 <unknown>
-umlall za.d[w8, 4:7, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001, 11111110, 00000010, 11010001
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+umlall za.d[w8, 4:7, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001-11111110-00000010-11010001
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd1,0x02,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe02d1 <unknown>
umlall za.d[w8, 4:7], {z22.h - z23.h}, {z30.h - z31.h} // 11000001-11111110-00000010-11010001
-// CHECK, INST: umlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+// CHECK-INST: umlall za.d[w8, 4:7, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd1,0x02,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe02d1 <unknown>
-umlall za.d[w11, 0:3, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001, 11100000, 01100001, 00010000
-// CHECK, INST: umlall za.d[w11, 0:3, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+umlall za.d[w11, 0:3, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001-11100000-01100001-00010000
+// CHECK-INST: umlall za.d[w11, 0:3, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x10,0x61,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e06110 <unknown>
umlall za.d[w11, 0:3], {z8.h - z9.h}, {z0.h - z1.h} // 11000001-11100000-01100001-00010000
-// CHECK, INST: umlall za.d[w11, 0:3, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+// CHECK-INST: umlall za.d[w11, 0:3, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x10,0x61,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e06110 <unknown>
-umlall za.d[w9, 4:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001, 11101010, 00100001, 10010001
-// CHECK, INST: umlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+umlall za.d[w9, 4:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001-11101010-00100001-10010001
+// CHECK-INST: umlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x91,0x21,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ea2191 <unknown>
umlall za.d[w9, 4:7], {z12.h - z13.h}, {z10.h - z11.h} // 11000001-11101010-00100001-10010001
-// CHECK, INST: umlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+// CHECK-INST: umlall za.d[w9, 4:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x91,0x21,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ea2191 <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/umlsl.s b/llvm/test/MC/AArch64/SME2/umlsl.s
index 050172ca01242..5d554c0ffaabc 100644
--- a/llvm/test/MC/AArch64/SME2/umlsl.s
+++ b/llvm/test/MC/AArch64/SME2/umlsl.s
@@ -158,436 +158,436 @@ umlsl za.s[w9, 14:15], z12.h, z11.h[6] // 11000001-11001011-10111001-10011111
// CHECK-UNKNOWN: c1cbb99f <unknown>
-umlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h // 11000001, 01100000, 00001000, 00011000
-// CHECK, INST: umlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+umlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h // 11000001-01100000-00001000-00011000
+// CHECK-INST: umlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x18,0x08,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600818 <unknown>
umlsl za.s[w8, 0:1], {z0.h - z1.h}, z0.h // 11000001-01100000-00001000-00011000
-// CHECK, INST: umlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
+// CHECK-INST: umlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x18,0x08,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600818 <unknown>
-umlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h // 11000001, 01100101, 01001001, 01011001
-// CHECK, INST: umlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
+umlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h // 11000001-01100101-01001001-01011001
+// CHECK-INST: umlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x59,0x49,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1654959 <unknown>
umlsl za.s[w10, 2:3], {z10.h - z11.h}, z5.h // 11000001-01100101-01001001-01011001
-// CHECK, INST: umlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
+// CHECK-INST: umlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x59,0x49,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1654959 <unknown>
-umlsl za.s[w11, 6:7, vgx2], {z13.h, z14.h}, z8.h // 11000001, 01101000, 01101001, 10111011
-// CHECK, INST: umlsl za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
+umlsl za.s[w11, 6:7, vgx2], {z13.h, z14.h}, z8.h // 11000001-01101000-01101001-10111011
+// CHECK-INST: umlsl za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xbb,0x69,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16869bb <unknown>
umlsl za.s[w11, 6:7], {z13.h - z14.h}, z8.h // 11000001-01101000-01101001-10111011
-// CHECK, INST: umlsl za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
+// CHECK-INST: umlsl za.s[w11, 6:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xbb,0x69,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16869bb <unknown>
-umlsl za.s[w11, 6:7, vgx2], {z31.h, z0.h}, z15.h // 11000001, 01101111, 01101011, 11111011
-// CHECK, INST: umlsl za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
+umlsl za.s[w11, 6:7, vgx2], {z31.h, z0.h}, z15.h // 11000001-01101111-01101011-11111011
+// CHECK-INST: umlsl za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xfb,0x6b,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f6bfb <unknown>
umlsl za.s[w11, 6:7], {z31.h - z0.h}, z15.h // 11000001-01101111-01101011-11111011
-// CHECK, INST: umlsl za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
+// CHECK-INST: umlsl za.s[w11, 6:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xfb,0x6b,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f6bfb <unknown>
-umlsl za.s[w8, 2:3, vgx2], {z17.h, z18.h}, z0.h // 11000001, 01100000, 00001010, 00111001
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
+umlsl za.s[w8, 2:3, vgx2], {z17.h, z18.h}, z0.h // 11000001-01100000-00001010-00111001
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x39,0x0a,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600a39 <unknown>
umlsl za.s[w8, 2:3], {z17.h - z18.h}, z0.h // 11000001-01100000-00001010-00111001
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x39,0x0a,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600a39 <unknown>
-umlsl za.s[w8, 2:3, vgx2], {z1.h, z2.h}, z14.h // 11000001, 01101110, 00001000, 00111001
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
+umlsl za.s[w8, 2:3, vgx2], {z1.h, z2.h}, z14.h // 11000001-01101110-00001000-00111001
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x39,0x08,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0839 <unknown>
umlsl za.s[w8, 2:3], {z1.h - z2.h}, z14.h // 11000001-01101110-00001000-00111001
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x39,0x08,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0839 <unknown>
-umlsl za.s[w10, 0:1, vgx2], {z19.h, z20.h}, z4.h // 11000001, 01100100, 01001010, 01111000
-// CHECK, INST: umlsl za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
+umlsl za.s[w10, 0:1, vgx2], {z19.h, z20.h}, z4.h // 11000001-01100100-01001010-01111000
+// CHECK-INST: umlsl za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x78,0x4a,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1644a78 <unknown>
umlsl za.s[w10, 0:1], {z19.h - z20.h}, z4.h // 11000001-01100100-01001010-01111000
-// CHECK, INST: umlsl za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
+// CHECK-INST: umlsl za.s[w10, 0:1, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x78,0x4a,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1644a78 <unknown>
-umlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h // 11000001, 01100010, 00001001, 10011000
-// CHECK, INST: umlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
+umlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h // 11000001-01100010-00001001-10011000
+// CHECK-INST: umlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x98,0x09,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1620998 <unknown>
umlsl za.s[w8, 0:1], {z12.h - z13.h}, z2.h // 11000001-01100010-00001001-10011000
-// CHECK, INST: umlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
+// CHECK-INST: umlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x98,0x09,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1620998 <unknown>
-umlsl za.s[w10, 2:3, vgx2], {z1.h, z2.h}, z10.h // 11000001, 01101010, 01001000, 00111001
-// CHECK, INST: umlsl za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
+umlsl za.s[w10, 2:3, vgx2], {z1.h, z2.h}, z10.h // 11000001-01101010-01001000-00111001
+// CHECK-INST: umlsl za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x39,0x48,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a4839 <unknown>
umlsl za.s[w10, 2:3], {z1.h - z2.h}, z10.h // 11000001-01101010-01001000-00111001
-// CHECK, INST: umlsl za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
+// CHECK-INST: umlsl za.s[w10, 2:3, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x39,0x48,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a4839 <unknown>
-umlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h // 11000001, 01101110, 00001010, 11011001
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
+umlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h // 11000001-01101110-00001010-11011001
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xd9,0x0a,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0ad9 <unknown>
umlsl za.s[w8, 2:3], {z22.h - z23.h}, z14.h // 11000001-01101110-00001010-11011001
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xd9,0x0a,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0ad9 <unknown>
-umlsl za.s[w11, 4:5, vgx2], {z9.h, z10.h}, z1.h // 11000001, 01100001, 01101001, 00111010
-// CHECK, INST: umlsl za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
+umlsl za.s[w11, 4:5, vgx2], {z9.h, z10.h}, z1.h // 11000001-01100001-01101001-00111010
+// CHECK-INST: umlsl za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x3a,0x69,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c161693a <unknown>
umlsl za.s[w11, 4:5], {z9.h - z10.h}, z1.h // 11000001-01100001-01101001-00111010
-// CHECK, INST: umlsl za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
+// CHECK-INST: umlsl za.s[w11, 4:5, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x3a,0x69,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c161693a <unknown>
-umlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h // 11000001, 01101011, 00101001, 10011011
-// CHECK, INST: umlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
+umlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h // 11000001-01101011-00101001-10011011
+// CHECK-INST: umlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x9b,0x29,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16b299b <unknown>
umlsl za.s[w9, 6:7], {z12.h - z13.h}, z11.h // 11000001-01101011-00101001-10011011
-// CHECK, INST: umlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
+// CHECK-INST: umlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x9b,0x29,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16b299b <unknown>
-umlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001, 11010000, 00010000, 00011000
-// CHECK, INST: umlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
+umlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001-11010000-00010000-00011000
+// CHECK-INST: umlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x18,0x10,0xd0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d01018 <unknown>
umlsl za.s[w8, 0:1], {z0.h - z1.h}, z0.h[0] // 11000001-11010000-00010000-00011000
-// CHECK, INST: umlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
+// CHECK-INST: umlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x18,0x10,0xd0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d01018 <unknown>
-umlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h[3] // 11000001, 11010101, 01010101, 01011101
-// CHECK, INST: umlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
+umlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, z5.h[3] // 11000001-11010101-01010101-01011101
+// CHECK-INST: umlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
// CHECK-ENCODING: [0x5d,0x55,0xd5,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d5555d <unknown>
umlsl za.s[w10, 2:3], {z10.h - z11.h}, z5.h[3] // 11000001-11010101-01010101-01011101
-// CHECK, INST: umlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
+// CHECK-INST: umlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, z5.h[3]
// CHECK-ENCODING: [0x5d,0x55,0xd5,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d5555d <unknown>
-umlsl za.s[w11, 6:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001, 11011000, 01111101, 10011111
-// CHECK, INST: umlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
+umlsl za.s[w11, 6:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001-11011000-01111101-10011111
+// CHECK-INST: umlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x9f,0x7d,0xd8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d87d9f <unknown>
umlsl za.s[w11, 6:7], {z12.h - z13.h}, z8.h[7] // 11000001-11011000-01111101-10011111
-// CHECK, INST: umlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
+// CHECK-INST: umlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x9f,0x7d,0xd8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d87d9f <unknown>
-umlsl za.s[w11, 6:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001, 11011111, 01111111, 11011111
-// CHECK, INST: umlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
+umlsl za.s[w11, 6:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001-11011111-01111111-11011111
+// CHECK-INST: umlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xdf,0x7f,0xdf,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1df7fdf <unknown>
umlsl za.s[w11, 6:7], {z30.h - z31.h}, z15.h[7] // 11000001-11011111-01111111-11011111
-// CHECK, INST: umlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
+// CHECK-INST: umlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xdf,0x7f,0xdf,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1df7fdf <unknown>
-umlsl za.s[w8, 2:3, vgx2], {z16.h, z17.h}, z0.h[7] // 11000001, 11010000, 00011110, 00011101
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
+umlsl za.s[w8, 2:3, vgx2], {z16.h, z17.h}, z0.h[7] // 11000001-11010000-00011110-00011101
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
// CHECK-ENCODING: [0x1d,0x1e,0xd0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d01e1d <unknown>
umlsl za.s[w8, 2:3], {z16.h - z17.h}, z0.h[7] // 11000001-11010000-00011110-00011101
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, z0.h[7]
// CHECK-ENCODING: [0x1d,0x1e,0xd0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d01e1d <unknown>
-umlsl za.s[w8, 2:3, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001, 11011110, 00010100, 00011001
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
+umlsl za.s[w8, 2:3, vgx2], {z0.h, z1.h}, z14.h[2] // 11000001-11011110-00010100-00011001
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x19,0x14,0xde,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1de1419 <unknown>
umlsl za.s[w8, 2:3], {z0.h - z1.h}, z14.h[2] // 11000001-11011110-00010100-00011001
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, z14.h[2]
// CHECK-ENCODING: [0x19,0x14,0xde,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1de1419 <unknown>
-umlsl za.s[w10, 0:1, vgx2], {z18.h, z19.h}, z4.h[2] // 11000001, 11010100, 01010110, 01011000
-// CHECK, INST: umlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
+umlsl za.s[w10, 0:1, vgx2], {z18.h, z19.h}, z4.h[2] // 11000001-11010100-01010110-01011000
+// CHECK-INST: umlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
// CHECK-ENCODING: [0x58,0x56,0xd4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d45658 <unknown>
umlsl za.s[w10, 0:1], {z18.h - z19.h}, z4.h[2] // 11000001-11010100-01010110-01011000
-// CHECK, INST: umlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
+// CHECK-INST: umlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, z4.h[2]
// CHECK-ENCODING: [0x58,0x56,0xd4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d45658 <unknown>
-umlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001, 11010010, 00011001, 10011000
-// CHECK, INST: umlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
+umlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, z2.h[4] // 11000001-11010010-00011001-10011000
+// CHECK-INST: umlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0x98,0x19,0xd2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d21998 <unknown>
umlsl za.s[w8, 0:1], {z12.h - z13.h}, z2.h[4] // 11000001-11010010-00011001-10011000
-// CHECK, INST: umlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
+// CHECK-INST: umlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, z2.h[4]
// CHECK-ENCODING: [0x98,0x19,0xd2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d21998 <unknown>
-umlsl za.s[w10, 2:3, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001, 11011010, 01011000, 00011001
-// CHECK, INST: umlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
+umlsl za.s[w10, 2:3, vgx2], {z0.h, z1.h}, z10.h[4] // 11000001-11011010-01011000-00011001
+// CHECK-INST: umlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x19,0x58,0xda,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1da5819 <unknown>
umlsl za.s[w10, 2:3], {z0.h - z1.h}, z10.h[4] // 11000001-11011010-01011000-00011001
-// CHECK, INST: umlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
+// CHECK-INST: umlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, z10.h[4]
// CHECK-ENCODING: [0x19,0x58,0xda,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1da5819 <unknown>
-umlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001, 11011110, 00011010, 11011101
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
+umlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, z14.h[5] // 11000001-11011110-00011010-11011101
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xdd,0x1a,0xde,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1de1add <unknown>
umlsl za.s[w8, 2:3], {z22.h - z23.h}, z14.h[5] // 11000001-11011110-00011010-11011101
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, z14.h[5]
// CHECK-ENCODING: [0xdd,0x1a,0xde,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1de1add <unknown>
-umlsl za.s[w11, 4:5, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001, 11010001, 01110101, 00011010
-// CHECK, INST: umlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
+umlsl za.s[w11, 4:5, vgx2], {z8.h, z9.h}, z1.h[2] // 11000001-11010001-01110101-00011010
+// CHECK-INST: umlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x1a,0x75,0xd1,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d1751a <unknown>
umlsl za.s[w11, 4:5], {z8.h - z9.h}, z1.h[2] // 11000001-11010001-01110101-00011010
-// CHECK, INST: umlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
+// CHECK-INST: umlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, z1.h[2]
// CHECK-ENCODING: [0x1a,0x75,0xd1,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1d1751a <unknown>
-umlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h[5] // 11000001, 11011011, 00111001, 10011111
-// CHECK, INST: umlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
+umlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, z11.h[5] // 11000001-11011011-00111001-10011111
+// CHECK-INST: umlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
// CHECK-ENCODING: [0x9f,0x39,0xdb,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1db399f <unknown>
umlsl za.s[w9, 6:7], {z12.h - z13.h}, z11.h[5] // 11000001-11011011-00111001-10011111
-// CHECK, INST: umlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
+// CHECK-INST: umlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, z11.h[5]
// CHECK-ENCODING: [0x9f,0x39,0xdb,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1db399f <unknown>
-umlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001, 11100000, 00001000, 00011000
-// CHECK, INST: umlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+umlsl za.s[w8, 0:1, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001-11100000-00001000-00011000
+// CHECK-INST: umlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x18,0x08,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e00818 <unknown>
umlsl za.s[w8, 0:1], {z0.h - z1.h}, {z0.h - z1.h} // 11000001-11100000-00001000-00011000
-// CHECK, INST: umlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+// CHECK-INST: umlsl za.s[w8, 0:1, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x18,0x08,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e00818 <unknown>
-umlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001, 11110100, 01001001, 01011001
-// CHECK, INST: umlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+umlsl za.s[w10, 2:3, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001-11110100-01001001-01011001
+// CHECK-INST: umlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x59,0x49,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44959 <unknown>
umlsl za.s[w10, 2:3], {z10.h - z11.h}, {z20.h - z21.h} // 11000001-11110100-01001001-01011001
-// CHECK, INST: umlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+// CHECK-INST: umlsl za.s[w10, 2:3, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x59,0x49,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44959 <unknown>
-umlsl za.s[w11, 6:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001, 11101000, 01101001, 10011011
-// CHECK, INST: umlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+umlsl za.s[w11, 6:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001-11101000-01101001-10011011
+// CHECK-INST: umlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x9b,0x69,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e8699b <unknown>
umlsl za.s[w11, 6:7], {z12.h - z13.h}, {z8.h - z9.h} // 11000001-11101000-01101001-10011011
-// CHECK, INST: umlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+// CHECK-INST: umlsl za.s[w11, 6:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x9b,0x69,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e8699b <unknown>
-umlsl za.s[w11, 6:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001, 11111110, 01101011, 11011011
-// CHECK, INST: umlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+umlsl za.s[w11, 6:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001-11111110-01101011-11011011
+// CHECK-INST: umlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xdb,0x6b,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe6bdb <unknown>
umlsl za.s[w11, 6:7], {z30.h - z31.h}, {z30.h - z31.h} // 11000001-11111110-01101011-11011011
-// CHECK, INST: umlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+// CHECK-INST: umlsl za.s[w11, 6:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xdb,0x6b,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe6bdb <unknown>
-umlsl za.s[w8, 2:3, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001, 11110000, 00001010, 00011001
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+umlsl za.s[w8, 2:3, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001-11110000-00001010-00011001
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x19,0x0a,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f00a19 <unknown>
umlsl za.s[w8, 2:3], {z16.h - z17.h}, {z16.h - z17.h} // 11000001-11110000-00001010-00011001
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x19,0x0a,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f00a19 <unknown>
-umlsl za.s[w8, 2:3, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001, 11111110, 00001000, 00011001
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+umlsl za.s[w8, 2:3, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001-11111110-00001000-00011001
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x19,0x08,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0819 <unknown>
umlsl za.s[w8, 2:3], {z0.h - z1.h}, {z30.h - z31.h} // 11000001-11111110-00001000-00011001
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x19,0x08,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0819 <unknown>
-umlsl za.s[w10, 0:1, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001, 11110100, 01001010, 01011000
-// CHECK, INST: umlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+umlsl za.s[w10, 0:1, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001-11110100-01001010-01011000
+// CHECK-INST: umlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x58,0x4a,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44a58 <unknown>
umlsl za.s[w10, 0:1], {z18.h - z19.h}, {z20.h - z21.h} // 11000001-11110100-01001010-01011000
-// CHECK, INST: umlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+// CHECK-INST: umlsl za.s[w10, 0:1, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x58,0x4a,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44a58 <unknown>
-umlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001, 11100010, 00001001, 10011000
-// CHECK, INST: umlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+umlsl za.s[w8, 0:1, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001-11100010-00001001-10011000
+// CHECK-INST: umlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x98,0x09,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e20998 <unknown>
umlsl za.s[w8, 0:1], {z12.h - z13.h}, {z2.h - z3.h} // 11000001-11100010-00001001-10011000
-// CHECK, INST: umlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+// CHECK-INST: umlsl za.s[w8, 0:1, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x98,0x09,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e20998 <unknown>
-umlsl za.s[w10, 2:3, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001, 11111010, 01001000, 00011001
-// CHECK, INST: umlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+umlsl za.s[w10, 2:3, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001-11111010-01001000-00011001
+// CHECK-INST: umlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x19,0x48,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa4819 <unknown>
umlsl za.s[w10, 2:3], {z0.h - z1.h}, {z26.h - z27.h} // 11000001-11111010-01001000-00011001
-// CHECK, INST: umlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+// CHECK-INST: umlsl za.s[w10, 2:3, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x19,0x48,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa4819 <unknown>
-umlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001, 11111110, 00001010, 11011001
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+umlsl za.s[w8, 2:3, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001-11111110-00001010-11011001
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd9,0x0a,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0ad9 <unknown>
umlsl za.s[w8, 2:3], {z22.h - z23.h}, {z30.h - z31.h} // 11000001-11111110-00001010-11011001
-// CHECK, INST: umlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+// CHECK-INST: umlsl za.s[w8, 2:3, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd9,0x0a,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0ad9 <unknown>
-umlsl za.s[w11, 4:5, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001, 11100000, 01101001, 00011010
-// CHECK, INST: umlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+umlsl za.s[w11, 4:5, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001-11100000-01101001-00011010
+// CHECK-INST: umlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x1a,0x69,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e0691a <unknown>
umlsl za.s[w11, 4:5], {z8.h - z9.h}, {z0.h - z1.h} // 11000001-11100000-01101001-00011010
-// CHECK, INST: umlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+// CHECK-INST: umlsl za.s[w11, 4:5, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x1a,0x69,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e0691a <unknown>
-umlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001, 11101010, 00101001, 10011011
-// CHECK, INST: umlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+umlsl za.s[w9, 6:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001-11101010-00101001-10011011
+// CHECK-INST: umlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x9b,0x29,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ea299b <unknown>
umlsl za.s[w9, 6:7], {z12.h - z13.h}, {z10.h - z11.h} // 11000001-11101010-00101001-10011011
-// CHECK, INST: umlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+// CHECK-INST: umlsl za.s[w9, 6:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x9b,0x29,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ea299b <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/umlsll.s b/llvm/test/MC/AArch64/SME2/umlsll.s
index dcc1cd04ca607..9455f4999466c 100644
--- a/llvm/test/MC/AArch64/SME2/umlsll.s
+++ b/llvm/test/MC/AArch64/SME2/umlsll.s
@@ -304,871 +304,871 @@ umlsll za.d[w9, 12:15], z12.h, z11.h[6] // 11000001-10001011-10101001-10011011
// CHECK-UNKNOWN: c18ba99b <unknown>
-umlsll za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b // 11000001, 00100000, 00000000, 00011000
-// CHECK, INST: umlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
+umlsll za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b // 11000001-00100000-00000000-00011000
+// CHECK-INST: umlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
// CHECK-ENCODING: [0x18,0x00,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200018 <unknown>
umlsll za.s[w8, 0:3], {z0.b - z1.b}, z0.b // 11000001-00100000-00000000-00011000
-// CHECK, INST: umlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
+// CHECK-INST: umlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
// CHECK-ENCODING: [0x18,0x00,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200018 <unknown>
-umlsll za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b // 11000001, 00100101, 01000001, 01011001
-// CHECK, INST: umlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
+umlsll za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b // 11000001-00100101-01000001-01011001
+// CHECK-INST: umlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
// CHECK-ENCODING: [0x59,0x41,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254159 <unknown>
umlsll za.s[w10, 4:7], {z10.b - z11.b}, z5.b // 11000001-00100101-01000001-01011001
-// CHECK, INST: umlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
+// CHECK-INST: umlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
// CHECK-ENCODING: [0x59,0x41,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254159 <unknown>
-umlsll za.s[w11, 4:7, vgx2], {z13.b, z14.b}, z8.b // 11000001, 00101000, 01100001, 10111001
-// CHECK, INST: umlsll za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
+umlsll za.s[w11, 4:7, vgx2], {z13.b, z14.b}, z8.b // 11000001-00101000-01100001-10111001
+// CHECK-INST: umlsll za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
// CHECK-ENCODING: [0xb9,0x61,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12861b9 <unknown>
umlsll za.s[w11, 4:7], {z13.b - z14.b}, z8.b // 11000001-00101000-01100001-10111001
-// CHECK, INST: umlsll za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
+// CHECK-INST: umlsll za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
// CHECK-ENCODING: [0xb9,0x61,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12861b9 <unknown>
-umlsll za.s[w11, 4:7, vgx2], {z31.b, z0.b}, z15.b // 11000001, 00101111, 01100011, 11111001
-// CHECK, INST: umlsll za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
+umlsll za.s[w11, 4:7, vgx2], {z31.b, z0.b}, z15.b // 11000001-00101111-01100011-11111001
+// CHECK-INST: umlsll za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
// CHECK-ENCODING: [0xf9,0x63,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f63f9 <unknown>
umlsll za.s[w11, 4:7], {z31.b - z0.b}, z15.b // 11000001-00101111-01100011-11111001
-// CHECK, INST: umlsll za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
+// CHECK-INST: umlsll za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
// CHECK-ENCODING: [0xf9,0x63,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f63f9 <unknown>
-umlsll za.s[w8, 4:7, vgx2], {z17.b, z18.b}, z0.b // 11000001, 00100000, 00000010, 00111001
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
+umlsll za.s[w8, 4:7, vgx2], {z17.b, z18.b}, z0.b // 11000001-00100000-00000010-00111001
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
// CHECK-ENCODING: [0x39,0x02,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200239 <unknown>
umlsll za.s[w8, 4:7], {z17.b - z18.b}, z0.b // 11000001-00100000-00000010-00111001
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
// CHECK-ENCODING: [0x39,0x02,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200239 <unknown>
-umlsll za.s[w8, 4:7, vgx2], {z1.b, z2.b}, z14.b // 11000001, 00101110, 00000000, 00111001
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
+umlsll za.s[w8, 4:7, vgx2], {z1.b, z2.b}, z14.b // 11000001-00101110-00000000-00111001
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
// CHECK-ENCODING: [0x39,0x00,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0039 <unknown>
umlsll za.s[w8, 4:7], {z1.b - z2.b}, z14.b // 11000001-00101110-00000000-00111001
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
// CHECK-ENCODING: [0x39,0x00,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0039 <unknown>
-umlsll za.s[w10, 0:3, vgx2], {z19.b, z20.b}, z4.b // 11000001, 00100100, 01000010, 01111000
-// CHECK, INST: umlsll za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
+umlsll za.s[w10, 0:3, vgx2], {z19.b, z20.b}, z4.b // 11000001-00100100-01000010-01111000
+// CHECK-INST: umlsll za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
// CHECK-ENCODING: [0x78,0x42,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244278 <unknown>
umlsll za.s[w10, 0:3], {z19.b - z20.b}, z4.b // 11000001-00100100-01000010-01111000
-// CHECK, INST: umlsll za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
+// CHECK-INST: umlsll za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
// CHECK-ENCODING: [0x78,0x42,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244278 <unknown>
-umlsll za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b // 11000001, 00100010, 00000001, 10011000
-// CHECK, INST: umlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
+umlsll za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b // 11000001-00100010-00000001-10011000
+// CHECK-INST: umlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
// CHECK-ENCODING: [0x98,0x01,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220198 <unknown>
umlsll za.s[w8, 0:3], {z12.b - z13.b}, z2.b // 11000001-00100010-00000001-10011000
-// CHECK, INST: umlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
+// CHECK-INST: umlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
// CHECK-ENCODING: [0x98,0x01,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220198 <unknown>
-umlsll za.s[w10, 4:7, vgx2], {z1.b, z2.b}, z10.b // 11000001, 00101010, 01000000, 00111001
-// CHECK, INST: umlsll za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
+umlsll za.s[w10, 4:7, vgx2], {z1.b, z2.b}, z10.b // 11000001-00101010-01000000-00111001
+// CHECK-INST: umlsll za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
// CHECK-ENCODING: [0x39,0x40,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4039 <unknown>
umlsll za.s[w10, 4:7], {z1.b - z2.b}, z10.b // 11000001-00101010-01000000-00111001
-// CHECK, INST: umlsll za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
+// CHECK-INST: umlsll za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
// CHECK-ENCODING: [0x39,0x40,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4039 <unknown>
-umlsll za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b // 11000001, 00101110, 00000010, 11011001
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
+umlsll za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b // 11000001-00101110-00000010-11011001
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
// CHECK-ENCODING: [0xd9,0x02,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e02d9 <unknown>
umlsll za.s[w8, 4:7], {z22.b - z23.b}, z14.b // 11000001-00101110-00000010-11011001
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
// CHECK-ENCODING: [0xd9,0x02,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e02d9 <unknown>
-umlsll za.s[w11, 0:3, vgx2], {z9.b, z10.b}, z1.b // 11000001, 00100001, 01100001, 00111000
-// CHECK, INST: umlsll za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
+umlsll za.s[w11, 0:3, vgx2], {z9.b, z10.b}, z1.b // 11000001-00100001-01100001-00111000
+// CHECK-INST: umlsll za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
// CHECK-ENCODING: [0x38,0x61,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1216138 <unknown>
umlsll za.s[w11, 0:3], {z9.b - z10.b}, z1.b // 11000001-00100001-01100001-00111000
-// CHECK, INST: umlsll za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
+// CHECK-INST: umlsll za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
// CHECK-ENCODING: [0x38,0x61,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1216138 <unknown>
-umlsll za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b // 11000001, 00101011, 00100001, 10011001
-// CHECK, INST: umlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
+umlsll za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b // 11000001-00101011-00100001-10011001
+// CHECK-INST: umlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
// CHECK-ENCODING: [0x99,0x21,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b2199 <unknown>
umlsll za.s[w9, 4:7], {z12.b - z13.b}, z11.b // 11000001-00101011-00100001-10011001
-// CHECK, INST: umlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
+// CHECK-INST: umlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
// CHECK-ENCODING: [0x99,0x21,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b2199 <unknown>
-umlsll za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b[0] // 11000001, 00010000, 00000000, 00011000
-// CHECK, INST: umlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
+umlsll za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b[0] // 11000001-00010000-00000000-00011000
+// CHECK-INST: umlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
// CHECK-ENCODING: [0x18,0x00,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100018 <unknown>
umlsll za.s[w8, 0:3], {z0.b - z1.b}, z0.b[0] // 11000001-00010000-00000000-00011000
-// CHECK, INST: umlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
+// CHECK-INST: umlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
// CHECK-ENCODING: [0x18,0x00,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100018 <unknown>
-umlsll za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b[6] // 11000001, 00010101, 01000101, 01011101
-// CHECK, INST: umlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
+umlsll za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b[6] // 11000001-00010101-01000101-01011101
+// CHECK-INST: umlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
// CHECK-ENCODING: [0x5d,0x45,0x15,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c115455d <unknown>
umlsll za.s[w10, 4:7], {z10.b - z11.b}, z5.b[6] // 11000001-00010101-01000101-01011101
-// CHECK, INST: umlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
+// CHECK-INST: umlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
// CHECK-ENCODING: [0x5d,0x45,0x15,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c115455d <unknown>
-umlsll za.s[w11, 4:7, vgx2], {z12.b, z13.b}, z8.b[15] // 11000001, 00011000, 01101101, 10011111
-// CHECK, INST: umlsll za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
+umlsll za.s[w11, 4:7, vgx2], {z12.b, z13.b}, z8.b[15] // 11000001-00011000-01101101-10011111
+// CHECK-INST: umlsll za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
// CHECK-ENCODING: [0x9f,0x6d,0x18,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1186d9f <unknown>
umlsll za.s[w11, 4:7], {z12.b - z13.b}, z8.b[15] // 11000001-00011000-01101101-10011111
-// CHECK, INST: umlsll za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
+// CHECK-INST: umlsll za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
// CHECK-ENCODING: [0x9f,0x6d,0x18,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1186d9f <unknown>
-umlsll za.s[w11, 4:7, vgx2], {z30.b, z31.b}, z15.b[15] // 11000001, 00011111, 01101111, 11011111
-// CHECK, INST: umlsll za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
+umlsll za.s[w11, 4:7, vgx2], {z30.b, z31.b}, z15.b[15] // 11000001-00011111-01101111-11011111
+// CHECK-INST: umlsll za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
// CHECK-ENCODING: [0xdf,0x6f,0x1f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11f6fdf <unknown>
umlsll za.s[w11, 4:7], {z30.b - z31.b}, z15.b[15] // 11000001-00011111-01101111-11011111
-// CHECK, INST: umlsll za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
+// CHECK-INST: umlsll za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
// CHECK-ENCODING: [0xdf,0x6f,0x1f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11f6fdf <unknown>
-umlsll za.s[w8, 4:7, vgx2], {z16.b, z17.b}, z0.b[14] // 11000001, 00010000, 00001110, 00011101
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
+umlsll za.s[w8, 4:7, vgx2], {z16.b, z17.b}, z0.b[14] // 11000001-00010000-00001110-00011101
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
// CHECK-ENCODING: [0x1d,0x0e,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100e1d <unknown>
umlsll za.s[w8, 4:7], {z16.b - z17.b}, z0.b[14] // 11000001-00010000-00001110-00011101
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
// CHECK-ENCODING: [0x1d,0x0e,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100e1d <unknown>
-umlsll za.s[w8, 4:7, vgx2], {z0.b, z1.b}, z14.b[4] // 11000001, 00011110, 00000100, 00011001
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
+umlsll za.s[w8, 4:7, vgx2], {z0.b, z1.b}, z14.b[4] // 11000001-00011110-00000100-00011001
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
// CHECK-ENCODING: [0x19,0x04,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0419 <unknown>
umlsll za.s[w8, 4:7], {z0.b - z1.b}, z14.b[4] // 11000001-00011110-00000100-00011001
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
// CHECK-ENCODING: [0x19,0x04,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0419 <unknown>
-umlsll za.s[w10, 0:3, vgx2], {z18.b, z19.b}, z4.b[4] // 11000001, 00010100, 01000110, 01011000
-// CHECK, INST: umlsll za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
+umlsll za.s[w10, 0:3, vgx2], {z18.b, z19.b}, z4.b[4] // 11000001-00010100-01000110-01011000
+// CHECK-INST: umlsll za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
// CHECK-ENCODING: [0x58,0x46,0x14,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1144658 <unknown>
umlsll za.s[w10, 0:3], {z18.b - z19.b}, z4.b[4] // 11000001-00010100-01000110-01011000
-// CHECK, INST: umlsll za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
+// CHECK-INST: umlsll za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
// CHECK-ENCODING: [0x58,0x46,0x14,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1144658 <unknown>
-umlsll za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b[8] // 11000001, 00010010, 00001001, 10011000
-// CHECK, INST: umlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
+umlsll za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b[8] // 11000001-00010010-00001001-10011000
+// CHECK-INST: umlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
// CHECK-ENCODING: [0x98,0x09,0x12,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1120998 <unknown>
umlsll za.s[w8, 0:3], {z12.b - z13.b}, z2.b[8] // 11000001-00010010-00001001-10011000
-// CHECK, INST: umlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
+// CHECK-INST: umlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
// CHECK-ENCODING: [0x98,0x09,0x12,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1120998 <unknown>
-umlsll za.s[w10, 4:7, vgx2], {z0.b, z1.b}, z10.b[8] // 11000001, 00011010, 01001000, 00011001
-// CHECK, INST: umlsll za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
+umlsll za.s[w10, 4:7, vgx2], {z0.b, z1.b}, z10.b[8] // 11000001-00011010-01001000-00011001
+// CHECK-INST: umlsll za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
// CHECK-ENCODING: [0x19,0x48,0x1a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11a4819 <unknown>
umlsll za.s[w10, 4:7], {z0.b - z1.b}, z10.b[8] // 11000001-00011010-01001000-00011001
-// CHECK, INST: umlsll za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
+// CHECK-INST: umlsll za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
// CHECK-ENCODING: [0x19,0x48,0x1a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11a4819 <unknown>
-umlsll za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b[10] // 11000001, 00011110, 00001010, 11011101
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
+umlsll za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b[10] // 11000001-00011110-00001010-11011101
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
// CHECK-ENCODING: [0xdd,0x0a,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0add <unknown>
umlsll za.s[w8, 4:7], {z22.b - z23.b}, z14.b[10] // 11000001-00011110-00001010-11011101
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
// CHECK-ENCODING: [0xdd,0x0a,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0add <unknown>
-umlsll za.s[w11, 0:3, vgx2], {z8.b, z9.b}, z1.b[5] // 11000001, 00010001, 01100101, 00011010
-// CHECK, INST: umlsll za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
+umlsll za.s[w11, 0:3, vgx2], {z8.b, z9.b}, z1.b[5] // 11000001-00010001-01100101-00011010
+// CHECK-INST: umlsll za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
// CHECK-ENCODING: [0x1a,0x65,0x11,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c111651a <unknown>
umlsll za.s[w11, 0:3], {z8.b - z9.b}, z1.b[5] // 11000001-00010001-01100101-00011010
-// CHECK, INST: umlsll za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
+// CHECK-INST: umlsll za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
// CHECK-ENCODING: [0x1a,0x65,0x11,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c111651a <unknown>
-umlsll za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b[11] // 11000001, 00011011, 00101001, 10011111
-// CHECK, INST: umlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
+umlsll za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b[11] // 11000001-00011011-00101001-10011111
+// CHECK-INST: umlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
// CHECK-ENCODING: [0x9f,0x29,0x1b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11b299f <unknown>
umlsll za.s[w9, 4:7], {z12.b - z13.b}, z11.b[11] // 11000001-00011011-00101001-10011111
-// CHECK, INST: umlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
+// CHECK-INST: umlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
// CHECK-ENCODING: [0x9f,0x29,0x1b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11b299f <unknown>
-umlsll za.s[w8, 0:3, vgx2], {z0.b, z1.b}, {z0.b, z1.b} // 11000001, 10100000, 00000000, 00011000
-// CHECK, INST: umlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
+umlsll za.s[w8, 0:3, vgx2], {z0.b, z1.b}, {z0.b, z1.b} // 11000001-10100000-00000000-00011000
+// CHECK-INST: umlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x18,0x00,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00018 <unknown>
umlsll za.s[w8, 0:3], {z0.b - z1.b}, {z0.b - z1.b} // 11000001-10100000-00000000-00011000
-// CHECK, INST: umlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
+// CHECK-INST: umlsll za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x18,0x00,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00018 <unknown>
-umlsll za.s[w10, 4:7, vgx2], {z10.b, z11.b}, {z20.b, z21.b} // 11000001, 10110100, 01000001, 01011001
-// CHECK, INST: umlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
+umlsll za.s[w10, 4:7, vgx2], {z10.b, z11.b}, {z20.b, z21.b} // 11000001-10110100-01000001-01011001
+// CHECK-INST: umlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x59,0x41,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44159 <unknown>
umlsll za.s[w10, 4:7], {z10.b - z11.b}, {z20.b - z21.b} // 11000001-10110100-01000001-01011001
-// CHECK, INST: umlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
+// CHECK-INST: umlsll za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x59,0x41,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44159 <unknown>
-umlsll za.s[w11, 4:7, vgx2], {z12.b, z13.b}, {z8.b, z9.b} // 11000001, 10101000, 01100001, 10011001
-// CHECK, INST: umlsll za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
+umlsll za.s[w11, 4:7, vgx2], {z12.b, z13.b}, {z8.b, z9.b} // 11000001-10101000-01100001-10011001
+// CHECK-INST: umlsll za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
// CHECK-ENCODING: [0x99,0x61,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a86199 <unknown>
umlsll za.s[w11, 4:7], {z12.b - z13.b}, {z8.b - z9.b} // 11000001-10101000-01100001-10011001
-// CHECK, INST: umlsll za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
+// CHECK-INST: umlsll za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
// CHECK-ENCODING: [0x99,0x61,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a86199 <unknown>
-umlsll za.s[w11, 4:7, vgx2], {z30.b, z31.b}, {z30.b, z31.b} // 11000001, 10111110, 01100011, 11011001
-// CHECK, INST: umlsll za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
+umlsll za.s[w11, 4:7, vgx2], {z30.b, z31.b}, {z30.b, z31.b} // 11000001-10111110-01100011-11011001
+// CHECK-INST: umlsll za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xd9,0x63,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be63d9 <unknown>
umlsll za.s[w11, 4:7], {z30.b - z31.b}, {z30.b - z31.b} // 11000001-10111110-01100011-11011001
-// CHECK, INST: umlsll za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
+// CHECK-INST: umlsll za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xd9,0x63,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be63d9 <unknown>
-umlsll za.s[w8, 4:7, vgx2], {z16.b, z17.b}, {z16.b, z17.b} // 11000001, 10110000, 00000010, 00011001
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
+umlsll za.s[w8, 4:7, vgx2], {z16.b, z17.b}, {z16.b, z17.b} // 11000001-10110000-00000010-00011001
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
// CHECK-ENCODING: [0x19,0x02,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00219 <unknown>
umlsll za.s[w8, 4:7], {z16.b - z17.b}, {z16.b - z17.b} // 11000001-10110000-00000010-00011001
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
// CHECK-ENCODING: [0x19,0x02,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00219 <unknown>
-umlsll za.s[w8, 4:7, vgx2], {z0.b, z1.b}, {z30.b, z31.b} // 11000001, 10111110, 00000000, 00011001
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
+umlsll za.s[w8, 4:7, vgx2], {z0.b, z1.b}, {z30.b, z31.b} // 11000001-10111110-00000000-00011001
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0x19,0x00,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0019 <unknown>
umlsll za.s[w8, 4:7], {z0.b - z1.b}, {z30.b - z31.b} // 11000001-10111110-00000000-00011001
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0x19,0x00,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0019 <unknown>
-umlsll za.s[w10, 0:3, vgx2], {z18.b, z19.b}, {z20.b, z21.b} // 11000001, 10110100, 01000010, 01011000
-// CHECK, INST: umlsll za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
+umlsll za.s[w10, 0:3, vgx2], {z18.b, z19.b}, {z20.b, z21.b} // 11000001-10110100-01000010-01011000
+// CHECK-INST: umlsll za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x58,0x42,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44258 <unknown>
umlsll za.s[w10, 0:3], {z18.b - z19.b}, {z20.b - z21.b} // 11000001-10110100-01000010-01011000
-// CHECK, INST: umlsll za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
+// CHECK-INST: umlsll za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x58,0x42,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44258 <unknown>
-umlsll za.s[w8, 0:3, vgx2], {z12.b, z13.b}, {z2.b, z3.b} // 11000001, 10100010, 00000001, 10011000
-// CHECK, INST: umlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
+umlsll za.s[w8, 0:3, vgx2], {z12.b, z13.b}, {z2.b, z3.b} // 11000001-10100010-00000001-10011000
+// CHECK-INST: umlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
// CHECK-ENCODING: [0x98,0x01,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20198 <unknown>
umlsll za.s[w8, 0:3], {z12.b - z13.b}, {z2.b - z3.b} // 11000001-10100010-00000001-10011000
-// CHECK, INST: umlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
+// CHECK-INST: umlsll za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
// CHECK-ENCODING: [0x98,0x01,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20198 <unknown>
-umlsll za.s[w10, 4:7, vgx2], {z0.b, z1.b}, {z26.b, z27.b} // 11000001, 10111010, 01000000, 00011001
-// CHECK, INST: umlsll za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
+umlsll za.s[w10, 4:7, vgx2], {z0.b, z1.b}, {z26.b, z27.b} // 11000001-10111010-01000000-00011001
+// CHECK-INST: umlsll za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
// CHECK-ENCODING: [0x19,0x40,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4019 <unknown>
umlsll za.s[w10, 4:7], {z0.b - z1.b}, {z26.b - z27.b} // 11000001-10111010-01000000-00011001
-// CHECK, INST: umlsll za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
+// CHECK-INST: umlsll za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
// CHECK-ENCODING: [0x19,0x40,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4019 <unknown>
-umlsll za.s[w8, 4:7, vgx2], {z22.b, z23.b}, {z30.b, z31.b} // 11000001, 10111110, 00000010, 11011001
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
+umlsll za.s[w8, 4:7, vgx2], {z22.b, z23.b}, {z30.b, z31.b} // 11000001-10111110-00000010-11011001
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xd9,0x02,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be02d9 <unknown>
umlsll za.s[w8, 4:7], {z22.b - z23.b}, {z30.b - z31.b} // 11000001-10111110-00000010-11011001
-// CHECK, INST: umlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
+// CHECK-INST: umlsll za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xd9,0x02,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be02d9 <unknown>
-umlsll za.s[w11, 0:3, vgx2], {z8.b, z9.b}, {z0.b, z1.b} // 11000001, 10100000, 01100001, 00011000
-// CHECK, INST: umlsll za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
+umlsll za.s[w11, 0:3, vgx2], {z8.b, z9.b}, {z0.b, z1.b} // 11000001-10100000-01100001-00011000
+// CHECK-INST: umlsll za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x18,0x61,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a06118 <unknown>
umlsll za.s[w11, 0:3], {z8.b - z9.b}, {z0.b - z1.b} // 11000001-10100000-01100001-00011000
-// CHECK, INST: umlsll za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
+// CHECK-INST: umlsll za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x18,0x61,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a06118 <unknown>
-umlsll za.s[w9, 4:7, vgx2], {z12.b, z13.b}, {z10.b, z11.b} // 11000001, 10101010, 00100001, 10011001
-// CHECK, INST: umlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
+umlsll za.s[w9, 4:7, vgx2], {z12.b, z13.b}, {z10.b, z11.b} // 11000001-10101010-00100001-10011001
+// CHECK-INST: umlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
// CHECK-ENCODING: [0x99,0x21,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa2199 <unknown>
umlsll za.s[w9, 4:7], {z12.b - z13.b}, {z10.b - z11.b} // 11000001-10101010-00100001-10011001
-// CHECK, INST: umlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
+// CHECK-INST: umlsll za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
// CHECK-ENCODING: [0x99,0x21,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa2199 <unknown>
-umlsll za.d[w8, 0:3, vgx2], {z0.h, z1.h}, z0.h // 11000001, 01100000, 00000000, 00011000
-// CHECK, INST: umlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h
+umlsll za.d[w8, 0:3, vgx2], {z0.h, z1.h}, z0.h // 11000001-01100000-00000000-00011000
+// CHECK-INST: umlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x18,0x00,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600018 <unknown>
umlsll za.d[w8, 0:3], {z0.h - z1.h}, z0.h // 11000001-01100000-00000000-00011000
-// CHECK, INST: umlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h
+// CHECK-INST: umlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h
// CHECK-ENCODING: [0x18,0x00,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600018 <unknown>
-umlsll za.d[w10, 4:7, vgx2], {z10.h, z11.h}, z5.h // 11000001, 01100101, 01000001, 01011001
-// CHECK, INST: umlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h
+umlsll za.d[w10, 4:7, vgx2], {z10.h, z11.h}, z5.h // 11000001-01100101-01000001-01011001
+// CHECK-INST: umlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x59,0x41,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1654159 <unknown>
umlsll za.d[w10, 4:7], {z10.h - z11.h}, z5.h // 11000001-01100101-01000001-01011001
-// CHECK, INST: umlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h
+// CHECK-INST: umlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h
// CHECK-ENCODING: [0x59,0x41,0x65,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1654159 <unknown>
-umlsll za.d[w11, 4:7, vgx2], {z13.h, z14.h}, z8.h // 11000001, 01101000, 01100001, 10111001
-// CHECK, INST: umlsll za.d[w11, 4:7, vgx2], { z13.h, z14.h }, z8.h
+umlsll za.d[w11, 4:7, vgx2], {z13.h, z14.h}, z8.h // 11000001-01101000-01100001-10111001
+// CHECK-INST: umlsll za.d[w11, 4:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xb9,0x61,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16861b9 <unknown>
umlsll za.d[w11, 4:7], {z13.h - z14.h}, z8.h // 11000001-01101000-01100001-10111001
-// CHECK, INST: umlsll za.d[w11, 4:7, vgx2], { z13.h, z14.h }, z8.h
+// CHECK-INST: umlsll za.d[w11, 4:7, vgx2], { z13.h, z14.h }, z8.h
// CHECK-ENCODING: [0xb9,0x61,0x68,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16861b9 <unknown>
-umlsll za.d[w11, 4:7, vgx2], {z31.h, z0.h}, z15.h // 11000001, 01101111, 01100011, 11111001
-// CHECK, INST: umlsll za.d[w11, 4:7, vgx2], { z31.h, z0.h }, z15.h
+umlsll za.d[w11, 4:7, vgx2], {z31.h, z0.h}, z15.h // 11000001-01101111-01100011-11111001
+// CHECK-INST: umlsll za.d[w11, 4:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xf9,0x63,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f63f9 <unknown>
umlsll za.d[w11, 4:7], {z31.h - z0.h}, z15.h // 11000001-01101111-01100011-11111001
-// CHECK, INST: umlsll za.d[w11, 4:7, vgx2], { z31.h, z0.h }, z15.h
+// CHECK-INST: umlsll za.d[w11, 4:7, vgx2], { z31.h, z0.h }, z15.h
// CHECK-ENCODING: [0xf9,0x63,0x6f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16f63f9 <unknown>
-umlsll za.d[w8, 4:7, vgx2], {z17.h, z18.h}, z0.h // 11000001, 01100000, 00000010, 00111001
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z17.h, z18.h }, z0.h
+umlsll za.d[w8, 4:7, vgx2], {z17.h, z18.h}, z0.h // 11000001-01100000-00000010-00111001
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x39,0x02,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600239 <unknown>
umlsll za.d[w8, 4:7], {z17.h - z18.h}, z0.h // 11000001-01100000-00000010-00111001
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z17.h, z18.h }, z0.h
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z17.h, z18.h }, z0.h
// CHECK-ENCODING: [0x39,0x02,0x60,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1600239 <unknown>
-umlsll za.d[w8, 4:7, vgx2], {z1.h, z2.h}, z14.h // 11000001, 01101110, 00000000, 00111001
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z1.h, z2.h }, z14.h
+umlsll za.d[w8, 4:7, vgx2], {z1.h, z2.h}, z14.h // 11000001-01101110-00000000-00111001
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x39,0x00,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0039 <unknown>
umlsll za.d[w8, 4:7], {z1.h - z2.h}, z14.h // 11000001-01101110-00000000-00111001
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z1.h, z2.h }, z14.h
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z1.h, z2.h }, z14.h
// CHECK-ENCODING: [0x39,0x00,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e0039 <unknown>
-umlsll za.d[w10, 0:3, vgx2], {z19.h, z20.h}, z4.h // 11000001, 01100100, 01000010, 01111000
-// CHECK, INST: umlsll za.d[w10, 0:3, vgx2], { z19.h, z20.h }, z4.h
+umlsll za.d[w10, 0:3, vgx2], {z19.h, z20.h}, z4.h // 11000001-01100100-01000010-01111000
+// CHECK-INST: umlsll za.d[w10, 0:3, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x78,0x42,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1644278 <unknown>
umlsll za.d[w10, 0:3], {z19.h - z20.h}, z4.h // 11000001-01100100-01000010-01111000
-// CHECK, INST: umlsll za.d[w10, 0:3, vgx2], { z19.h, z20.h }, z4.h
+// CHECK-INST: umlsll za.d[w10, 0:3, vgx2], { z19.h, z20.h }, z4.h
// CHECK-ENCODING: [0x78,0x42,0x64,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1644278 <unknown>
-umlsll za.d[w8, 0:3, vgx2], {z12.h, z13.h}, z2.h // 11000001, 01100010, 00000001, 10011000
-// CHECK, INST: umlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h
+umlsll za.d[w8, 0:3, vgx2], {z12.h, z13.h}, z2.h // 11000001-01100010-00000001-10011000
+// CHECK-INST: umlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x98,0x01,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1620198 <unknown>
umlsll za.d[w8, 0:3], {z12.h - z13.h}, z2.h // 11000001-01100010-00000001-10011000
-// CHECK, INST: umlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h
+// CHECK-INST: umlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h
// CHECK-ENCODING: [0x98,0x01,0x62,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1620198 <unknown>
-umlsll za.d[w10, 4:7, vgx2], {z1.h, z2.h}, z10.h // 11000001, 01101010, 01000000, 00111001
-// CHECK, INST: umlsll za.d[w10, 4:7, vgx2], { z1.h, z2.h }, z10.h
+umlsll za.d[w10, 4:7, vgx2], {z1.h, z2.h}, z10.h // 11000001-01101010-01000000-00111001
+// CHECK-INST: umlsll za.d[w10, 4:7, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x39,0x40,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a4039 <unknown>
umlsll za.d[w10, 4:7], {z1.h - z2.h}, z10.h // 11000001-01101010-01000000-00111001
-// CHECK, INST: umlsll za.d[w10, 4:7, vgx2], { z1.h, z2.h }, z10.h
+// CHECK-INST: umlsll za.d[w10, 4:7, vgx2], { z1.h, z2.h }, z10.h
// CHECK-ENCODING: [0x39,0x40,0x6a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16a4039 <unknown>
-umlsll za.d[w8, 4:7, vgx2], {z22.h, z23.h}, z14.h // 11000001, 01101110, 00000010, 11011001
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h
+umlsll za.d[w8, 4:7, vgx2], {z22.h, z23.h}, z14.h // 11000001-01101110-00000010-11011001
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xd9,0x02,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e02d9 <unknown>
umlsll za.d[w8, 4:7], {z22.h - z23.h}, z14.h // 11000001-01101110-00000010-11011001
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h
// CHECK-ENCODING: [0xd9,0x02,0x6e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16e02d9 <unknown>
-umlsll za.d[w11, 0:3, vgx2], {z9.h, z10.h}, z1.h // 11000001, 01100001, 01100001, 00111000
-// CHECK, INST: umlsll za.d[w11, 0:3, vgx2], { z9.h, z10.h }, z1.h
+umlsll za.d[w11, 0:3, vgx2], {z9.h, z10.h}, z1.h // 11000001-01100001-01100001-00111000
+// CHECK-INST: umlsll za.d[w11, 0:3, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x38,0x61,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1616138 <unknown>
umlsll za.d[w11, 0:3], {z9.h - z10.h}, z1.h // 11000001-01100001-01100001-00111000
-// CHECK, INST: umlsll za.d[w11, 0:3, vgx2], { z9.h, z10.h }, z1.h
+// CHECK-INST: umlsll za.d[w11, 0:3, vgx2], { z9.h, z10.h }, z1.h
// CHECK-ENCODING: [0x38,0x61,0x61,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1616138 <unknown>
-umlsll za.d[w9, 4:7, vgx2], {z12.h, z13.h}, z11.h // 11000001, 01101011, 00100001, 10011001
-// CHECK, INST: umlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h
+umlsll za.d[w9, 4:7, vgx2], {z12.h, z13.h}, z11.h // 11000001-01101011-00100001-10011001
+// CHECK-INST: umlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x99,0x21,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16b2199 <unknown>
umlsll za.d[w9, 4:7], {z12.h - z13.h}, z11.h // 11000001-01101011-00100001-10011001
-// CHECK, INST: umlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h
+// CHECK-INST: umlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h
// CHECK-ENCODING: [0x99,0x21,0x6b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c16b2199 <unknown>
-umlsll za.d[w8, 0:3, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001, 10010000, 00000000, 00011000
-// CHECK, INST: umlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h[0]
+umlsll za.d[w8, 0:3, vgx2], {z0.h, z1.h}, z0.h[0] // 11000001-10010000-00000000-00011000
+// CHECK-INST: umlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x18,0x00,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1900018 <unknown>
umlsll za.d[w8, 0:3], {z0.h - z1.h}, z0.h[0] // 11000001-10010000-00000000-00011000
-// CHECK, INST: umlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h[0]
+// CHECK-INST: umlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, z0.h[0]
// CHECK-ENCODING: [0x18,0x00,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1900018 <unknown>
-umlsll za.d[w10, 4:7, vgx2], {z10.h, z11.h}, z5.h[6] // 11000001, 10010101, 01000101, 01011101
-// CHECK, INST: umlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h[6]
+umlsll za.d[w10, 4:7, vgx2], {z10.h, z11.h}, z5.h[6] // 11000001-10010101-01000101-01011101
+// CHECK-INST: umlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h[6]
// CHECK-ENCODING: [0x5d,0x45,0x95,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c195455d <unknown>
umlsll za.d[w10, 4:7], {z10.h - z11.h}, z5.h[6] // 11000001-10010101-01000101-01011101
-// CHECK, INST: umlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h[6]
+// CHECK-INST: umlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, z5.h[6]
// CHECK-ENCODING: [0x5d,0x45,0x95,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c195455d <unknown>
-umlsll za.d[w11, 4:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001, 10011000, 01100101, 10011111
-// CHECK, INST: umlsll za.d[w11, 4:7, vgx2], { z12.h, z13.h }, z8.h[7]
+umlsll za.d[w11, 4:7, vgx2], {z12.h, z13.h}, z8.h[7] // 11000001-10011000-01100101-10011111
+// CHECK-INST: umlsll za.d[w11, 4:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x9f,0x65,0x98,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c198659f <unknown>
umlsll za.d[w11, 4:7], {z12.h - z13.h}, z8.h[7] // 11000001-10011000-01100101-10011111
-// CHECK, INST: umlsll za.d[w11, 4:7, vgx2], { z12.h, z13.h }, z8.h[7]
+// CHECK-INST: umlsll za.d[w11, 4:7, vgx2], { z12.h, z13.h }, z8.h[7]
// CHECK-ENCODING: [0x9f,0x65,0x98,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c198659f <unknown>
-umlsll za.d[w11, 4:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001, 10011111, 01100111, 11011111
-// CHECK, INST: umlsll za.d[w11, 4:7, vgx2], { z30.h, z31.h }, z15.h[7]
+umlsll za.d[w11, 4:7, vgx2], {z30.h, z31.h}, z15.h[7] // 11000001-10011111-01100111-11011111
+// CHECK-INST: umlsll za.d[w11, 4:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xdf,0x67,0x9f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19f67df <unknown>
umlsll za.d[w11, 4:7], {z30.h - z31.h}, z15.h[7] // 11000001-10011111-01100111-11011111
-// CHECK, INST: umlsll za.d[w11, 4:7, vgx2], { z30.h, z31.h }, z15.h[7]
+// CHECK-INST: umlsll za.d[w11, 4:7, vgx2], { z30.h, z31.h }, z15.h[7]
// CHECK-ENCODING: [0xdf,0x67,0x9f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19f67df <unknown>
-umlsll za.d[w8, 4:7, vgx2], {z16.h, z17.h}, z0.h[6] // 11000001, 10010000, 00000110, 00011101
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z16.h, z17.h }, z0.h[6]
+umlsll za.d[w8, 4:7, vgx2], {z16.h, z17.h}, z0.h[6] // 11000001-10010000-00000110-00011101
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z16.h, z17.h }, z0.h[6]
// CHECK-ENCODING: [0x1d,0x06,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c190061d <unknown>
umlsll za.d[w8, 4:7], {z16.h - z17.h}, z0.h[6] // 11000001-10010000-00000110-00011101
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z16.h, z17.h }, z0.h[6]
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z16.h, z17.h }, z0.h[6]
// CHECK-ENCODING: [0x1d,0x06,0x90,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c190061d <unknown>
-umlsll za.d[w8, 4:7, vgx2], {z0.h, z1.h}, z14.h[4] // 11000001, 10011110, 00000100, 00011001
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z0.h, z1.h }, z14.h[4]
+umlsll za.d[w8, 4:7, vgx2], {z0.h, z1.h}, z14.h[4] // 11000001-10011110-00000100-00011001
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z0.h, z1.h }, z14.h[4]
// CHECK-ENCODING: [0x19,0x04,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e0419 <unknown>
umlsll za.d[w8, 4:7], {z0.h - z1.h}, z14.h[4] // 11000001-10011110-00000100-00011001
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z0.h, z1.h }, z14.h[4]
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z0.h, z1.h }, z14.h[4]
// CHECK-ENCODING: [0x19,0x04,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e0419 <unknown>
-umlsll za.d[w10, 0:3, vgx2], {z18.h, z19.h}, z4.h[4] // 11000001, 10010100, 01000110, 01011000
-// CHECK, INST: umlsll za.d[w10, 0:3, vgx2], { z18.h, z19.h }, z4.h[4]
+umlsll za.d[w10, 0:3, vgx2], {z18.h, z19.h}, z4.h[4] // 11000001-10010100-01000110-01011000
+// CHECK-INST: umlsll za.d[w10, 0:3, vgx2], { z18.h, z19.h }, z4.h[4]
// CHECK-ENCODING: [0x58,0x46,0x94,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1944658 <unknown>
umlsll za.d[w10, 0:3], {z18.h - z19.h}, z4.h[4] // 11000001-10010100-01000110-01011000
-// CHECK, INST: umlsll za.d[w10, 0:3, vgx2], { z18.h, z19.h }, z4.h[4]
+// CHECK-INST: umlsll za.d[w10, 0:3, vgx2], { z18.h, z19.h }, z4.h[4]
// CHECK-ENCODING: [0x58,0x46,0x94,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1944658 <unknown>
-umlsll za.d[w8, 0:3, vgx2], {z12.h, z13.h}, z2.h[0] // 11000001, 10010010, 00000001, 10011000
-// CHECK, INST: umlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h[0]
+umlsll za.d[w8, 0:3, vgx2], {z12.h, z13.h}, z2.h[0] // 11000001-10010010-00000001-10011000
+// CHECK-INST: umlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h[0]
// CHECK-ENCODING: [0x98,0x01,0x92,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1920198 <unknown>
umlsll za.d[w8, 0:3], {z12.h - z13.h}, z2.h[0] // 11000001-10010010-00000001-10011000
-// CHECK, INST: umlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h[0]
+// CHECK-INST: umlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, z2.h[0]
// CHECK-ENCODING: [0x98,0x01,0x92,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1920198 <unknown>
-umlsll za.d[w10, 4:7, vgx2], {z0.h, z1.h}, z10.h[0] // 11000001, 10011010, 01000000, 00011001
-// CHECK, INST: umlsll za.d[w10, 4:7, vgx2], { z0.h, z1.h }, z10.h[0]
+umlsll za.d[w10, 4:7, vgx2], {z0.h, z1.h}, z10.h[0] // 11000001-10011010-01000000-00011001
+// CHECK-INST: umlsll za.d[w10, 4:7, vgx2], { z0.h, z1.h }, z10.h[0]
// CHECK-ENCODING: [0x19,0x40,0x9a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19a4019 <unknown>
umlsll za.d[w10, 4:7], {z0.h - z1.h}, z10.h[0] // 11000001-10011010-01000000-00011001
-// CHECK, INST: umlsll za.d[w10, 4:7, vgx2], { z0.h, z1.h }, z10.h[0]
+// CHECK-INST: umlsll za.d[w10, 4:7, vgx2], { z0.h, z1.h }, z10.h[0]
// CHECK-ENCODING: [0x19,0x40,0x9a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19a4019 <unknown>
-umlsll za.d[w8, 4:7, vgx2], {z22.h, z23.h}, z14.h[2] // 11000001, 10011110, 00000010, 11011101
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h[2]
+umlsll za.d[w8, 4:7, vgx2], {z22.h, z23.h}, z14.h[2] // 11000001-10011110-00000010-11011101
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h[2]
// CHECK-ENCODING: [0xdd,0x02,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e02dd <unknown>
umlsll za.d[w8, 4:7], {z22.h - z23.h}, z14.h[2] // 11000001-10011110-00000010-11011101
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h[2]
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, z14.h[2]
// CHECK-ENCODING: [0xdd,0x02,0x9e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19e02dd <unknown>
-umlsll za.d[w11, 0:3, vgx2], {z8.h, z9.h}, z1.h[5] // 11000001, 10010001, 01100101, 00011010
-// CHECK, INST: umlsll za.d[w11, 0:3, vgx2], { z8.h, z9.h }, z1.h[5]
+umlsll za.d[w11, 0:3, vgx2], {z8.h, z9.h}, z1.h[5] // 11000001-10010001-01100101-00011010
+// CHECK-INST: umlsll za.d[w11, 0:3, vgx2], { z8.h, z9.h }, z1.h[5]
// CHECK-ENCODING: [0x1a,0x65,0x91,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c191651a <unknown>
umlsll za.d[w11, 0:3], {z8.h - z9.h}, z1.h[5] // 11000001-10010001-01100101-00011010
-// CHECK, INST: umlsll za.d[w11, 0:3, vgx2], { z8.h, z9.h }, z1.h[5]
+// CHECK-INST: umlsll za.d[w11, 0:3, vgx2], { z8.h, z9.h }, z1.h[5]
// CHECK-ENCODING: [0x1a,0x65,0x91,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c191651a <unknown>
-umlsll za.d[w9, 4:7, vgx2], {z12.h, z13.h}, z11.h[3] // 11000001, 10011011, 00100001, 10011111
-// CHECK, INST: umlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h[3]
+umlsll za.d[w9, 4:7, vgx2], {z12.h, z13.h}, z11.h[3] // 11000001-10011011-00100001-10011111
+// CHECK-INST: umlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h[3]
// CHECK-ENCODING: [0x9f,0x21,0x9b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19b219f <unknown>
umlsll za.d[w9, 4:7], {z12.h - z13.h}, z11.h[3] // 11000001-10011011-00100001-10011111
-// CHECK, INST: umlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h[3]
+// CHECK-INST: umlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, z11.h[3]
// CHECK-ENCODING: [0x9f,0x21,0x9b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c19b219f <unknown>
-umlsll za.d[w8, 0:3, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001, 11100000, 00000000, 00011000
-// CHECK, INST: umlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+umlsll za.d[w8, 0:3, vgx2], {z0.h, z1.h}, {z0.h, z1.h} // 11000001-11100000-00000000-00011000
+// CHECK-INST: umlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x18,0x00,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e00018 <unknown>
umlsll za.d[w8, 0:3], {z0.h - z1.h}, {z0.h - z1.h} // 11000001-11100000-00000000-00011000
-// CHECK, INST: umlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
+// CHECK-INST: umlsll za.d[w8, 0:3, vgx2], { z0.h, z1.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x18,0x00,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e00018 <unknown>
-umlsll za.d[w10, 4:7, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001, 11110100, 01000001, 01011001
-// CHECK, INST: umlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+umlsll za.d[w10, 4:7, vgx2], {z10.h, z11.h}, {z20.h, z21.h} // 11000001-11110100-01000001-01011001
+// CHECK-INST: umlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x59,0x41,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44159 <unknown>
umlsll za.d[w10, 4:7], {z10.h - z11.h}, {z20.h - z21.h} // 11000001-11110100-01000001-01011001
-// CHECK, INST: umlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
+// CHECK-INST: umlsll za.d[w10, 4:7, vgx2], { z10.h, z11.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x59,0x41,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44159 <unknown>
-umlsll za.d[w11, 4:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001, 11101000, 01100001, 10011001
-// CHECK, INST: umlsll za.d[w11, 4:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+umlsll za.d[w11, 4:7, vgx2], {z12.h, z13.h}, {z8.h, z9.h} // 11000001-11101000-01100001-10011001
+// CHECK-INST: umlsll za.d[w11, 4:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x99,0x61,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e86199 <unknown>
umlsll za.d[w11, 4:7], {z12.h - z13.h}, {z8.h - z9.h} // 11000001-11101000-01100001-10011001
-// CHECK, INST: umlsll za.d[w11, 4:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
+// CHECK-INST: umlsll za.d[w11, 4:7, vgx2], { z12.h, z13.h }, { z8.h, z9.h }
// CHECK-ENCODING: [0x99,0x61,0xe8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e86199 <unknown>
-umlsll za.d[w11, 4:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001, 11111110, 01100011, 11011001
-// CHECK, INST: umlsll za.d[w11, 4:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+umlsll za.d[w11, 4:7, vgx2], {z30.h, z31.h}, {z30.h, z31.h} // 11000001-11111110-01100011-11011001
+// CHECK-INST: umlsll za.d[w11, 4:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd9,0x63,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe63d9 <unknown>
umlsll za.d[w11, 4:7], {z30.h - z31.h}, {z30.h - z31.h} // 11000001-11111110-01100011-11011001
-// CHECK, INST: umlsll za.d[w11, 4:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
+// CHECK-INST: umlsll za.d[w11, 4:7, vgx2], { z30.h, z31.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd9,0x63,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe63d9 <unknown>
-umlsll za.d[w8, 4:7, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001, 11110000, 00000010, 00011001
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+umlsll za.d[w8, 4:7, vgx2], {z16.h, z17.h}, {z16.h, z17.h} // 11000001-11110000-00000010-00011001
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x19,0x02,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f00219 <unknown>
umlsll za.d[w8, 4:7], {z16.h - z17.h}, {z16.h - z17.h} // 11000001-11110000-00000010-00011001
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z16.h, z17.h }, { z16.h, z17.h }
// CHECK-ENCODING: [0x19,0x02,0xf0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f00219 <unknown>
-umlsll za.d[w8, 4:7, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001, 11111110, 00000000, 00011001
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+umlsll za.d[w8, 4:7, vgx2], {z0.h, z1.h}, {z30.h, z31.h} // 11000001-11111110-00000000-00011001
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x19,0x00,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0019 <unknown>
umlsll za.d[w8, 4:7], {z0.h - z1.h}, {z30.h - z31.h} // 11000001-11111110-00000000-00011001
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z0.h, z1.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0x19,0x00,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe0019 <unknown>
-umlsll za.d[w10, 0:3, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001, 11110100, 01000010, 01011000
-// CHECK, INST: umlsll za.d[w10, 0:3, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+umlsll za.d[w10, 0:3, vgx2], {z18.h, z19.h}, {z20.h, z21.h} // 11000001-11110100-01000010-01011000
+// CHECK-INST: umlsll za.d[w10, 0:3, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x58,0x42,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44258 <unknown>
umlsll za.d[w10, 0:3], {z18.h - z19.h}, {z20.h - z21.h} // 11000001-11110100-01000010-01011000
-// CHECK, INST: umlsll za.d[w10, 0:3, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
+// CHECK-INST: umlsll za.d[w10, 0:3, vgx2], { z18.h, z19.h }, { z20.h, z21.h }
// CHECK-ENCODING: [0x58,0x42,0xf4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1f44258 <unknown>
-umlsll za.d[w8, 0:3, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001, 11100010, 00000001, 10011000
-// CHECK, INST: umlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+umlsll za.d[w8, 0:3, vgx2], {z12.h, z13.h}, {z2.h, z3.h} // 11000001-11100010-00000001-10011000
+// CHECK-INST: umlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x98,0x01,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e20198 <unknown>
umlsll za.d[w8, 0:3], {z12.h - z13.h}, {z2.h - z3.h} // 11000001-11100010-00000001-10011000
-// CHECK, INST: umlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
+// CHECK-INST: umlsll za.d[w8, 0:3, vgx2], { z12.h, z13.h }, { z2.h, z3.h }
// CHECK-ENCODING: [0x98,0x01,0xe2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e20198 <unknown>
-umlsll za.d[w10, 4:7, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001, 11111010, 01000000, 00011001
-// CHECK, INST: umlsll za.d[w10, 4:7, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+umlsll za.d[w10, 4:7, vgx2], {z0.h, z1.h}, {z26.h, z27.h} // 11000001-11111010-01000000-00011001
+// CHECK-INST: umlsll za.d[w10, 4:7, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x19,0x40,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa4019 <unknown>
umlsll za.d[w10, 4:7], {z0.h - z1.h}, {z26.h - z27.h} // 11000001-11111010-01000000-00011001
-// CHECK, INST: umlsll za.d[w10, 4:7, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
+// CHECK-INST: umlsll za.d[w10, 4:7, vgx2], { z0.h, z1.h }, { z26.h, z27.h }
// CHECK-ENCODING: [0x19,0x40,0xfa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fa4019 <unknown>
-umlsll za.d[w8, 4:7, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001, 11111110, 00000010, 11011001
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+umlsll za.d[w8, 4:7, vgx2], {z22.h, z23.h}, {z30.h, z31.h} // 11000001-11111110-00000010-11011001
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd9,0x02,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe02d9 <unknown>
umlsll za.d[w8, 4:7], {z22.h - z23.h}, {z30.h - z31.h} // 11000001-11111110-00000010-11011001
-// CHECK, INST: umlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
+// CHECK-INST: umlsll za.d[w8, 4:7, vgx2], { z22.h, z23.h }, { z30.h, z31.h }
// CHECK-ENCODING: [0xd9,0x02,0xfe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1fe02d9 <unknown>
-umlsll za.d[w11, 0:3, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001, 11100000, 01100001, 00011000
-// CHECK, INST: umlsll za.d[w11, 0:3, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+umlsll za.d[w11, 0:3, vgx2], {z8.h, z9.h}, {z0.h, z1.h} // 11000001-11100000-01100001-00011000
+// CHECK-INST: umlsll za.d[w11, 0:3, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x18,0x61,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e06118 <unknown>
umlsll za.d[w11, 0:3], {z8.h - z9.h}, {z0.h - z1.h} // 11000001-11100000-01100001-00011000
-// CHECK, INST: umlsll za.d[w11, 0:3, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
+// CHECK-INST: umlsll za.d[w11, 0:3, vgx2], { z8.h, z9.h }, { z0.h, z1.h }
// CHECK-ENCODING: [0x18,0x61,0xe0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1e06118 <unknown>
-umlsll za.d[w9, 4:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001, 11101010, 00100001, 10011001
-// CHECK, INST: umlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+umlsll za.d[w9, 4:7, vgx2], {z12.h, z13.h}, {z10.h, z11.h} // 11000001-11101010-00100001-10011001
+// CHECK-INST: umlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x99,0x21,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ea2199 <unknown>
umlsll za.d[w9, 4:7], {z12.h - z13.h}, {z10.h - z11.h} // 11000001-11101010-00100001-10011001
-// CHECK, INST: umlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
+// CHECK-INST: umlsll za.d[w9, 4:7, vgx2], { z12.h, z13.h }, { z10.h, z11.h }
// CHECK-ENCODING: [0x99,0x21,0xea,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ea2199 <unknown>
diff --git a/llvm/test/MC/AArch64/SME2/usmlall.s b/llvm/test/MC/AArch64/SME2/usmlall.s
index ecff0e95a88ae..17af8510e6d6c 100644
--- a/llvm/test/MC/AArch64/SME2/usmlall.s
+++ b/llvm/test/MC/AArch64/SME2/usmlall.s
@@ -158,436 +158,436 @@ usmlall za.s[w9, 12:15], z12.b, z11.b[10] // 11000001-00001011-10101001-1000011
// CHECK-UNKNOWN: c10ba987 <unknown>
-usmlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b // 11000001, 00100000, 00000000, 00000100
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
+usmlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b // 11000001-00100000-00000000-00000100
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
// CHECK-ENCODING: [0x04,0x00,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200004 <unknown>
usmlall za.s[w8, 0:3], {z0.b - z1.b}, z0.b // 11000001-00100000-00000000-00000100
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b
// CHECK-ENCODING: [0x04,0x00,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200004 <unknown>
-usmlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b // 11000001, 00100101, 01000001, 01000101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
+usmlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b // 11000001-00100101-01000001-01000101
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
// CHECK-ENCODING: [0x45,0x41,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254145 <unknown>
usmlall za.s[w10, 4:7], {z10.b - z11.b}, z5.b // 11000001-00100101-01000001-01000101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b
// CHECK-ENCODING: [0x45,0x41,0x25,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1254145 <unknown>
-usmlall za.s[w11, 4:7, vgx2], {z13.b, z14.b}, z8.b // 11000001, 00101000, 01100001, 10100101
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
+usmlall za.s[w11, 4:7, vgx2], {z13.b, z14.b}, z8.b // 11000001-00101000-01100001-10100101
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
// CHECK-ENCODING: [0xa5,0x61,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12861a5 <unknown>
usmlall za.s[w11, 4:7], {z13.b - z14.b}, z8.b // 11000001-00101000-01100001-10100101
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z13.b, z14.b }, z8.b
// CHECK-ENCODING: [0xa5,0x61,0x28,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12861a5 <unknown>
-usmlall za.s[w11, 4:7, vgx2], {z31.b, z0.b}, z15.b // 11000001, 00101111, 01100011, 11100101
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
+usmlall za.s[w11, 4:7, vgx2], {z31.b, z0.b}, z15.b // 11000001-00101111-01100011-11100101
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
// CHECK-ENCODING: [0xe5,0x63,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f63e5 <unknown>
usmlall za.s[w11, 4:7], {z31.b - z0.b}, z15.b // 11000001-00101111-01100011-11100101
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z31.b, z0.b }, z15.b
// CHECK-ENCODING: [0xe5,0x63,0x2f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12f63e5 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z17.b, z18.b}, z0.b // 11000001, 00100000, 00000010, 00100101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
+usmlall za.s[w8, 4:7, vgx2], {z17.b, z18.b}, z0.b // 11000001-00100000-00000010-00100101
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
// CHECK-ENCODING: [0x25,0x02,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200225 <unknown>
usmlall za.s[w8, 4:7], {z17.b - z18.b}, z0.b // 11000001-00100000-00000010-00100101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z17.b, z18.b }, z0.b
// CHECK-ENCODING: [0x25,0x02,0x20,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1200225 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z1.b, z2.b}, z14.b // 11000001, 00101110, 00000000, 00100101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
+usmlall za.s[w8, 4:7, vgx2], {z1.b, z2.b}, z14.b // 11000001-00101110-00000000-00100101
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
// CHECK-ENCODING: [0x25,0x00,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0025 <unknown>
usmlall za.s[w8, 4:7], {z1.b - z2.b}, z14.b // 11000001-00101110-00000000-00100101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z1.b, z2.b }, z14.b
// CHECK-ENCODING: [0x25,0x00,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e0025 <unknown>
-usmlall za.s[w10, 0:3, vgx2], {z19.b, z20.b}, z4.b // 11000001, 00100100, 01000010, 01100100
-// CHECK, INST: usmlall za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
+usmlall za.s[w10, 0:3, vgx2], {z19.b, z20.b}, z4.b // 11000001-00100100-01000010-01100100
+// CHECK-INST: usmlall za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
// CHECK-ENCODING: [0x64,0x42,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244264 <unknown>
usmlall za.s[w10, 0:3], {z19.b - z20.b}, z4.b // 11000001-00100100-01000010-01100100
-// CHECK, INST: usmlall za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
+// CHECK-INST: usmlall za.s[w10, 0:3, vgx2], { z19.b, z20.b }, z4.b
// CHECK-ENCODING: [0x64,0x42,0x24,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1244264 <unknown>
-usmlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b // 11000001, 00100010, 00000001, 10000100
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
+usmlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b // 11000001-00100010-00000001-10000100
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
// CHECK-ENCODING: [0x84,0x01,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220184 <unknown>
usmlall za.s[w8, 0:3], {z12.b - z13.b}, z2.b // 11000001-00100010-00000001-10000100
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b
// CHECK-ENCODING: [0x84,0x01,0x22,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1220184 <unknown>
-usmlall za.s[w10, 4:7, vgx2], {z1.b, z2.b}, z10.b // 11000001, 00101010, 01000000, 00100101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
+usmlall za.s[w10, 4:7, vgx2], {z1.b, z2.b}, z10.b // 11000001-00101010-01000000-00100101
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
// CHECK-ENCODING: [0x25,0x40,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4025 <unknown>
usmlall za.s[w10, 4:7], {z1.b - z2.b}, z10.b // 11000001-00101010-01000000-00100101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z1.b, z2.b }, z10.b
// CHECK-ENCODING: [0x25,0x40,0x2a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12a4025 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b // 11000001, 00101110, 00000010, 11000101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
+usmlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b // 11000001-00101110-00000010-11000101
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
// CHECK-ENCODING: [0xc5,0x02,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e02c5 <unknown>
usmlall za.s[w8, 4:7], {z22.b - z23.b}, z14.b // 11000001-00101110-00000010-11000101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b
// CHECK-ENCODING: [0xc5,0x02,0x2e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12e02c5 <unknown>
-usmlall za.s[w11, 0:3, vgx2], {z9.b, z10.b}, z1.b // 11000001, 00100001, 01100001, 00100100
-// CHECK, INST: usmlall za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
+usmlall za.s[w11, 0:3, vgx2], {z9.b, z10.b}, z1.b // 11000001-00100001-01100001-00100100
+// CHECK-INST: usmlall za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
// CHECK-ENCODING: [0x24,0x61,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1216124 <unknown>
usmlall za.s[w11, 0:3], {z9.b - z10.b}, z1.b // 11000001-00100001-01100001-00100100
-// CHECK, INST: usmlall za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
+// CHECK-INST: usmlall za.s[w11, 0:3, vgx2], { z9.b, z10.b }, z1.b
// CHECK-ENCODING: [0x24,0x61,0x21,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1216124 <unknown>
-usmlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b // 11000001, 00101011, 00100001, 10000101
-// CHECK, INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
+usmlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b // 11000001-00101011-00100001-10000101
+// CHECK-INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
// CHECK-ENCODING: [0x85,0x21,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b2185 <unknown>
usmlall za.s[w9, 4:7], {z12.b - z13.b}, z11.b // 11000001-00101011-00100001-10000101
-// CHECK, INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
+// CHECK-INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b
// CHECK-ENCODING: [0x85,0x21,0x2b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c12b2185 <unknown>
-usmlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b[0] // 11000001, 00010000, 00000000, 00100000
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
+usmlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, z0.b[0] // 11000001-00010000-00000000-00100000
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
// CHECK-ENCODING: [0x20,0x00,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100020 <unknown>
usmlall za.s[w8, 0:3], {z0.b - z1.b}, z0.b[0] // 11000001-00010000-00000000-00100000
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, z0.b[0]
// CHECK-ENCODING: [0x20,0x00,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100020 <unknown>
-usmlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b[6] // 11000001, 00010101, 01000101, 01100101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
+usmlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, z5.b[6] // 11000001-00010101-01000101-01100101
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
// CHECK-ENCODING: [0x65,0x45,0x15,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1154565 <unknown>
usmlall za.s[w10, 4:7], {z10.b - z11.b}, z5.b[6] // 11000001-00010101-01000101-01100101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, z5.b[6]
// CHECK-ENCODING: [0x65,0x45,0x15,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1154565 <unknown>
-usmlall za.s[w11, 4:7, vgx2], {z12.b, z13.b}, z8.b[15] // 11000001, 00011000, 01101101, 10100111
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
+usmlall za.s[w11, 4:7, vgx2], {z12.b, z13.b}, z8.b[15] // 11000001-00011000-01101101-10100111
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
// CHECK-ENCODING: [0xa7,0x6d,0x18,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1186da7 <unknown>
usmlall za.s[w11, 4:7], {z12.b - z13.b}, z8.b[15] // 11000001-00011000-01101101-10100111
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, z8.b[15]
// CHECK-ENCODING: [0xa7,0x6d,0x18,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1186da7 <unknown>
-usmlall za.s[w11, 4:7, vgx2], {z30.b, z31.b}, z15.b[15] // 11000001, 00011111, 01101111, 11100111
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
+usmlall za.s[w11, 4:7, vgx2], {z30.b, z31.b}, z15.b[15] // 11000001-00011111-01101111-11100111
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
// CHECK-ENCODING: [0xe7,0x6f,0x1f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11f6fe7 <unknown>
usmlall za.s[w11, 4:7], {z30.b - z31.b}, z15.b[15] // 11000001-00011111-01101111-11100111
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, z15.b[15]
// CHECK-ENCODING: [0xe7,0x6f,0x1f,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11f6fe7 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z16.b, z17.b}, z0.b[14] // 11000001, 00010000, 00001110, 00100101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
+usmlall za.s[w8, 4:7, vgx2], {z16.b, z17.b}, z0.b[14] // 11000001-00010000-00001110-00100101
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
// CHECK-ENCODING: [0x25,0x0e,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100e25 <unknown>
usmlall za.s[w8, 4:7], {z16.b - z17.b}, z0.b[14] // 11000001-00010000-00001110-00100101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, z0.b[14]
// CHECK-ENCODING: [0x25,0x0e,0x10,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1100e25 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z0.b, z1.b}, z14.b[4] // 11000001, 00011110, 00000100, 00100001
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
+usmlall za.s[w8, 4:7, vgx2], {z0.b, z1.b}, z14.b[4] // 11000001-00011110-00000100-00100001
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
// CHECK-ENCODING: [0x21,0x04,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0421 <unknown>
usmlall za.s[w8, 4:7], {z0.b - z1.b}, z14.b[4] // 11000001-00011110-00000100-00100001
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, z14.b[4]
// CHECK-ENCODING: [0x21,0x04,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0421 <unknown>
-usmlall za.s[w10, 0:3, vgx2], {z18.b, z19.b}, z4.b[4] // 11000001, 00010100, 01000110, 01100000
-// CHECK, INST: usmlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
+usmlall za.s[w10, 0:3, vgx2], {z18.b, z19.b}, z4.b[4] // 11000001-00010100-01000110-01100000
+// CHECK-INST: usmlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
// CHECK-ENCODING: [0x60,0x46,0x14,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1144660 <unknown>
usmlall za.s[w10, 0:3], {z18.b - z19.b}, z4.b[4] // 11000001-00010100-01000110-01100000
-// CHECK, INST: usmlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
+// CHECK-INST: usmlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, z4.b[4]
// CHECK-ENCODING: [0x60,0x46,0x14,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1144660 <unknown>
-usmlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b[8] // 11000001, 00010010, 00001001, 10100000
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
+usmlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, z2.b[8] // 11000001-00010010-00001001-10100000
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
// CHECK-ENCODING: [0xa0,0x09,0x12,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11209a0 <unknown>
usmlall za.s[w8, 0:3], {z12.b - z13.b}, z2.b[8] // 11000001-00010010-00001001-10100000
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, z2.b[8]
// CHECK-ENCODING: [0xa0,0x09,0x12,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11209a0 <unknown>
-usmlall za.s[w10, 4:7, vgx2], {z0.b, z1.b}, z10.b[8] // 11000001, 00011010, 01001000, 00100001
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
+usmlall za.s[w10, 4:7, vgx2], {z0.b, z1.b}, z10.b[8] // 11000001-00011010-01001000-00100001
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
// CHECK-ENCODING: [0x21,0x48,0x1a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11a4821 <unknown>
usmlall za.s[w10, 4:7], {z0.b - z1.b}, z10.b[8] // 11000001-00011010-01001000-00100001
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, z10.b[8]
// CHECK-ENCODING: [0x21,0x48,0x1a,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11a4821 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b[10] // 11000001, 00011110, 00001010, 11100101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
+usmlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, z14.b[10] // 11000001-00011110-00001010-11100101
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
// CHECK-ENCODING: [0xe5,0x0a,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0ae5 <unknown>
usmlall za.s[w8, 4:7], {z22.b - z23.b}, z14.b[10] // 11000001-00011110-00001010-11100101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, z14.b[10]
// CHECK-ENCODING: [0xe5,0x0a,0x1e,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11e0ae5 <unknown>
-usmlall za.s[w11, 0:3, vgx2], {z8.b, z9.b}, z1.b[5] // 11000001, 00010001, 01100101, 00100010
-// CHECK, INST: usmlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
+usmlall za.s[w11, 0:3, vgx2], {z8.b, z9.b}, z1.b[5] // 11000001-00010001-01100101-00100010
+// CHECK-INST: usmlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
// CHECK-ENCODING: [0x22,0x65,0x11,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1116522 <unknown>
usmlall za.s[w11, 0:3], {z8.b - z9.b}, z1.b[5] // 11000001-00010001-01100101-00100010
-// CHECK, INST: usmlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
+// CHECK-INST: usmlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, z1.b[5]
// CHECK-ENCODING: [0x22,0x65,0x11,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1116522 <unknown>
-usmlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b[11] // 11000001, 00011011, 00101001, 10100111
-// CHECK, INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
+usmlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, z11.b[11] // 11000001-00011011-00101001-10100111
+// CHECK-INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
// CHECK-ENCODING: [0xa7,0x29,0x1b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11b29a7 <unknown>
usmlall za.s[w9, 4:7], {z12.b - z13.b}, z11.b[11] // 11000001-00011011-00101001-10100111
-// CHECK, INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
+// CHECK-INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, z11.b[11]
// CHECK-ENCODING: [0xa7,0x29,0x1b,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c11b29a7 <unknown>
-usmlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, {z0.b, z1.b} // 11000001, 10100000, 00000000, 00000100
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
+usmlall za.s[w8, 0:3, vgx2], {z0.b, z1.b}, {z0.b, z1.b} // 11000001-10100000-00000000-00000100
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x04,0x00,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00004 <unknown>
usmlall za.s[w8, 0:3], {z0.b - z1.b}, {z0.b - z1.b} // 11000001-10100000-00000000-00000100
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z0.b, z1.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x04,0x00,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a00004 <unknown>
-usmlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, {z20.b, z21.b} // 11000001, 10110100, 01000001, 01000101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
+usmlall za.s[w10, 4:7, vgx2], {z10.b, z11.b}, {z20.b, z21.b} // 11000001-10110100-01000001-01000101
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x45,0x41,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44145 <unknown>
usmlall za.s[w10, 4:7], {z10.b - z11.b}, {z20.b - z21.b} // 11000001-10110100-01000001-01000101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z10.b, z11.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x45,0x41,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44145 <unknown>
-usmlall za.s[w11, 4:7, vgx2], {z12.b, z13.b}, {z8.b, z9.b} // 11000001, 10101000, 01100001, 10000101
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
+usmlall za.s[w11, 4:7, vgx2], {z12.b, z13.b}, {z8.b, z9.b} // 11000001-10101000-01100001-10000101
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
// CHECK-ENCODING: [0x85,0x61,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a86185 <unknown>
usmlall za.s[w11, 4:7], {z12.b - z13.b}, {z8.b - z9.b} // 11000001-10101000-01100001-10000101
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z12.b, z13.b }, { z8.b, z9.b }
// CHECK-ENCODING: [0x85,0x61,0xa8,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a86185 <unknown>
-usmlall za.s[w11, 4:7, vgx2], {z30.b, z31.b}, {z30.b, z31.b} // 11000001, 10111110, 01100011, 11000101
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
+usmlall za.s[w11, 4:7, vgx2], {z30.b, z31.b}, {z30.b, z31.b} // 11000001-10111110-01100011-11000101
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xc5,0x63,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be63c5 <unknown>
usmlall za.s[w11, 4:7], {z30.b - z31.b}, {z30.b - z31.b} // 11000001-10111110-01100011-11000101
-// CHECK, INST: usmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
+// CHECK-INST: usmlall za.s[w11, 4:7, vgx2], { z30.b, z31.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xc5,0x63,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be63c5 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z16.b, z17.b}, {z16.b, z17.b} // 11000001, 10110000, 00000010, 00000101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
+usmlall za.s[w8, 4:7, vgx2], {z16.b, z17.b}, {z16.b, z17.b} // 11000001-10110000-00000010-00000101
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
// CHECK-ENCODING: [0x05,0x02,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00205 <unknown>
usmlall za.s[w8, 4:7], {z16.b - z17.b}, {z16.b - z17.b} // 11000001-10110000-00000010-00000101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z16.b, z17.b }, { z16.b, z17.b }
// CHECK-ENCODING: [0x05,0x02,0xb0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b00205 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z0.b, z1.b}, {z30.b, z31.b} // 11000001, 10111110, 00000000, 00000101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
+usmlall za.s[w8, 4:7, vgx2], {z0.b, z1.b}, {z30.b, z31.b} // 11000001-10111110-00000000-00000101
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0x05,0x00,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0005 <unknown>
usmlall za.s[w8, 4:7], {z0.b - z1.b}, {z30.b - z31.b} // 11000001-10111110-00000000-00000101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z0.b, z1.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0x05,0x00,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be0005 <unknown>
-usmlall za.s[w10, 0:3, vgx2], {z18.b, z19.b}, {z20.b, z21.b} // 11000001, 10110100, 01000010, 01000100
-// CHECK, INST: usmlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
+usmlall za.s[w10, 0:3, vgx2], {z18.b, z19.b}, {z20.b, z21.b} // 11000001-10110100-01000010-01000100
+// CHECK-INST: usmlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x44,0x42,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44244 <unknown>
usmlall za.s[w10, 0:3], {z18.b - z19.b}, {z20.b - z21.b} // 11000001-10110100-01000010-01000100
-// CHECK, INST: usmlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
+// CHECK-INST: usmlall za.s[w10, 0:3, vgx2], { z18.b, z19.b }, { z20.b, z21.b }
// CHECK-ENCODING: [0x44,0x42,0xb4,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1b44244 <unknown>
-usmlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, {z2.b, z3.b} // 11000001, 10100010, 00000001, 10000100
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
+usmlall za.s[w8, 0:3, vgx2], {z12.b, z13.b}, {z2.b, z3.b} // 11000001-10100010-00000001-10000100
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
// CHECK-ENCODING: [0x84,0x01,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20184 <unknown>
usmlall za.s[w8, 0:3], {z12.b - z13.b}, {z2.b - z3.b} // 11000001-10100010-00000001-10000100
-// CHECK, INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
+// CHECK-INST: usmlall za.s[w8, 0:3, vgx2], { z12.b, z13.b }, { z2.b, z3.b }
// CHECK-ENCODING: [0x84,0x01,0xa2,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a20184 <unknown>
-usmlall za.s[w10, 4:7, vgx2], {z0.b, z1.b}, {z26.b, z27.b} // 11000001, 10111010, 01000000, 00000101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
+usmlall za.s[w10, 4:7, vgx2], {z0.b, z1.b}, {z26.b, z27.b} // 11000001-10111010-01000000-00000101
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
// CHECK-ENCODING: [0x05,0x40,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4005 <unknown>
usmlall za.s[w10, 4:7], {z0.b - z1.b}, {z26.b - z27.b} // 11000001-10111010-01000000-00000101
-// CHECK, INST: usmlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
+// CHECK-INST: usmlall za.s[w10, 4:7, vgx2], { z0.b, z1.b }, { z26.b, z27.b }
// CHECK-ENCODING: [0x05,0x40,0xba,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1ba4005 <unknown>
-usmlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, {z30.b, z31.b} // 11000001, 10111110, 00000010, 11000101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
+usmlall za.s[w8, 4:7, vgx2], {z22.b, z23.b}, {z30.b, z31.b} // 11000001-10111110-00000010-11000101
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xc5,0x02,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be02c5 <unknown>
usmlall za.s[w8, 4:7], {z22.b - z23.b}, {z30.b - z31.b} // 11000001-10111110-00000010-11000101
-// CHECK, INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
+// CHECK-INST: usmlall za.s[w8, 4:7, vgx2], { z22.b, z23.b }, { z30.b, z31.b }
// CHECK-ENCODING: [0xc5,0x02,0xbe,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1be02c5 <unknown>
-usmlall za.s[w11, 0:3, vgx2], {z8.b, z9.b}, {z0.b, z1.b} // 11000001, 10100000, 01100001, 00000100
-// CHECK, INST: usmlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
+usmlall za.s[w11, 0:3, vgx2], {z8.b, z9.b}, {z0.b, z1.b} // 11000001-10100000-01100001-00000100
+// CHECK-INST: usmlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x04,0x61,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a06104 <unknown>
usmlall za.s[w11, 0:3], {z8.b - z9.b}, {z0.b - z1.b} // 11000001-10100000-01100001-00000100
-// CHECK, INST: usmlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
+// CHECK-INST: usmlall za.s[w11, 0:3, vgx2], { z8.b, z9.b }, { z0.b, z1.b }
// CHECK-ENCODING: [0x04,0x61,0xa0,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1a06104 <unknown>
-usmlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, {z10.b, z11.b} // 11000001, 10101010, 00100001, 10000101
-// CHECK, INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
+usmlall za.s[w9, 4:7, vgx2], {z12.b, z13.b}, {z10.b, z11.b} // 11000001-10101010-00100001-10000101
+// CHECK-INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
// CHECK-ENCODING: [0x85,0x21,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa2185 <unknown>
usmlall za.s[w9, 4:7], {z12.b - z13.b}, {z10.b - z11.b} // 11000001-10101010-00100001-10000101
-// CHECK, INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
+// CHECK-INST: usmlall za.s[w9, 4:7, vgx2], { z12.b, z13.b }, { z10.b, z11.b }
// CHECK-ENCODING: [0x85,0x21,0xaa,0xc1]
// CHECK-ERROR: instruction requires: sme2
// CHECK-UNKNOWN: c1aa2185 <unknown>
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