[PATCH] D136754: [MachineCombiner] Extend reassociation logic to handle inverse instructions
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 31 22:11:15 PDT 2022
craig.topper added inline comments.
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Comment at: llvm/include/llvm/CodeGen/TargetInstrInfo.h:1179
+ /// Return true when \P Opcode has inverse operation (e.g. add for sub, mul
+ /// for div). Overriding this method, don't forget to override
+ /// `getInverseOpcode` as well.
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I'm not sure we should mention mul/div here. I don't think you can reassociate them the same way.
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Comment at: llvm/include/llvm/CodeGen/TargetInstrInfo.h:1181
+ /// `getInverseOpcode` as well.
+ virtual bool hasInverseOpcode(unsigned Opcode) const { return false; }
+
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Can we make getInverseOpcode return an Optional<unsigned> so we can merge `hasInverseOpcode` and `getInverseOpcode`?
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Comment at: llvm/include/llvm/CodeGen/TargetInstrInfo.h:1193
+ virtual bool
+ isInverseInstAssociativeAndCommutative(const MachineInstr &Inst) const {
+ return false;
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Can we not figure this out using getInverseOpcode?
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Comment at: llvm/lib/CodeGen/TargetInstrInfo.cpp:837
+ assert(areOpcodesEqualOrInverse(Root.getOpcode(), Prev.getOpcode()) &&
+ "Incorreclty matched pattern");
+ unsigned AssocCommutOpcode = Root.getOpcode();
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Incorrectly*
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D136754/new/
https://reviews.llvm.org/D136754
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