[llvm] 93798fb - Address post commit style comment from 087bb0f

[Philip Reames via llvm-commits]

Author: Philip Reames
Date: 2022-10-31T11:16:14-07:00
New Revision: 93798fb740d342a90c47aa547656bae8dd47d017

URL: https://github.com/llvm/llvm-project/commit/93798fb740d342a90c47aa547656bae8dd47d017
DIFF: https://github.com/llvm/llvm-project/commit/93798fb740d342a90c47aa547656bae8dd47d017.diff

LOG: Address post commit style comment from 087bb0f

Added: 
    

Modified: 
    llvm/lib/Analysis/ValueTracking.cpp

Removed: 
    


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diff  --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index b137cd294f979..0606ce7fd6f14 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -1206,13 +1206,14 @@ static void computeKnownBitsFromOperator(const Operator *I,
     // Handle cast from vector integer type to scalar or vector integer.
     auto *SrcVecTy = dyn_cast<FixedVectorType>(SrcTy);
     if (!SrcVecTy || !SrcVecTy->getElementType()->isIntegerTy() ||
-        !I->getType()->isIntOrIntVectorTy())
+        !I->getType()->isIntOrIntVectorTy() ||
+        isa<ScalableVectorType>(I->getType()))
       break;
 
     // Look through a cast from narrow vector elements to wider type.
     // Examples: v4i32 -> v2i64, v3i8 -> v24
     unsigned SubBitWidth = SrcVecTy->getScalarSizeInBits();
-    if (BitWidth % SubBitWidth == 0 && !isa<ScalableVectorType>(I->getType())) {
+    if (BitWidth % SubBitWidth == 0) {
       // Known bits are automatically intersected across demanded elements of a
       // vector. So for example, if a bit is computed as known zero, it must be
       // zero across all demanded elements of the vector.