[PATCH] D136463: [SWP] Recognize mem carried dep with different base

Mon Oct 31 05:33:55 PDT 2022

thopre marked an inline comment as done.
thopre added inline comments.


================
Comment at: llvm/test/CodeGen/Hexagon/swp-carried-dep3.mir:14
+# CHECK-NEXT: SU(5)
+# CHECK-NEXT: SU(7)
+
----------------
bcahoon wrote:
> thopre wrote:
> > bcahoon wrote:
> > > It looks like this is the same output without your patch. Can you add a test, or change this one, that shows the effect of the patch?
> > I had checked that the code was being hit with the earlier version of the testcase but hadn't really understood the CHECK lines. I've verify that the updated test does indeed show a difference with and without the patch.
> I don't think the nodeset that includes SU(4) and SU(6) is affected by by this patch?
> 
> I believe the patch eliminates Nodeset that includes SU(5) and SU(7) because the patch eliminates the need for a loop carried dependence. If so, then I think the test should check that the Nodeset with SU(5) and SU(7) is no longer created.
You're absolutely right:


```

--- swp-carried-dep3.withoutpatch.log   2022-10-31 11:17:38.775837761 +0000
+++ swp-carried-dep3.withpatch.log      2022-10-31 11:06:53.083501068 +0000
@@ -228,10 +228,6 @@ SU(8):   %17:intregs = M2_acci %19:intre
    SU(6) %20:intregs = A2_addi %18:intregs, 10
    SU(7) %13:intregs = S2_storerh_pi %12:intregs(tied-def 0), 2, %20:intregs :: (store (s16))
 
-  Rec NodeSet Num nodes 2 rec 0 mov 0 depth 2 col 0
-   SU(5) %19:intregs, %15:intregs = L2_loadrh_pi %14:intregs(tied-def 1), 2 :: (load (s16))
-   SU(7) %13:intregs = S2_storerh_pi %12:intregs(tied-def 0), 2, %20:intregs :: (store (s16))
-
   NodeSet Num nodes 3 rec 1 mov 0 depth 2 col 0
    SU(4) %18:intregs, %11:intregs = L2_loadrh_pi %10:intregs(tied-def 1), 2 :: (load (s16))
    SU(6) %20:intregs = A2_addi %18:intregs, 10
```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136463/new/

https://reviews.llvm.org/D136463

