[PATCH] D134423: [AMDGPU] Fix vgpr2sgpr copy to scalar operands of buffer instructions.

[krishna chaitanya sankisa via Phabricator via llvm-commits]

skc7 added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp:938
+
+  for (const auto &MO : MRI->reg_nodbg_operands(DefReg)) {
+    const auto *UseMI = MO.getParent();
----------------
arsenm wrote:
> The pass is already doing a walk over use operands, you shouldn't need another use list walk
Removed the previous extra use list walk.


================
Comment at: llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp:949
+    // If MUBUF or MTBUF, use scalar register.
+    if (TII->isMUBUF(Opc) || TII->isMTBUF(Opc)) {
+      return true;
----------------
arsenm wrote:
> This is a property of specific operands
soffset and srsrc operands are checked now for register use


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D134423/new/

https://reviews.llvm.org/D134423