[PATCH] D136525: [M68k] Add codegen pattern for atomic load / store

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0x59616e added inline comments.


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Comment at: llvm/lib/Target/M68k/M68kInstrAtomics.td:10
+// FIXME: This is only supported on MC68020 and later.
+class MxCASOp<bits<2> size_encoding, MxType type>
+    : MxInst<(outs type.ROp:$out),
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RKSimon wrote:
> Wrap this inside FeatureISA20 ?
Is there any example I can refer to ?


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  https://reviews.llvm.org/D136525/new/

https://reviews.llvm.org/D136525