[PATCH] D137026: [X86] Use GFNI for vXi8 shifts/rotates

[Simon Pilgrim via Phabricator via llvm-commits]

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As detailed here: https://github.com/InstLatx64/InstLatX64_Demo/blob/master/GFNI_Demo.h

We can use the gf2p8affine instruction to lower byte shifts/rotates as well as the existing bitreverse case.

I've added a concat(gf2p8affine, gf2p8affine) to remerge AVX1 splitting - but TBH, I'm not certain if there's ever going to be a AVX1+GFNI target, but that might be just one of the things we handle like the weird combinations of AVX512 modes....

There's a few other GFNI patterns we can probably handle - TZCNT/LZCNT were detailed on PR47394 and I think


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D137026

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/X86/gfni-funnel-shifts.ll
  llvm/test/CodeGen/X86/gfni-rotates.ll
  llvm/test/CodeGen/X86/gfni-shifts.ll
  llvm/test/CodeGen/X86/min-legal-vector-width.ll
  llvm/test/CodeGen/X86/vector-bitreverse.ll

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