[llvm] adf3daa - [ARC] Regenerate ldst.ll

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2022-10-29T14:09:58+01:00
New Revision: adf3daae1c10b46de4017d7ab0110c215c1b9981

URL: https://github.com/llvm/llvm-project/commit/adf3daae1c10b46de4017d7ab0110c215c1b9981
DIFF: https://github.com/llvm/llvm-project/commit/adf3daae1c10b46de4017d7ab0110c215c1b9981.diff

LOG: [ARC] Regenerate ldst.ll

Reported by the (experimental) arc buildbot after D136042

Added: 
    

Modified: 
    llvm/test/CodeGen/ARC/ldst.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/ARC/ldst.ll b/llvm/test/CodeGen/ARC/ldst.ll
index 67f938a652ca7..dd1529875a667 100644
--- a/llvm/test/CodeGen/ARC/ldst.ll
+++ b/llvm/test/CodeGen/ARC/ldst.ll
@@ -215,7 +215,11 @@ entry:
 ; CHECK-DAG: ldb %r[[REG2:[0-9]+]], [%r0,2]
 ; CHECK-DAG: ldb %r[[REG3:[0-9]+]], [%r0,3]
 ; CHECK-DAG: asl %r[[AREG1:[0-9]+]], %r[[REG1]], 8
-; CHECK-DAG: asl %r[[AREG3:[0-9]+]], %r[[REG3]], 8
+; CHECK-DAG: asl %r[[AREG2:[0-9]+]], %r[[REG2]], 16
+; CHECK-DAG: asl %r[[AREG3:[0-9]+]], %r[[REG3]], 24
+; CHECK-DAG: or %r[[AREG01:[0-9]+]], %r[[AREG1]], %r[[REG0]]
+; CHECK-DAG: or %r[[AREG23:[0-9]+]], %r[[AREG3]], %r[[AREG2]]
+; CHECK-DAG: or %r0, %r[[AREG23]], %r[[AREG01]]
 define i32 @align1_load32(i8* %p) nounwind {
 entry:
   %bp = bitcast i8* %p to i32*