[PATCH] D136244: [AArch64] Optimize memcmp when the result is tested for [in]equality with 0

[Allen zhong via Phabricator via llvm-commits]

Allen marked an inline comment as done.
Allen added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:19506
+    SDValue Cmp =
+        DAG.getNode(AArch64ISD::SUBS, DL, DAG.getVTList(TstVT, MVT::Glue),
+                    XOR0.getOperand(0), XOR0.getOperand(1));
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dmgreen wrote:
> Allen wrote:
> > dmgreen wrote:
> > > I'm not sure if this should be MVT::Glue or MVT::i32. It seems to be created differently in different places.
> > I don't  very sure this is the accurate answer, it seems the **MVT::Glue** implicit instructions are scheduled together?
> > https://lists.llvm.org/pipermail/llvm-dev/2014-June/074046.html
> Glue is probably OK. Can you add this test case:
> ```
> define i32 @eq(i128 noundef %x, i128 noundef %y) {
> entry:
>   %cmp3 = icmp eq i128 %x, %y
>   %conv = trunc i128 %x to i64
>   %conv1 = trunc i128 %y to i64
>   %cmp = icmp eq i64 %conv, %conv1
>   %or7 = or i1 %cmp3, %cmp
>   %or = zext i1 %or7 to i32
>   ret i32 %or
> }
> ```
> 
> There may be issues with the CMP/CCMP with the scheduling of instructions that ISel will create out of the DAG, but I've not seen any happen yet.
As the crash of https://github.com/llvm/llvm-project/issues/58675, we need update the **MVT::glue** into **MVT::i32**


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https://reviews.llvm.org/D136244