[PATCH] D136728: [PowerPC] Add handling for WACC register spilling.

[Amy Kwan via Phabricator via llvm-commits]

amyk added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCInstrMMA.td:243
+  def WPN : XX3Form_AT3_XAB6<
+             opcode, !or(xo, 0x80), (outs wacc:$AT), !con((ins wacc:$ATi), IOL),
+             !strconcat(asmbase#"pn ", asmstr), IIC_VecFP, []>,
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A super minor nit, but I think the indentation on the lines below the `def` are off by 1.


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Comment at: llvm/lib/Target/PowerPC/PPCInstrMMA.td:546
+let Predicates = [MMA, IsISAFuture], isCodeGenOnly = 1 in {
+  // For Future and up XXMFACCW and XXMTACCW will not have patterns.
+  def XXMFACCW :
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Are able to elaborate on why?


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Comment at: llvm/lib/Target/PowerPC/PPCInstrMMA.td:570
+    def SPILL_WACC: PPCEmitTimePseudo<(outs), (ins wacc:$AT, memrix16:$dst),
+                                     "#SPILL_WACC", []>;
+  }
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nit: Indentation.


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Comment at: llvm/lib/Target/PowerPC/PPCInstrMMA.td:574
+    def RESTORE_WACC: PPCEmitTimePseudo<(outs wacc:$AT), (ins memrix16:$src),
+                                       "#RESTORE_WACC", []>;
+  }
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nit: Indentation.


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Comment at: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:580
+  // Don't use the allocation hints for ISAFuture.
+  // The WACC regsiters used in ISAFuture are unlike the ACC registers on
+  // Power 10 and so this logic to register allocation hints does not apply.
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Comment at: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:1301
+  if (ReportAccMoves) {
+    dbgs() << "Emitting wacc register " << (IsRestore ? "restore" : "spill")
+           << ":\n";
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Realized I had a question about this and just wanted to confirm - but the reason we are using `dbgs()` instead of the usual `LLVM_DEBUG(dbgs())` is because of the `#ifdef NDEBUG`, right? Meaning in the cases where we're using the macro, we shouldn't be doing it the `LLVM_DEBUG()` way?


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D136728/new/

https://reviews.llvm.org/D136728