[PATCH] D136088: [AArch64]SME2 instructions that use ZTO operand

Paul Walker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 28 10:41:52 PDT 2022


paulwalker-arm added a comment.

I've only looked at the parsing side of things so far.



================
Comment at: llvm/lib/Target/AArch64/AArch64RegisterInfo.td:1272
 
+def ZT : AArch64Reg<0, "zt0">;
+
----------------
This should remain as `ZT0` because is represents this specific register. 


================
Comment at: llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp:4241-4242
+  StringRef Name = Tok.getString();
+  if (!Name.equals_insensitive("zt0"))
+    return MatchOperand_NoMatch;
+
----------------
I think this is only necessary because you're calling `tryParseScalarRegister`, which looks to be a bit of a hack if I'm honest.

What about updating `matchRegisterNameAlias` and then calling that instead?  Something like:
```
if ((RegNum = MatchRegisterName(Name)))
  return Kind == RegKind::LookupTable ? RegNum : 0;
```


================
Comment at: llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp:4252
+
+  if (getTok().is(AsmToken::LBrac)) {
+    Lex(); // eat [
----------------
I'm guessing you tried `tryParseVectorIndex` and it didn't work the way you need?


================
Comment at: llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp:4261
+            getLoc(), getContext()));
+        Lex(); // eat ]
+        return MatchOperand_Success;
----------------
This assumes the next token is a `]`, which it might not be so you'll assemble something that is not valid syntax.  If `tryParseVectorIndex` doesn't just work, please look how it handles the closing bracket.


================
Comment at: llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp:5458
     return Error(Loc, "immediate must be an integer in range [1, 64].");
+    // For SME2
+  case Match_InvalidMemoryIndexed8UImm3:
----------------
Please remove this.


================
Comment at: llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp:6126
   case Match_InvalidImm1_64:
+  case Match_InvalidMemoryIndexed8UImm3:
   case Match_InvalidMemoryIndexedRange4UImm1:
----------------
Please move this to be ordered relative to the other `Match_InvalidMemoryIndexed` entries.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136088/new/

https://reviews.llvm.org/D136088



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