[PATCH] D135564: [AArch64-SVE]: Force generating code compatible to streaming mode.

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:1617
+  setOperationAction(ISD::CONCAT_VECTORS, VT, Custom);
+  setOperationAction(ISD::AND, VT, Custom);
+}
----------------
sdesmalen wrote:
> nit: I only just spot this now in one of your other patches, but ISD::AND should also be guarded by `VT.isInteger()`.
Although not wrong it doesn't really matter as legalisation is smart enough to not care about the operation action for types that make no sense.  We rely on this in `addTypeForFixedLengthSVE` where the type is only considered when handling extend-loads/truncating-store plus the odd compare.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D135564/new/

https://reviews.llvm.org/D135564