[PATCH] D136933: [AArch64][SME] Make all SME intrinsics use 32bit immediates.
Sander de Smalen via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 28 02:51:15 PDT 2022
sdesmalen created this revision.
sdesmalen added reviewers: david-arm, paulwalker-arm, aemerson.
Herald added subscribers: ctetreau, hiraditya, kristof.beyls.
Herald added a project: All.
sdesmalen requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
This aligns with what was done for SVE, which consistently uses 32bit
immediates at the LLVM IR level.
Additionally, this change forces the intrinsic operands to be immediates
using ImmArg<>, which subsequently requires the codegenerator to match
TargetConstants instead of Constants.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D136933
Files:
llvm/include/llvm/IR/IntrinsicsAArch64.td
llvm/lib/Target/AArch64/AArch64InstrFormats.td
llvm/lib/Target/AArch64/SMEInstrFormats.td
llvm/test/CodeGen/AArch64/sme-intrinsics-add.ll
llvm/test/CodeGen/AArch64/sme-intrinsics-loads.ll
llvm/test/CodeGen/AArch64/sme-intrinsics-mopa.ll
llvm/test/CodeGen/AArch64/sme-intrinsics-mops.ll
llvm/test/CodeGen/AArch64/sme-intrinsics-mova-extract.ll
llvm/test/CodeGen/AArch64/sme-intrinsics-mova-insert.ll
llvm/test/CodeGen/AArch64/sme-intrinsics-stores.ll
llvm/test/CodeGen/AArch64/sme-intrinsics-zero.ll
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