[PATCH] D136172: [AArch64]SME2 Multi vector Sel instructions

[Caroline via Phabricator via llvm-commits]

CarolineConcatto added inline comments.


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Comment at: llvm/test/MC/AArch64/SVE/ld2b-diagnostics.s:84
 ld2b { z0.b, z2.b }, p0/z, [x0]
-// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: registers must be sequential
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
 // CHECK-NEXT: ld2b { z0.b, z2.b }, p0/z, [x0]
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paulwalker-arm wrote:
> Sorry I've not taken a proper look yet but this change looks like a step backward compared to the original informative error.  Is this fixable?
So the problem here is that now we are able to parse the instructions. I added
ZZ_[b|h|s|d]_strided and ZZZZ_[b|h|s|d]_strided. So all the operands are valid
So this set of registers is valid,  but the instruction is not compatible with any other available instructions. That is the reason we print invalid operand for instruction. 


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136172/new/

https://reviews.llvm.org/D136172