[PATCH] D136918: [AMDGPU] Scheduler: fix RP calculation for a MBB with one successor

[Valery Pykhtin via Phabricator via llvm-commits]

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We reuse live registers after tracking one MBB as live-ins to the successor MBB
if the successor is only one but we don't check if the successor has other predecessors.

A   B
 \ /

  C  

A and B have one successor but C has live-ins defined by A and B and therefore should be
initialized using LIS.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D136918

Files:
  llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp


Index: llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+++ llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
@@ -486,10 +486,13 @@
   // live-outs of the current block. We can reuse calculated live set if the
   // successor will be sent to scheduling past current block.
   const MachineBasicBlock *OnlySucc = nullptr;
-  if (MBB->succ_size() == 1 && !(*MBB->succ_begin())->empty()) {
-    SlotIndexes *Ind = LIS->getSlotIndexes();
-    if (Ind->getMBBStartIdx(MBB) < Ind->getMBBStartIdx(*MBB->succ_begin()))
-      OnlySucc = *MBB->succ_begin();
+  if (MBB->succ_size() == 1) {
+    auto *Candidate = *MBB->succ_begin();
+    if (!Candidate->empty() && Candidate->pred_size() == 1) {
+      SlotIndexes *Ind = LIS->getSlotIndexes();
+      if (Ind->getMBBStartIdx(MBB) < Ind->getMBBStartIdx(Candidate))
+        OnlySucc = Candidate;
+    }
   }
 
   // Scheduler sends regions from the end of the block upwards.


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