[llvm] 4ae88a8 - [AMDGPU] Refactor debug printing routines for GCNRPTracker
Valery Pykhtin via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 27 19:23:00 PDT 2022
Author: Valery Pykhtin
Date: 2022-10-28T04:22:46+02:00
New Revision: 4ae88a8d42f7243bea0cd091ae57349ba1ae51bb
URL: https://github.com/llvm/llvm-project/commit/4ae88a8d42f7243bea0cd091ae57349ba1ae51bb
DIFF: https://github.com/llvm/llvm-project/commit/4ae88a8d42f7243bea0cd091ae57349ba1ae51bb.diff
LOG: [AMDGPU] Refactor debug printing routines for GCNRPTracker
Use Printable to enhance syntax, remove duplication, unify.
Reviewed By: arsenm, rampitec
Differential Revision: https://reviews.llvm.org/D136704
Added:
Modified:
llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
llvm/lib/Target/AMDGPU/GCNRegPressure.h
llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp b/llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
index f06de11f98389..77960ef62f3a7 100644
--- a/llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
@@ -80,13 +80,11 @@ static void printLivenessInfo(raw_ostream &OS,
const auto &MRI = BB->getParent()->getRegInfo();
const auto LiveIns = getLiveRegsBefore(*Begin, *LIS);
- OS << "LIn RP: ";
- getRegPressure(MRI, LiveIns).print(OS);
+ OS << "LIn RP: " << print(getRegPressure(MRI, LiveIns));
const auto BottomMI = End == BB->end() ? std::prev(End) : End;
const auto LiveOuts = getLiveRegsAfter(*BottomMI, *LIS);
- OS << "LOt RP: ";
- getRegPressure(MRI, LiveOuts).print(OS);
+ OS << "LOt RP: " << print(getRegPressure(MRI, LiveOuts));
}
LLVM_DUMP_METHOD
@@ -96,8 +94,7 @@ void GCNIterativeScheduler::printRegions(raw_ostream &OS) const {
OS << "Region to schedule ";
printRegion(OS, R->Begin, R->End, LIS, 1);
printLivenessInfo(OS, R->Begin, R->End, LIS);
- OS << "Max RP: ";
- R->MaxPressure.print(OS, &ST);
+ OS << "Max RP: " << print(R->MaxPressure, &ST);
}
}
@@ -116,10 +113,8 @@ void GCNIterativeScheduler::printSchedRP(raw_ostream &OS,
const GCNRegPressure &Before,
const GCNRegPressure &After) const {
const auto &ST = MF.getSubtarget<GCNSubtarget>();
- OS << "RP before: ";
- Before.print(OS, &ST);
- OS << "RP after: ";
- After.print(OS, &ST);
+ OS << "RP before: " << print(Before, &ST)
+ << "RP after: " << print(After, &ST);
}
#endif
@@ -297,9 +292,9 @@ void GCNIterativeScheduler::schedule() { // overridden
// do nothing
LLVM_DEBUG(printLivenessInfo(dbgs(), RegionBegin, RegionEnd, LIS);
if (!Regions.empty() && Regions.back()->Begin == RegionBegin) {
- dbgs() << "Max RP: ";
- Regions.back()->MaxPressure.print(
- dbgs(), &MF.getSubtarget<GCNSubtarget>());
+ dbgs() << "Max RP: "
+ << print(Regions.back()->MaxPressure,
+ &MF.getSubtarget<GCNSubtarget>());
} dbgs()
<< '\n';);
}
@@ -403,15 +398,14 @@ void GCNIterativeScheduler::scheduleRegion(Region &R, Range &&Schedule,
const auto RegionMaxRP = getRegionPressure(R);
const auto &ST = MF.getSubtarget<GCNSubtarget>();
#endif
- assert((SchedMaxRP == RegionMaxRP && (MaxRP.empty() || SchedMaxRP == MaxRP))
- || (dbgs() << "Max RP mismatch!!!\n"
- "RP for schedule (calculated): ",
- SchedMaxRP.print(dbgs(), &ST),
- dbgs() << "RP for schedule (reported): ",
- MaxRP.print(dbgs(), &ST),
- dbgs() << "RP after scheduling: ",
- RegionMaxRP.print(dbgs(), &ST),
- false));
+ assert(
+ (SchedMaxRP == RegionMaxRP && (MaxRP.empty() || SchedMaxRP == MaxRP)) ||
+ (dbgs() << "Max RP mismatch!!!\n"
+ "RP for schedule (calculated): "
+ << print(SchedMaxRP, &ST)
+ << "RP for schedule (reported): " << print(MaxRP, &ST)
+ << "RP after scheduling: " << print(RegionMaxRP, &ST),
+ false));
}
// Sort recorded regions by pressure - highest at the front
diff --git a/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp b/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
index fb106d98c162e..2f38f7f65f80b 100644
--- a/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
@@ -18,40 +18,6 @@ using namespace llvm;
#define DEBUG_TYPE "machine-scheduler"
-#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
-LLVM_DUMP_METHOD
-void llvm::printLivesAt(SlotIndex SI,
- const LiveIntervals &LIS,
- const MachineRegisterInfo &MRI) {
- dbgs() << "Live regs at " << SI << ": "
- << *LIS.getInstructionFromIndex(SI);
- unsigned Num = 0;
- for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
- const Register Reg = Register::index2VirtReg(I);
- if (!LIS.hasInterval(Reg))
- continue;
- const auto &LI = LIS.getInterval(Reg);
- if (LI.hasSubRanges()) {
- bool firstTime = true;
- for (const auto &S : LI.subranges()) {
- if (!S.liveAt(SI)) continue;
- if (firstTime) {
- dbgs() << " " << printReg(Reg, MRI.getTargetRegisterInfo())
- << '\n';
- firstTime = false;
- }
- dbgs() << " " << S << '\n';
- ++Num;
- }
- } else if (LI.liveAt(SI)) {
- dbgs() << " " << LI << '\n';
- ++Num;
- }
- }
- if (!Num) dbgs() << " <none>\n";
-}
-#endif
-
bool llvm::isEqual(const GCNRPTracker::LiveRegSet &S1,
const GCNRPTracker::LiveRegSet &S2) {
if (S1.size() != S2.size())
@@ -169,18 +135,23 @@ bool GCNRegPressure::less(const GCNSubtarget &ST,
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD
-void GCNRegPressure::print(raw_ostream &OS, const GCNSubtarget *ST) const {
- OS << "VGPRs: " << Value[VGPR32] << ' ';
- OS << "AGPRs: " << Value[AGPR32];
- if (ST) OS << "(O"
- << ST->getOccupancyWithNumVGPRs(getVGPRNum(ST->hasGFX90AInsts()))
- << ')';
- OS << ", SGPRs: " << getSGPRNum();
- if (ST) OS << "(O" << ST->getOccupancyWithNumSGPRs(getSGPRNum()) << ')';
- OS << ", LVGPR WT: " << getVGPRTuplesWeight()
- << ", LSGPR WT: " << getSGPRTuplesWeight();
- if (ST) OS << " -> Occ: " << getOccupancy(*ST);
- OS << '\n';
+Printable llvm::print(const GCNRegPressure &RP, const GCNSubtarget *ST) {
+ return Printable([&RP, ST](raw_ostream &OS) {
+ OS << "VGPRs: " << RP.Value[GCNRegPressure::VGPR32] << ' '
+ << "AGPRs: " << RP.getAGPRNum();
+ if (ST)
+ OS << "(O"
+ << ST->getOccupancyWithNumVGPRs(RP.getVGPRNum(ST->hasGFX90AInsts()))
+ << ')';
+ OS << ", SGPRs: " << RP.getSGPRNum();
+ if (ST)
+ OS << "(O" << ST->getOccupancyWithNumSGPRs(RP.getSGPRNum()) << ')';
+ OS << ", LVGPR WT: " << RP.getVGPRTuplesWeight()
+ << ", LSGPR WT: " << RP.getSGPRTuplesWeight();
+ if (ST)
+ OS << " -> Occ: " << RP.getOccupancy(*ST);
+ OS << '\n';
+ });
}
#endif
@@ -430,33 +401,29 @@ bool GCNDownwardRPTracker::advance(MachineBasicBlock::const_iterator Begin,
#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
LLVM_DUMP_METHOD
-static void reportMismatch(const GCNRPTracker::LiveRegSet &LISLR,
- const GCNRPTracker::LiveRegSet &TrackedLR,
- const TargetRegisterInfo *TRI) {
- for (auto const &P : TrackedLR) {
- auto I = LISLR.find(P.first);
- if (I == LISLR.end()) {
- dbgs() << " " << printReg(P.first, TRI)
- << ":L" << PrintLaneMask(P.second)
- << " isn't found in LIS reported set\n";
- }
- else if (I->second != P.second) {
- dbgs() << " " << printReg(P.first, TRI)
- << " masks doesn't match: LIS reported "
- << PrintLaneMask(I->second)
- << ", tracked "
- << PrintLaneMask(P.second)
- << '\n';
+Printable llvm::reportMismatch(const GCNRPTracker::LiveRegSet &LISLR,
+ const GCNRPTracker::LiveRegSet &TrackedLR,
+ const TargetRegisterInfo *TRI) {
+ return Printable([&LISLR, &TrackedLR, TRI](raw_ostream &OS) {
+ for (auto const &P : TrackedLR) {
+ auto I = LISLR.find(P.first);
+ if (I == LISLR.end()) {
+ OS << " " << printReg(P.first, TRI) << ":L" << PrintLaneMask(P.second)
+ << " isn't found in LIS reported set\n";
+ } else if (I->second != P.second) {
+ OS << " " << printReg(P.first, TRI)
+ << " masks doesn't match: LIS reported " << PrintLaneMask(I->second)
+ << ", tracked " << PrintLaneMask(P.second) << '\n';
+ }
}
- }
- for (auto const &P : LISLR) {
- auto I = TrackedLR.find(P.first);
- if (I == TrackedLR.end()) {
- dbgs() << " " << printReg(P.first, TRI)
- << ":L" << PrintLaneMask(P.second)
- << " isn't found in tracked set\n";
+ for (auto const &P : LISLR) {
+ auto I = TrackedLR.find(P.first);
+ if (I == TrackedLR.end()) {
+ OS << " " << printReg(P.first, TRI) << ":L" << PrintLaneMask(P.second)
+ << " isn't found in tracked set\n";
+ }
}
- }
+ });
}
bool GCNUpwardRPTracker::isValid() const {
@@ -466,33 +433,38 @@ bool GCNUpwardRPTracker::isValid() const {
if (!isEqual(LISLR, TrackedLR)) {
dbgs() << "\nGCNUpwardRPTracker error: Tracked and"
- " LIS reported livesets mismatch:\n";
- printLivesAt(SI, LIS, *MRI);
+ " LIS reported livesets mismatch:\n"
+ << print(LISLR, *MRI);
reportMismatch(LISLR, TrackedLR, MRI->getTargetRegisterInfo());
return false;
}
auto LISPressure = getRegPressure(*MRI, LISLR);
if (LISPressure != CurPressure) {
- dbgs() << "GCNUpwardRPTracker error: Pressure sets
diff erent\nTracked: ";
- CurPressure.print(dbgs());
- dbgs() << "LIS rpt: ";
- LISPressure.print(dbgs());
+ dbgs() << "GCNUpwardRPTracker error: Pressure sets
diff erent\nTracked: "
+ << print(CurPressure) << "LIS rpt: " << print(LISPressure);
return false;
}
return true;
}
-void GCNRPTracker::printLiveRegs(raw_ostream &OS, const LiveRegSet& LiveRegs,
- const MachineRegisterInfo &MRI) {
- const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();
- for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
- Register Reg = Register::index2VirtReg(I);
- auto It = LiveRegs.find(Reg);
- if (It != LiveRegs.end() && It->second.any())
- OS << ' ' << printVRegOrUnit(Reg, TRI) << ':'
- << PrintLaneMask(It->second);
- }
- OS << '\n';
+LLVM_DUMP_METHOD
+Printable llvm::print(const GCNRPTracker::LiveRegSet &LiveRegs,
+ const MachineRegisterInfo &MRI) {
+ return Printable([&LiveRegs, &MRI](raw_ostream &OS) {
+ const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();
+ for (unsigned I = 0, E = MRI.getNumVirtRegs(); I != E; ++I) {
+ Register Reg = Register::index2VirtReg(I);
+ auto It = LiveRegs.find(Reg);
+ if (It != LiveRegs.end() && It->second.any())
+ OS << ' ' << printVRegOrUnit(Reg, TRI) << ':'
+ << PrintLaneMask(It->second);
+ }
+ OS << '\n';
+ });
}
+
+LLVM_DUMP_METHOD
+void GCNRegPressure::dump() const { dbgs() << print(*this); }
+
#endif
diff --git a/llvm/lib/Target/AMDGPU/GCNRegPressure.h b/llvm/lib/Target/AMDGPU/GCNRegPressure.h
index c41548d19c8e7..b6ad960a8a65f 100644
--- a/llvm/lib/Target/AMDGPU/GCNRegPressure.h
+++ b/llvm/lib/Target/AMDGPU/GCNRegPressure.h
@@ -85,8 +85,7 @@ struct GCNRegPressure {
return !(*this == O);
}
- void print(raw_ostream &OS, const GCNSubtarget *ST = nullptr) const;
- void dump() const { print(dbgs()); }
+ void dump() const;
private:
unsigned Value[TOTAL_KINDS];
@@ -95,6 +94,8 @@ struct GCNRegPressure {
friend GCNRegPressure max(const GCNRegPressure &P1,
const GCNRegPressure &P2);
+
+ friend Printable print(const GCNRegPressure &RP, const GCNSubtarget *ST);
};
inline GCNRegPressure max(const GCNRegPressure &P1, const GCNRegPressure &P2) {
@@ -137,9 +138,6 @@ class GCNRPTracker {
decltype(LiveRegs) moveLiveRegs() {
return std::move(LiveRegs);
}
-
- static void printLiveRegs(raw_ostream &OS, const LiveRegSet& LiveRegs,
- const MachineRegisterInfo &MRI);
};
class GCNUpwardRPTracker : public GCNRPTracker {
@@ -270,9 +268,14 @@ GCNRegPressure getRegPressure(const MachineRegisterInfo &MRI,
bool isEqual(const GCNRPTracker::LiveRegSet &S1,
const GCNRPTracker::LiveRegSet &S2);
-void printLivesAt(SlotIndex SI,
- const LiveIntervals &LIS,
- const MachineRegisterInfo &MRI);
+Printable print(const GCNRegPressure &RP, const GCNSubtarget *ST = nullptr);
+
+Printable print(const GCNRPTracker::LiveRegSet &LiveRegs,
+ const MachineRegisterInfo &MRI);
+
+Printable reportMismatch(const GCNRPTracker::LiveRegSet &LISLR,
+ const GCNRPTracker::LiveRegSet &TrackedL,
+ const TargetRegisterInfo *TRI);
} // end namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
index 6bf4ade399b77..1577c1761aadd 100644
--- a/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
@@ -781,11 +781,11 @@ bool GCNSchedStage::initGCNRegion() {
PressureBefore = DAG.Pressure[RegionIdx];
LLVM_DEBUG(
- dbgs() << "Pressure before scheduling:\nRegion live-ins:";
- GCNRPTracker::printLiveRegs(dbgs(), DAG.LiveIns[RegionIdx], DAG.MRI);
- dbgs() << "Region live-in pressure: ";
- llvm::getRegPressure(DAG.MRI, DAG.LiveIns[RegionIdx]).print(dbgs());
- dbgs() << "Region register pressure: "; PressureBefore.print(dbgs()));
+ dbgs() << "Pressure before scheduling:\nRegion live-ins:"
+ << print(DAG.LiveIns[RegionIdx], DAG.MRI)
+ << "Region live-in pressure: "
+ << print(llvm::getRegPressure(DAG.MRI, DAG.LiveIns[RegionIdx]))
+ << "Region register pressure: " << print(PressureBefore));
S.HasHighPressure = false;
@@ -862,8 +862,7 @@ void GCNSchedStage::finalizeGCNRegion() {
void GCNSchedStage::checkScheduling() {
// Check the results of scheduling.
PressureAfter = DAG.getRealRegPressure(RegionIdx);
- LLVM_DEBUG(dbgs() << "Pressure after scheduling: ";
- PressureAfter.print(dbgs()));
+ LLVM_DEBUG(dbgs() << "Pressure after scheduling: " << print(PressureAfter));
if (PressureAfter.getSGPRNum() <= S.SGPRCriticalLimit &&
PressureAfter.getVGPRNum(ST.hasGFX90AInsts()) <= S.VGPRCriticalLimit) {
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