[PATCH] D136858: [AArch64-SVE]: Force generating code compatible to streaming mode for sve-fixed-length tests.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added inline comments.


================
Comment at: llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-vector-shuffle.ll:9
+;   ret <4 x i8> %ret
+; }
+
----------------
hassnaa-arm wrote:
> when I uncomment this test, llc returns this error: 
>  invalid shufflevector operands:
>  
> ```
> %ret = shufflevector <4 x i8> %op1, <4 x i8> %op2, <4 x i32> <i32 7, i32 8, i32 9, i32 10>
> ```
> 
> 
> 
> 
That is because elements 8, 9 and 10 are out of bounds when you concatenate %op1 and %op2 (<=> 8 elements)

The follow does work for example:

  %ret = shufflevector <4 x i8> %op1, <4 x i8> %op2, <4 x i32> <i32 3, i32 4, i32 5, i32 6>


Repository:
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  https://reviews.llvm.org/D136858/new/

https://reviews.llvm.org/D136858