[PATCH] D136861: [IR] Add LLVM IR support for aarch64_svcount opaque type.

[Sander de Smalen via Phabricator via llvm-commits]

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The C and C++ Language Extensions for AArch64 SME2 [1] adds a new type called
`svcount_t` which describes a predicate. This is not a predicate vector
mask, but rather a description of a predicate vector mask that can be
expanded into a mask using explicit instructions. The type is a scalable
opaque type.

To implement `svcount_t` type this patch adds an opaque LLVM IR type as well as
support for parsing, assembling and a LangRef description. AArch64 CodeGen
support will follow in a separate patch.

[1] https://github.com/ARM-software/acle/pull/217

Patch co-authored by @CarolineConcatto


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D136861

Files:
  llvm/docs/LangRef.rst
  llvm/include/llvm/Bitcode/LLVMBitCodes.h
  llvm/include/llvm/CodeGen/ValueTypes.td
  llvm/include/llvm/IR/DataLayout.h
  llvm/include/llvm/IR/Type.h
  llvm/lib/AsmParser/LLLexer.cpp
  llvm/lib/Bitcode/Reader/BitcodeAnalyzer.cpp
  llvm/lib/Bitcode/Reader/BitcodeReader.cpp
  llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
  llvm/lib/IR/AsmWriter.cpp
  llvm/lib/IR/LLVMContextImpl.cpp
  llvm/lib/IR/LLVMContextImpl.h
  llvm/lib/IR/Type.cpp
  llvm/test/Assembler/aarch64_svcount.ll

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