[PATCH] D136823: [AArch64][SVE] Rename PPR3b register class to PPR_p0to7

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm added a comment.

I won't go as far as saying I'm against this patch given there is logic behind the change but I will highlight the existing idiom of specifying the bit length to restrict the range of another operand is pretty common. For example, we have ZPR_3b, ZPR_4b and the immediates are defined in this way.  My comment on D136678 <https://reviews.llvm.org/D136678> was more about not needing to duplicate information for something that wasn't purely about restricting the upper bound.  However, the change is sensible and more expressive so if you feel strongly enough then fair enough.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136823/new/

https://reviews.llvm.org/D136823