[PATCH] D131873: [PowerPC] Optimize compare by using record form in post-RA.
Esme Yi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 26 20:07:22 PDT 2022
Esme added a comment.
In D131873#3881526 <https://reviews.llvm.org/D131873#3881526>, @shchenz wrote:
> Compared with previous versions, to me, seems some valid transformations are gone now because of the new bail out case `Subtarget.isPPC64() && Opc == PPC::CMPWI`. Maybe we can have a further check why PPC64 generates `CMPWI 0` for some cases. For these cases, I guess `CMPDI 0` should also be ok, so that there will be more record form opportunities here. But we can do that in another patch.
Currently PPC64 generates `CMPWI 0` for int32 operands, which is reasonable.
`CMPDI 0` will be ok if the use of the comparison is an equality check, however it's not easy to find the reliable use in Post-RA.
More investigation is required to exploit other opportunities for optimization comparison.
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp:2839
+ if (SrcRegHasOtherUse || CmpMI.getOperand(1).isKill())
+ fixupIsDeadOrKill(SrcMI, &CmpMI, SrcReg);
+
----------------
shchenz wrote:
> hmm, another caller of `fixupIsDeadOrKill()`, we refactor this in D133103. FYI @nemanjai
D133103 seems in progress, so this patch will not be rebase on it. Maybe D133103 can refactor this after this patch lands.
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