[PATCH] D134951: [CodeGen][RegAllocFast] Add MRI delegate callback to notify VReg spill
Christudasan Devadasan via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 26 12:38:48 PDT 2022
cdevadas updated this revision to Diff 470902.
cdevadas added a comment.
Rebase after recent changes in D134950 <https://reviews.llvm.org/D134950>.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D134951/new/
https://reviews.llvm.org/D134951
Files:
llvm/include/llvm/CodeGen/MachineRegisterInfo.h
llvm/lib/CodeGen/LiveIntervals.cpp
llvm/lib/CodeGen/LiveRangeEdit.cpp
llvm/lib/CodeGen/RegAllocFast.cpp
Index: llvm/lib/CodeGen/RegAllocFast.cpp
===================================================================
--- llvm/lib/CodeGen/RegAllocFast.cpp
+++ llvm/lib/CodeGen/RegAllocFast.cpp
@@ -434,6 +434,7 @@
int FI = getStackSpaceFor(VirtReg);
LLVM_DEBUG(dbgs() << " to stack slot #" << FI << '\n');
+ MRI->noteVirtualRegisterSpill(VirtReg);
const TargetRegisterClass &RC = *MRI->getRegClass(VirtReg);
TII->storeRegToStackSlot(*MBB, Before, AssignedReg, Kill, FI, &RC, TRI);
++NumStores;
@@ -488,6 +489,7 @@
LLVM_DEBUG(dbgs() << "Reloading " << printReg(VirtReg, TRI) << " into "
<< printReg(PhysReg, TRI) << '\n');
int FI = getStackSpaceFor(VirtReg);
+ MRI->noteVirtualRegisterSpill(VirtReg);
const TargetRegisterClass &RC = *MRI->getRegClass(VirtReg);
TII->loadRegFromStackSlot(*MBB, Before, PhysReg, FI, &RC, TRI);
++NumLoads;
Index: llvm/lib/CodeGen/LiveRangeEdit.cpp
===================================================================
--- llvm/lib/CodeGen/LiveRangeEdit.cpp
+++ llvm/lib/CodeGen/LiveRangeEdit.cpp
@@ -33,7 +33,7 @@
LiveInterval &LiveRangeEdit::createEmptyIntervalFrom(Register OldReg,
bool createSubRanges) {
- Register VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg));
+ Register VReg = MRI.cloneVirtualRegister(OldReg);
if (VRM)
VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg));
@@ -53,7 +53,7 @@
}
Register LiveRangeEdit::createFrom(Register OldReg) {
- Register VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg));
+ Register VReg = MRI.cloneVirtualRegister(OldReg);
if (VRM) {
VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg));
}
Index: llvm/lib/CodeGen/LiveIntervals.cpp
===================================================================
--- llvm/lib/CodeGen/LiveIntervals.cpp
+++ llvm/lib/CodeGen/LiveIntervals.cpp
@@ -1743,9 +1743,8 @@
return;
LLVM_DEBUG(dbgs() << " Split " << NumComp << " components: " << LI << '\n');
Register Reg = LI.reg();
- const TargetRegisterClass *RegClass = MRI->getRegClass(Reg);
for (unsigned I = 1; I < NumComp; ++I) {
- Register NewVReg = MRI->createVirtualRegister(RegClass);
+ Register NewVReg = MRI->cloneVirtualRegister(Reg);
LiveInterval &NewLI = createEmptyInterval(NewVReg);
SplitLIs.push_back(&NewLI);
}
Index: llvm/include/llvm/CodeGen/MachineRegisterInfo.h
===================================================================
--- llvm/include/llvm/CodeGen/MachineRegisterInfo.h
+++ llvm/include/llvm/CodeGen/MachineRegisterInfo.h
@@ -61,6 +61,7 @@
Register SrcReg) {
MRI_NoteNewVirtualRegister(NewReg);
}
+ virtual void MRI_NoteVirtualRegisterSpill(Register Reg) {}
};
private:
@@ -183,6 +184,12 @@
TheDelegate->MRI_NotecloneVirtualRegister(NewReg, SrcReg);
}
+ /// Callback to notify a virtual register spill/reload.
+ void noteVirtualRegisterSpill(Register Reg) {
+ for (const auto &TheDelegate : TheDelegates)
+ TheDelegate->MRI_NoteVirtualRegisterSpill(Reg);
+ }
+
//===--------------------------------------------------------------------===//
// Function State
//===--------------------------------------------------------------------===//
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