[PATCH] D136735: [RISCV] Use vslide1down for i64 insertelt on RV32.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Oct 26 09:43:37 PDT 2022


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGa61b74889f54: [RISCV] Use vslide1down for i64 insertelt on RV32. (authored by craig.topper).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136735/new/

https://reviews.llvm.org/D136735

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
  llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll

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