[PATCH] D136170: [UpdateTestChecks] Sync flags in update_mir_test_checks.py with MIFlags
Anton Sidorenko via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 26 05:54:24 PDT 2022
asi-sc updated this revision to Diff 470794.
asi-sc added a comment.
Rebase after precommit test is merged.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D136170/new/
https://reviews.llvm.org/D136170
Files:
llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir.expected
llvm/utils/update_mir_test_checks.py
Index: llvm/utils/update_mir_test_checks.py
===================================================================
--- llvm/utils/update_mir_test_checks.py
+++ llvm/utils/update_mir_test_checks.py
@@ -35,7 +35,7 @@
VREG_RE = re.compile(r'(%[0-9]+)(?::[a-z0-9_]+)?(?:\([<>a-z0-9 ]+\))?')
MI_FLAGS_STR= (
r'(frame-setup |frame-destroy |nnan |ninf |nsz |arcp |contract |afn '
- r'|reassoc |nuw |nsw |exact |fpexcept )*')
+ r'|reassoc |nuw |nsw |exact |nofpexcept |nomerge )*')
VREG_DEF_RE = re.compile(
r'^ *(?P<vregs>{0}(?:, {0})*) = '
r'{1}(?P<opcode>[A-Zt][A-Za-z0-9_]+)'.format(VREG_RE.pattern, MI_FLAGS_STR))
Index: llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir.expected
===================================================================
--- llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir.expected
+++ llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir.expected
@@ -73,8 +73,8 @@
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: [[COPY:%[0-9]+]]:fr32 = COPY $xmm0
; CHECK-NEXT: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt $rip, 1, $noreg, %const.0, $noreg :: (load (s32) from constant-pool)
- ; CHECK-NEXT: %2:fr32 = nsz nofpexcept DIVSSrr [[MOVSSrm_alt]], [[COPY]], implicit $mxcsr
- ; CHECK-NEXT: $xmm0 = COPY %2
+ ; CHECK-NEXT: [[DIVSSrr:%[0-9]+]]:fr32 = nsz nofpexcept DIVSSrr [[MOVSSrm_alt]], [[COPY]], implicit $mxcsr
+ ; CHECK-NEXT: $xmm0 = COPY [[DIVSSrr]]
; CHECK-NEXT: RET 0, $xmm0
%0:fr32 = COPY $xmm0
%1:fr32 = MOVSSrm_alt $rip, 1, $noreg, %const.0, $noreg :: (load (s32) from constant-pool)
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