[llvm] 16fb915 - [UpdateTestChecks] Precommit test for D136170
Anton Sidorenko via llvm-commits
llvm-commits at lists.llvm.org
Wed Oct 26 05:51:50 PDT 2022
Author: Anton Sidorenko
Date: 2022-10-26T15:49:39+03:00
New Revision: 16fb9150beb421daf8ee5ecc8bf2eb6fe9727e61
URL: https://github.com/llvm/llvm-project/commit/16fb9150beb421daf8ee5ecc8bf2eb6fe9727e61
DIFF: https://github.com/llvm/llvm-project/commit/16fb9150beb421daf8ee5ecc8bf2eb6fe9727e61.diff
LOG: [UpdateTestChecks] Precommit test for D136170
Added:
llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir
llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir.expected
llvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-MIFlags.test
Modified:
Removed:
################################################################################
diff --git a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir
new file mode 100644
index 0000000000000..162d8493037f9
--- /dev/null
+++ b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir
@@ -0,0 +1,79 @@
+# RUN: llc -mtriple=x86_64-unknown-unknown -run-pass=finalize-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK
+
+--- |
+
+
+ define float @check_MI_flags(float %f) {
+ %div = fdiv nsz float 1.000000e+00, %f
+ ret float %div
+ }
+
+...
+---
+name: check_MI_flags
+alignment: 16
+exposesReturnsTwice: false
+legalized: false
+regBankSelected: false
+selected: false
+failedISel: false
+tracksRegLiveness: true
+hasWinCFI: false
+callsEHReturn: false
+callsUnwindInit: false
+hasEHCatchret: false
+hasEHScopes: false
+hasEHFunclets: false
+failsVerification: false
+tracksDebugUserValues: false
+registers:
+ - { id: 0, class: fr32, preferred-register: '' }
+ - { id: 1, class: fr32, preferred-register: '' }
+ - { id: 2, class: fr32, preferred-register: '' }
+liveins:
+ - { reg: '$xmm0', virtual-reg: '%0' }
+frameInfo:
+ isFrameAddressTaken: false
+ isReturnAddressTaken: false
+ hasStackMap: false
+ hasPatchPoint: false
+ stackSize: 0
+ offsetAdjustment: 0
+ maxAlignment: 1
+ adjustsStack: false
+ hasCalls: false
+ stackProtector: ''
+ functionContext: ''
+ maxCallFrameSize: 4294967295
+ cvBytesOfCalleeSavedRegisters: 0
+ hasOpaqueSPAdjustment: false
+ hasVAStart: false
+ hasMustTailInVarArgFunc: false
+ hasTailCall: false
+ localFrameSize: 0
+ savePoint: ''
+ restorePoint: ''
+fixedStack: []
+stack: []
+callSites: []
+debugValueSubstitutions: []
+constants:
+ - id: 0
+ value: 'float 1.000000e+00'
+ alignment: 4
+ isTargetSpecific: false
+machineFunctionInfo: {}
+body: |
+ bb.0 (%ir-block.0):
+ liveins: $xmm0
+
+ %0:fr32 = COPY $xmm0
+ %1:fr32 = MOVSSrm_alt $rip, 1, $noreg, %const.0, $noreg :: (load (s32) from constant-pool)
+ %2:fr32 = nsz nofpexcept DIVSSrr %1, %0, implicit $mxcsr
+ $xmm0 = COPY %2
+ RET 0, $xmm0
+
+...
+
+
+
diff --git a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir.expected b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir.expected
new file mode 100644
index 0000000000000..60ce43b5f420f
--- /dev/null
+++ b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/Inputs/x86-MIFlags.mir.expected
@@ -0,0 +1,88 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=x86_64-unknown-unknown -run-pass=finalize-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK
+
+--- |
+
+
+ define float @check_MI_flags(float %f) {
+ %div = fdiv nsz float 1.000000e+00, %f
+ ret float %div
+ }
+
+...
+---
+name: check_MI_flags
+alignment: 16
+exposesReturnsTwice: false
+legalized: false
+regBankSelected: false
+selected: false
+failedISel: false
+tracksRegLiveness: true
+hasWinCFI: false
+callsEHReturn: false
+callsUnwindInit: false
+hasEHCatchret: false
+hasEHScopes: false
+hasEHFunclets: false
+failsVerification: false
+tracksDebugUserValues: false
+registers:
+ - { id: 0, class: fr32, preferred-register: '' }
+ - { id: 1, class: fr32, preferred-register: '' }
+ - { id: 2, class: fr32, preferred-register: '' }
+liveins:
+ - { reg: '$xmm0', virtual-reg: '%0' }
+frameInfo:
+ isFrameAddressTaken: false
+ isReturnAddressTaken: false
+ hasStackMap: false
+ hasPatchPoint: false
+ stackSize: 0
+ offsetAdjustment: 0
+ maxAlignment: 1
+ adjustsStack: false
+ hasCalls: false
+ stackProtector: ''
+ functionContext: ''
+ maxCallFrameSize: 4294967295
+ cvBytesOfCalleeSavedRegisters: 0
+ hasOpaqueSPAdjustment: false
+ hasVAStart: false
+ hasMustTailInVarArgFunc: false
+ hasTailCall: false
+ localFrameSize: 0
+ savePoint: ''
+ restorePoint: ''
+fixedStack: []
+stack: []
+callSites: []
+debugValueSubstitutions: []
+constants:
+ - id: 0
+ value: 'float 1.000000e+00'
+ alignment: 4
+ isTargetSpecific: false
+machineFunctionInfo: {}
+body: |
+ bb.0 (%ir-block.0):
+ liveins: $xmm0
+
+ ; CHECK-LABEL: name: check_MI_flags
+ ; CHECK: liveins: $xmm0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:fr32 = COPY $xmm0
+ ; CHECK-NEXT: [[MOVSSrm_alt:%[0-9]+]]:fr32 = MOVSSrm_alt $rip, 1, $noreg, %const.0, $noreg :: (load (s32) from constant-pool)
+ ; CHECK-NEXT: %2:fr32 = nsz nofpexcept DIVSSrr [[MOVSSrm_alt]], [[COPY]], implicit $mxcsr
+ ; CHECK-NEXT: $xmm0 = COPY %2
+ ; CHECK-NEXT: RET 0, $xmm0
+ %0:fr32 = COPY $xmm0
+ %1:fr32 = MOVSSrm_alt $rip, 1, $noreg, %const.0, $noreg :: (load (s32) from constant-pool)
+ %2:fr32 = nsz nofpexcept DIVSSrr %1, %0, implicit $mxcsr
+ $xmm0 = COPY %2
+ RET 0, $xmm0
+
+...
+
+
+
diff --git a/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-MIFlags.test b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-MIFlags.test
new file mode 100644
index 0000000000000..f551f016eea0e
--- /dev/null
+++ b/llvm/test/tools/UpdateTestChecks/update_mir_test_checks/x86-MIFlags.test
@@ -0,0 +1,5 @@
+# REQUIRES: x86-registered-target
+## Check that update_mir_test_checks uses CHECK-NEXT directories
+
+# RUN: cp -f %S/Inputs/x86-MIFlags.mir %t.mir && %update_mir_test_checks %t.mir
+# RUN:
diff -u %S/Inputs/x86-MIFlags.mir.expected %t.mir
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