[PATCH] D136754: [MachineCombiner] Extend reassociation logic to handle inverse instructions

[Anton Sidorenko via Phabricator via llvm-commits]

asi-sc created this revision.
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Machine combiner supports generic reassociation only of associative and
commutative instructions, for example (A + X) + Y => (X + Y) + A. However, we
can extend this generic support to handle patterns like
(X + A) - Y => (X - Y) + A), where `-` is the inverse of `+`.
This patch adds interface functions to process reassociation patterns of
associative/commutative instructions and their inverse variants with minimal
changes in backends.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D136754

Files:
  llvm/include/llvm/CodeGen/TargetInstrInfo.h
  llvm/lib/CodeGen/TargetInstrInfo.cpp
  llvm/test/CodeGen/AArch64/machine-combiner.ll
  llvm/test/CodeGen/AArch64/sqrt-fastmath.ll
  llvm/test/CodeGen/PowerPC/machine-combiner.ll
  llvm/test/CodeGen/X86/avx512-mask-op.ll
  llvm/test/CodeGen/X86/avx512fp16-intrinsics.ll
  llvm/test/CodeGen/X86/avx512fp16-machine-combiner.ll
  llvm/test/CodeGen/X86/avx512fp16-mscatter.ll
  llvm/test/CodeGen/X86/avx512vl-intrinsics.ll
  llvm/test/CodeGen/X86/horizontal-sum.ll
  llvm/test/CodeGen/X86/machine-combiner-int-vec.ll
  llvm/test/CodeGen/X86/machine-combiner.ll
  llvm/test/CodeGen/X86/madd.ll
  llvm/test/CodeGen/X86/masked_gather_scatter.ll
  llvm/test/CodeGen/X86/mul-constant-i64.ll
  llvm/test/CodeGen/X86/pr46877.ll
  llvm/test/CodeGen/X86/sqrt-fastmath.ll
  llvm/test/CodeGen/X86/umulo-128-legalisation-lowering.ll
  llvm/test/CodeGen/X86/x86-interleaved-access.ll

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