[PATCH] D136244: [AArch64] Optimize memcmp when the result is tested for [in]equality with 0

[chenglin.bi via Phabricator via llvm-commits]

bcl5980 added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:19499-19500
+      (LHS.getOperand(0)->getOpcode() == ISD::XOR &&
+       LHS.getOperand(1)->getOpcode() == ISD::XOR) &&
+      LHS.getOperand(0)->hasOneUse() && LHS.getOperand(1)->hasOneUse()) {
+    SDValue XOR0 = LHS.getOperand(0);
----------------
Allen wrote:
> bcl5980 wrote:
> > Allen wrote:
> > > bcl5980 wrote:
> > > > LHS should be OneUse also?
> > > The **LHS **node itself is not used in the return value when the pattern matched, so I don't think the OneUse is  needed, correct me if I'm wrong, thanks.
> > for example:
> > ```
> > int use(int);
> > int f(int a, int b, int c, int d)
> > {
> >    int xor0 = a ^ b;
> >    int xor1 = c ^ d;
> >    int or0   = xor0 | xor1;
> >    if (or0 != 0)
> >         return use(or0);
> >    return a;
> > }
> > ```
> > or0 is not one use. So we should keep all of the xor+or patterns. 
> >  
> * thanks for your case. If the or0 used more than one, then the  xor+or patterns will be keep as we delete then when we match the pattern
> * base your above case, it seems works, https://alive2.llvm.org/ce/z/699vcf
>    Of course, this match doesn't depend on that either, and I can add oneuse of LHS if you still worry about it.
> 
It looks your case source instructions is less than dest? 


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136244/new/

https://reviews.llvm.org/D136244