[PATCH] D136735: [RISCV] Use vslide1down for i64 insertelt on RV32.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Oct 25 22:47:54 PDT 2022


craig.topper updated this revision to Diff 470715.
craig.topper added a comment.

Update comment


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136735/new/

https://reviews.llvm.org/D136735

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-bitcast.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp-bitcast.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-unaligned.ll
  llvm/test/CodeGen/RISCV/rvv/insertelt-int-rv32.ll

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