[PATCH] D136713: [SDAG] avoid vector extract/insert around binop

[Sanjay Patel via Phabricator via llvm-commits]

spatel added inline comments.


================
Comment at: llvm/test/CodeGen/X86/urem-vector-lkk.ll:149
+; SSE-NEXT:    andl $7, %eax
+; SSE-NEXT:    pinsrw $2, %eax, %xmm1
 ; SSE-NEXT:    pextrw $3, %xmm0, %eax
----------------
RKSimon wrote:
> can the fold be expanded to work with insert_vector_elt as well?
Yes - but I expect it'll be a closer call whether things are always profitable in those cases.

On this particular example, I think we'd need to change something else or have an x86-specific solution because we convert to target-specific ops during legalization and before there's a chance to clean up intermediate casts:
                t90: i32 = X86ISD::PEXTRW t2, TargetConstant:i8<1>
              t91: i16 = truncate t90
            t76: i16 = and t91, Constant:i16<31>
          t102: i32 = any_extend t76
        t103: v8i16 = X86ISD::PINSRW t82, t102, TargetConstant:i8<1>



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  https://reviews.llvm.org/D136713/new/

https://reviews.llvm.org/D136713