[llvm] 11afbf3 - Update supported features in the generic CPU configuration
Dan Gohman via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 25 11:43:30 PDT 2022
Author: Dan Gohman
Date: 2022-10-25T11:42:32-07:00
New Revision: 11afbf396e10e1b1e91a5991e2aec1916e29a910
URL: https://github.com/llvm/llvm-project/commit/11afbf396e10e1b1e91a5991e2aec1916e29a910
DIFF: https://github.com/llvm/llvm-project/commit/11afbf396e10e1b1e91a5991e2aec1916e29a910.diff
LOG: Update supported features in the generic CPU configuration
Accompanying https://reviews.llvm.org/D125728, this updates LLVM
Codegen's "generic" CPU to enable the same new features.
Differential Revision: https://reviews.llvm.org/D125729
Added:
Modified:
llvm/lib/Target/WebAssembly/WebAssembly.td
llvm/test/CodeGen/WebAssembly/PR41149.ll
llvm/test/CodeGen/WebAssembly/bulk-memory.ll
llvm/test/CodeGen/WebAssembly/bulk-memory64.ll
llvm/test/CodeGen/WebAssembly/byval.ll
llvm/test/CodeGen/WebAssembly/conv-trap.ll
llvm/test/CodeGen/WebAssembly/fast-isel-noreg.ll
llvm/test/CodeGen/WebAssembly/global.ll
llvm/test/CodeGen/WebAssembly/legalize.ll
llvm/test/CodeGen/WebAssembly/mem-intrinsics.ll
llvm/test/CodeGen/WebAssembly/memory64-feature.ll
llvm/test/CodeGen/WebAssembly/multivalue.ll
llvm/test/CodeGen/WebAssembly/mutable-globals.ll
llvm/test/CodeGen/WebAssembly/reference-types.ll
llvm/test/CodeGen/WebAssembly/signext-zeroext.ll
llvm/test/CodeGen/WebAssembly/simd-conversions.ll
llvm/test/CodeGen/WebAssembly/simd-sext-inreg.ll
llvm/test/CodeGen/WebAssembly/tailcall.ll
llvm/test/CodeGen/WebAssembly/target-features-tls.ll
llvm/test/CodeGen/WebAssembly/target-features.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/WebAssembly/WebAssembly.td b/llvm/lib/Target/WebAssembly/WebAssembly.td
index b83dcf3a8e656..7531d36a74a64 100644
--- a/llvm/lib/Target/WebAssembly/WebAssembly.td
+++ b/llvm/lib/Target/WebAssembly/WebAssembly.td
@@ -97,7 +97,13 @@ def WebAssemblyInstrInfo : InstrInfo;
def : ProcessorModel<"mvp", NoSchedModel, []>;
// Generic processor: latest stable version.
-def : ProcessorModel<"generic", NoSchedModel, []>;
+//
+// This includes features that have achieved phase 4 of the standards process,
+// and that are expected to work for most users in the current time, with
+// consideration given to available support in relevant engines and tools, and
+// the importance of the features.
+def : ProcessorModel<"generic", NoSchedModel,
+ [FeatureSignExt, FeatureMutableGlobals]>;
// Latest and greatest experimental version of WebAssembly. Bugs included!
def : ProcessorModel<"bleeding-edge", NoSchedModel,
diff --git a/llvm/test/CodeGen/WebAssembly/PR41149.ll b/llvm/test/CodeGen/WebAssembly/PR41149.ll
index 428f84979d89e..d18bd9c4a3b88 100644
--- a/llvm/test/CodeGen/WebAssembly/PR41149.ll
+++ b/llvm/test/CodeGen/WebAssembly/PR41149.ll
@@ -13,9 +13,8 @@ define void @mod() {
; CHECK-NEXT: i32.load8_u 0
; CHECK-NEXT: local.tee 0
; CHECK-NEXT: local.get 0
-; CHECK-NEXT: i32.const 24
-; CHECK-NEXT: i32.shl
-; CHECK-NEXT: i32.const 31
+; CHECK-NEXT: i32.extend8_s
+; CHECK-NEXT: i32.const 7
; CHECK-NEXT: i32.shr_s
; CHECK-NEXT: local.tee 0
; CHECK-NEXT: i32.xor
diff --git a/llvm/test/CodeGen/WebAssembly/bulk-memory.ll b/llvm/test/CodeGen/WebAssembly/bulk-memory.ll
index f739f08f70715..4ccc95c8f4928 100644
--- a/llvm/test/CodeGen/WebAssembly/bulk-memory.ll
+++ b/llvm/test/CodeGen/WebAssembly/bulk-memory.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+bulk-memory | FileCheck %s --check-prefixes CHECK,BULK-MEM
-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-bulk-memory | FileCheck %s --check-prefixes CHECK,NO-BULK-MEM
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=+bulk-memory | FileCheck %s --check-prefixes CHECK,BULK-MEM
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=-bulk-memory | FileCheck %s --check-prefixes CHECK,NO-BULK-MEM
; Test that basic bulk memory codegen works correctly
diff --git a/llvm/test/CodeGen/WebAssembly/bulk-memory64.ll b/llvm/test/CodeGen/WebAssembly/bulk-memory64.ll
index eaf9a9659429e..88cf6b58c0732 100644
--- a/llvm/test/CodeGen/WebAssembly/bulk-memory64.ll
+++ b/llvm/test/CodeGen/WebAssembly/bulk-memory64.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+bulk-memory | FileCheck %s --check-prefixes CHECK,BULK-MEM
-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-bulk-memory | FileCheck %s --check-prefixes CHECK,NO-BULK-MEM
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=+bulk-memory | FileCheck %s --check-prefixes CHECK,BULK-MEM
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=-bulk-memory | FileCheck %s --check-prefixes CHECK,NO-BULK-MEM
; Test that basic bulk memory codegen works correctly
diff --git a/llvm/test/CodeGen/WebAssembly/byval.ll b/llvm/test/CodeGen/WebAssembly/byval.ll
index 5f0a71960b677..5a42f3b9438a0 100644
--- a/llvm/test/CodeGen/WebAssembly/byval.ll
+++ b/llvm/test/CodeGen/WebAssembly/byval.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -verify-machineinstrs -fast-isel | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -verify-machineinstrs -mcpu=mvp | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -verify-machineinstrs -mcpu=mvp -fast-isel | FileCheck %s
target triple = "wasm32-unknown-unknown"
diff --git a/llvm/test/CodeGen/WebAssembly/conv-trap.ll b/llvm/test/CodeGen/WebAssembly/conv-trap.ll
index 0906743374b93..4402880a8c383 100644
--- a/llvm/test/CodeGen/WebAssembly/conv-trap.ll
+++ b/llvm/test/CodeGen/WebAssembly/conv-trap.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-nontrapping-fptoint | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=-nontrapping-fptoint | FileCheck %s
; Test that basic conversion operations assemble as expected using
; the trapping opcodes and explicit code to suppress the trapping.
diff --git a/llvm/test/CodeGen/WebAssembly/fast-isel-noreg.ll b/llvm/test/CodeGen/WebAssembly/fast-isel-noreg.ll
index 1bc87d7c82eed..919ac6815717d 100644
--- a/llvm/test/CodeGen/WebAssembly/fast-isel-noreg.ll
+++ b/llvm/test/CodeGen/WebAssembly/fast-isel-noreg.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-keep-registers -verify-machineinstrs | FileCheck %s
-; RUN: llc < %s -asm-verbose=false -wasm-keep-registers -fast-isel -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -mcpu=mvp -disable-wasm-fallthrough-return-opt -wasm-keep-registers -verify-machineinstrs | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -mcpu=mvp -wasm-keep-registers -fast-isel -verify-machineinstrs | FileCheck %s
; Test that FastISel does not generate instructions with NoReg
diff --git a/llvm/test/CodeGen/WebAssembly/global.ll b/llvm/test/CodeGen/WebAssembly/global.ll
index c3f6b2e23e4a4..dc9b909dc7ea4 100644
--- a/llvm/test/CodeGen/WebAssembly/global.ll
+++ b/llvm/test/CodeGen/WebAssembly/global.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=-atomics | FileCheck %s
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+atomics | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=-atomics | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=+atomics | FileCheck %s
; Test that globals assemble as expected.
diff --git a/llvm/test/CodeGen/WebAssembly/legalize.ll b/llvm/test/CodeGen/WebAssembly/legalize.ll
index 686bd23c9ff54..cd7d719bff11a 100644
--- a/llvm/test/CodeGen/WebAssembly/legalize.ll
+++ b/llvm/test/CodeGen/WebAssembly/legalize.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -mcpu=mvp -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
; Test various types and operators that need to be legalized.
diff --git a/llvm/test/CodeGen/WebAssembly/mem-intrinsics.ll b/llvm/test/CodeGen/WebAssembly/mem-intrinsics.ll
index 8491e246c7f66..d9ceb86f208d8 100644
--- a/llvm/test/CodeGen/WebAssembly/mem-intrinsics.ll
+++ b/llvm/test/CodeGen/WebAssembly/mem-intrinsics.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -tail-dup-placement=0 | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -mcpu=mvp -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -tail-dup-placement=0 | FileCheck %s
; Test memcpy, memmove, and memset intrinsics.
diff --git a/llvm/test/CodeGen/WebAssembly/memory64-feature.ll b/llvm/test/CodeGen/WebAssembly/memory64-feature.ll
index 53fccfe088883..bd277dfdc37d3 100644
--- a/llvm/test/CodeGen/WebAssembly/memory64-feature.ll
+++ b/llvm/test/CodeGen/WebAssembly/memory64-feature.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s | FileCheck %s
+; RUN: llc -mcpu=mvp < %s | FileCheck %s
; Test that wasm64 is properly emitted into the target features section
diff --git a/llvm/test/CodeGen/WebAssembly/multivalue.ll b/llvm/test/CodeGen/WebAssembly/multivalue.ll
index a0f36ea8265e0..0080052e8f7a0 100644
--- a/llvm/test/CodeGen/WebAssembly/multivalue.ll
+++ b/llvm/test/CodeGen/WebAssembly/multivalue.ll
@@ -1,7 +1,7 @@
-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -mattr=+multivalue,+tail-call | FileCheck %s
-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -mattr=+reference-types,+multivalue,+tail-call | FileCheck --check-prefix REF %s
-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+multivalue,+tail-call | FileCheck %s --check-prefix REGS
-; RUN: llc < %s --filetype=obj -mattr=+multivalue,+tail-call | obj2yaml | FileCheck %s --check-prefix OBJ
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -mcpu=mvp -mattr=+multivalue,+tail-call | FileCheck %s
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -mcpu=mvp -mattr=+reference-types,+multivalue,+tail-call | FileCheck --check-prefix REF %s
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=+multivalue,+tail-call | FileCheck %s --check-prefix REGS
+; RUN: llc < %s --filetype=obj -mcpu=mvp -mattr=+multivalue,+tail-call | obj2yaml | FileCheck %s --check-prefix OBJ
; Test that the multivalue calls, returns, function types, and block
; types work as expected.
diff --git a/llvm/test/CodeGen/WebAssembly/mutable-globals.ll b/llvm/test/CodeGen/WebAssembly/mutable-globals.ll
index df698c1a11b82..93962f7e6d92c 100644
--- a/llvm/test/CodeGen/WebAssembly/mutable-globals.ll
+++ b/llvm/test/CodeGen/WebAssembly/mutable-globals.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mattr=+mutable-globals | FileCheck %s
+; RUN: llc < %s -mcpu=mvp -mattr=+mutable-globals | FileCheck %s
; Test that mutable globals is properly emitted into the target features section
diff --git a/llvm/test/CodeGen/WebAssembly/reference-types.ll b/llvm/test/CodeGen/WebAssembly/reference-types.ll
index d56541db8572e..168aaec8f0943 100644
--- a/llvm/test/CodeGen/WebAssembly/reference-types.ll
+++ b/llvm/test/CodeGen/WebAssembly/reference-types.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -mattr=+reference-types | FileCheck %s
+; RUN: llc < %s -mcpu=mvp -mattr=+reference-types | FileCheck %s
target triple = "wasm32-unknown-unknown"
diff --git a/llvm/test/CodeGen/WebAssembly/signext-zeroext.ll b/llvm/test/CodeGen/WebAssembly/signext-zeroext.ll
index f5dbfeb78c1db..1dafbe58a7f8c 100644
--- a/llvm/test/CodeGen/WebAssembly/signext-zeroext.ll
+++ b/llvm/test/CodeGen/WebAssembly/signext-zeroext.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
+; RUN: llc < %s -mcpu=mvp -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck %s
; Test zeroext and signext ABI keywords
diff --git a/llvm/test/CodeGen/WebAssembly/simd-conversions.ll b/llvm/test/CodeGen/WebAssembly/simd-conversions.ll
index f945b8e061717..8459ec8101ff2 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-conversions.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-conversions.ll
@@ -1,5 +1,5 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -verify-machineinstrs -mattr=+simd128 | FileCheck %s
+; RUN: llc < %s -verify-machineinstrs -mcpu=mvp -mattr=+simd128 | FileCheck %s
; Test that vector float-to-int and int-to-float instructions lower correctly
diff --git a/llvm/test/CodeGen/WebAssembly/simd-sext-inreg.ll b/llvm/test/CodeGen/WebAssembly/simd-sext-inreg.ll
index c4b94381e39a6..45080d14dfd29 100644
--- a/llvm/test/CodeGen/WebAssembly/simd-sext-inreg.ll
+++ b/llvm/test/CodeGen/WebAssembly/simd-sext-inreg.ll
@@ -1,4 +1,4 @@
-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -mcpu=mvp -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -wasm-keep-registers -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals | FileCheck %s --check-prefixes CHECK,NO-SIMD128
; Test that vector sign extensions lower to shifts
diff --git a/llvm/test/CodeGen/WebAssembly/tailcall.ll b/llvm/test/CodeGen/WebAssembly/tailcall.ll
index d0f39e6416ba8..3d96c666ddc58 100644
--- a/llvm/test/CodeGen/WebAssembly/tailcall.ll
+++ b/llvm/test/CodeGen/WebAssembly/tailcall.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mattr=+tail-call | FileCheck --check-prefixes=CHECK,SLOW %s
-; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -fast-isel -mattr=+tail-call | FileCheck --check-prefixes=CHECK,FAST %s
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -mcpu=mvp -mattr=+tail-call | FileCheck --check-prefixes=CHECK,SLOW %s
+; RUN: llc < %s -asm-verbose=false -verify-machineinstrs -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers -fast-isel -mcpu=mvp -mattr=+tail-call | FileCheck --check-prefixes=CHECK,FAST %s
; RUN: llc < %s --filetype=obj -mattr=+tail-call | obj2yaml | FileCheck --check-prefix=YAML %s
; Test that the tail calls lower correctly
diff --git a/llvm/test/CodeGen/WebAssembly/target-features-tls.ll b/llvm/test/CodeGen/WebAssembly/target-features-tls.ll
index 57d14053f3342..45bc06b5d5c96 100644
--- a/llvm/test/CodeGen/WebAssembly/target-features-tls.ll
+++ b/llvm/test/CodeGen/WebAssembly/target-features-tls.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -mattr=-bulk-memory,atomics | FileCheck %s --check-prefixes NO-BULK-MEM
-; RUN: llc < %s -mattr=+bulk-memory,atomics | FileCheck %s --check-prefixes BULK-MEM
+; RUN: llc < %s -mcpu=mvp -mattr=-bulk-memory,atomics | FileCheck %s --check-prefixes NO-BULK-MEM
+; RUN: llc < %s -mcpu=mvp -mattr=+bulk-memory,atomics | FileCheck %s --check-prefixes BULK-MEM
; Test that the target features section contains -atomics or +atomics
; for modules that have thread local storage in their source.
diff --git a/llvm/test/CodeGen/WebAssembly/target-features.ll b/llvm/test/CodeGen/WebAssembly/target-features.ll
index ecb49766659b0..4debf66fe0f7a 100644
--- a/llvm/test/CodeGen/WebAssembly/target-features.ll
+++ b/llvm/test/CodeGen/WebAssembly/target-features.ll
@@ -1,5 +1,5 @@
; RUN: llc < %s | FileCheck %s --check-prefixes CHECK,ATTRS
-; RUN: llc < %s -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
+; RUN: llc < %s -mcpu=mvp -mattr=+simd128 | FileCheck %s --check-prefixes CHECK,SIMD128
; RUN: llc < %s -mcpu=bleeding-edge | FileCheck %s --check-prefixes CHECK,BLEEDING-EDGE
; Test that codegen emits target features from the command line or
@@ -55,17 +55,22 @@ attributes #2 = { "target-features"="+reference-types" }
; CHECK-LABEL: .custom_section.target_features,"",@
-; +atomics, +nontrapping-fptoint, +reference-types
-; ATTRS-NEXT: .int8 3
-; ATTRS-NEXT: .int8 43
-; ATTRS-NEXT: .int8 7
-; ATTRS-NEXT: .ascii "atomics"
-; ATTRS-NEXT: .int8 43
-; ATTRS-NEXT: .int8 19
-; ATTRS-NEXT: .ascii "nontrapping-fptoint"
-; ATTRS-NEXT: .int8 43
-; ATTRS-NEXT: .int8 15
-; ATTRS-NEXT: .ascii "reference-types"
+; +atomics, +reference-types, +mutable-globals
+; ATTRS-NEXT: .int8 5
+; ATTRS-NEXT: .int8 43
+; ATTRS-NEXT: .int8 7
+; ATTRS-NEXT: .ascii "atomics"
+; ATTRS-NEXT: .int8 43
+; ATTRS-NEXT: .int8 15
+; ATTRS-NEXT: .ascii "mutable-globals"
+; ATTRS-NEXT: .int8 43
+; ATTRS-NEXT: .int8 19
+; ATTRS-NEXT: .ascii "nontrapping-fptoint"
+; ATTRS-NEXT: .int8 43
+; ATTRS-NEXT: .int8 15
+; ATTRS-NEXT: .ascii "reference-types"
+; ATTRS-NEXT: .int8 43
+; ATTRS-NEXT: .int8 8
; +atomics, +nontrapping-fptoint, +reference-types, +simd128
; SIMD128-NEXT: .int8 4
@@ -109,5 +114,3 @@ attributes #2 = { "target-features"="+reference-types" }
; BLEEDING-EDGE-NEXT: .int8 43
; BLEEDING-EDGE-NEXT: .int8 9
; BLEEDING-EDGE-NEXT: .ascii "tail-call"
-
-; CHECK-NEXT: .text
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