[PATCH] D136433: [GlobalISel][AArch64] Fix miscompile caused by wrong G_ZEXT selection in GISel
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 25 11:17:16 PDT 2022
efriedma added a comment.
I don't think the usage in selectArithExtendedRegister actually needs to work reliably for correctness; the pattern doesn't assume anything about the high bits, and if we don't use the pattern, we just fallback to a normal zext. So it doesn't really matter that much. (See also the SelectionDAG version of this check in AArch64DAGToDAGISel::SelectArithExtendedRegister.) Ideally, I guess it would look through freeze instructions. Or maybe we should just never match "uxtw" during isel, and just add something to AArch64MIPeepholeOpt. In any case, let's fix the miscompile, and leave it for later.
Patch looks fine, but this should be approved by one of the AArch64 GlobalISel maintainers.
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https://reviews.llvm.org/D136433/new/
https://reviews.llvm.org/D136433
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