[PATCH] D136448: [AMDGPU][GISel] Add llvm.amdgcn.icmp selection

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh added a comment.

I think that for the icmp i1 case there's some problem in the RegBankSelect or the legalizer. I can't seem to find the right pattern.
My current best attempt, something like this:

  def : Pat <
    (i64 (int_amdgcn_icmp i1:$src, (i1 0), (i32 33))),
    (COPY_TO_REGCLASS SCSrc_i1:$src, SReg_1_XEXEC) // Return the SGPRs representing i1 src
  >;
  
  def : Pat <
    (i32 (int_amdgcn_icmp i1:$src, (i1 0), (i32 33))),
    (COPY_TO_REGCLASS SCSrc_i1:$src, SReg_1_XEXEC) // Return the SGPRs representing i1 src
  >;

Selects:

  Selecting: 
    %23:sreg_64(s64) = G_INTRINSIC intrinsic(@llvm.amdgcn.icmp), %32:vgpr(s1), %33:vgpr(s1), 33
   Into:
    %23:sreg_64_xexec(s64) = COPY %32:vgpr(s1)

But later, even in wave64 mode, %32 gets constrained to a vgpr_32 and we get an impossible copy:

  Selecting: 
    %32:vgpr(s1) = COPY %22:sgpr(s1)
  Into:
    %32:vgpr_32(s1) = COPY %22:sreg_32(s1)
  
  ; later
    %31:sreg_32 = S_AND_B32 %27:sreg_32, %28:sreg_32, implicit-def $scc
    %32:vgpr_32 = COPY %31:sreg_32
    %23:sreg_64_xexec = COPY %32:vgpr_32

I'm really not sure how to deal with this. Thoughts?



================
Comment at: llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.ll:2
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX %s
-; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,VI %s
+; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX,DAG-GFX %s
+; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,VI,DAG-VI %s
----------------
Joe_Nash wrote:
> Joe_Nash wrote:
> > foad wrote:
> > > Pierre-vh wrote:
> > > > Joe_Nash wrote:
> > > > > I would prefer a check-prefix other than DAG. I believe this could be confused with https://llvm.org/docs/CommandGuide/FileCheck.html#the-check-dag-directive.
> > > > > 
> > > > > Can you also add a runline for gfx1100?
> > > > For GFX11, is it fine if I just use that for the GFX run line (instead of no cpu) or is a third line needed?
> > > "SDAG" is quite common
> > SDAG sounds good.
> I don't think there is a need to be stingy with which tests are run. It seems good to test both no cpu (GFX6?) and gfx1100.
For GISel, with no CPU, I get 
```
LLVM ERROR: cannot select: G_STORE %17:vgpr(s64), %9:sgpr(p1) :: (store (s64) into %ir.out.load, addrspace 1) (in function: v_icmp_i32_eq)
``` 

So I use GFX900 for both instead


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D136448