[PATCH] D136244: [AArch64] Optimize memcmp when the result is tested for [in]equality with 0

[Allen zhong via Phabricator via llvm-commits]

Allen marked 3 inline comments as done.
Allen added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:19511
+    // simpler to just use a constant of 0 in both cases)
+    SDValue NZCVOp = DAG.getConstant(AArch64CC::EQ, DL, MVT::i32);
+    SDValue CCmp = DAG.getNode(AArch64ISD::CCMP, DL, MVT_CC, XOR1.getOperand(0),
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dmgreen wrote:
> AArch64CC::EQ -> 0 is probably better. It is not a condition, but the value the NZCV flags are set to.
Apply your comment, thanks


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Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:19506
+    SDValue Cmp =
+        DAG.getNode(AArch64ISD::SUBS, DL, DAG.getVTList(TstVT, MVT::Glue),
+                    XOR0.getOperand(0), XOR0.getOperand(1));
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dmgreen wrote:
> I'm not sure if this should be MVT::Glue or MVT::i32. It seems to be created differently in different places.
I don't  very sure this is the accurate answer, it seems the **MVT::Glue** implicit instructions are scheduled together?
https://lists.llvm.org/pipermail/llvm-dev/2014-June/074046.html


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  https://reviews.llvm.org/D136244/new/

https://reviews.llvm.org/D136244