[PATCH] D136432: [AMDGPU] Combine BFI instructions.
Thomas Symalla via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 25 01:46:42 PDT 2022
tsymalla marked an inline comment as done.
tsymalla added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp:2194
+ SDNode *CurrentOr = N;
+ while (CurrentOr && CurrentOr->hasOneUse()) {
+ SDValue O0 = CurrentOr->getOperand(0);
----------------
foad wrote:
> The top level OR can have multiple uses.
Yes. You are right. Thanks.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp:2215
+
+ // Require that at least two nesting levels have been visited
+ // The constants are required to be a partition of -1
----------------
foad wrote:
> Why? Is there any disadvantage to letting this function select a single BFI?
Such case is handled by the TableGen patterns, so I don't want to handle the non-specialized case here (it would be possible, but I don't regard that as advantage in terms of code complexity).
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https://reviews.llvm.org/D136432/new/
https://reviews.llvm.org/D136432
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