[PATCH] D136662: [VP][RISCV] Add vp.rint and RISC-V support.
Yeting Kuo via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 24 22:38:57 PDT 2022
fakepaper56 created this revision.
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FRINT uses dynamic rounding mode instead of static rounding mode. The patch
rename VFCVT_X_F_VL to VFCVT_RM_X_F_VL for static rounding mode uses and added
new ISDNode VFCVT_X_F_VL directly selected to PseudoVFCVT_X_F_V.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D136662
Files:
llvm/docs/LangRef.rst
llvm/include/llvm/IR/Intrinsics.td
llvm/include/llvm/IR/VPIntrinsics.def
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.h
llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll
llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
llvm/unittests/IR/VPIntrinsicTest.cpp
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