[PATCH] D136433: [GlobalISel][AArch64] Fix miscompile caused by wrong G_ZEXT selection in GISel

chenglin.bi via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 24 20:31:07 PDT 2022

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bcl5980 added a comment.

@efriedma @dmgreen, do we need to add G_FREEZE into `AArch64InstructionSelector::isDef32` for `AArch64InstructionSelector::selectArithExtendedRegister` to match SelectionDAG?


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https://reviews.llvm.org/D136433

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