[PATCH] D136525: [M68k] Add codegen pattern for atomic load / store

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

Are multi-processor m68k computers a thing?  I can't find any reference to such a thing existing, but the manual indicates that the processor was designed to allow it.  If it does exist, m68k probably needs to use sequences similar to x86.  (x86 didn't have any barrier instruction for a long time, but a "lock" instruction has the right semantics.)


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  https://reviews.llvm.org/D136525/new/

https://reviews.llvm.org/D136525