[PATCH] D136464: [AArch64][SVE2] Add the SVE2.1 signed and unsigned 2-way dot instructions

Paul Walker via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 24 10:17:18 PDT 2022


paulwalker-arm added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:3585-3588
+def SDOT_2WAY_ZZZ_S  : sve2p1_two_way_dot_vv<"sdot", 0b0>;
+def UDOT_2WAY_ZZZ_S  : sve2p1_two_way_dot_vv<"udot", 0b1>;
+def SDOT_2WAY_ZZZI_S : sve2p1_two_way_dot_vvi<"sdot", 0b0>;
+def UDOT_2WAY_ZZZI_S : sve2p1_two_way_dot_vvi<"udot", 0b1>;
----------------
paulwalker-arm wrote:
> sdesmalen wrote:
> > paulwalker-arm wrote:
> > > For clarity, can you create a follow up patch to ensure all the SVE dot instructions use this format? This presumably means adding `4WAY`.
> > We should be using VG2 or VG4 for that purpose, that aligns with what we've done for SME2
> VG2/4 relates to instruction operands that are multi-register.  Here 2WAY relates to the instruction's operation, which in this case only take single register operands.  For earlier versions of SVE there was no distinction because all the dot instructions were 4WAY.  This now changes with SVE2p1, hence my suggestion.
Just noting D135676 shows a different naming scheme (e.g. BtoH and BtoS).  This also works to distinguish between 2-way and 4-way so either are good options but we need to choose one and stick with it.


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  https://reviews.llvm.org/D136464/new/

https://reviews.llvm.org/D136464



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