[PATCH] D136432: [AMDGPU] Combine BFI instructions.
Thomas Symalla via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 24 10:12:40 PDT 2022
tsymalla marked an inline comment as done.
tsymalla added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp:2164
+// However, after SimplifyDemandedBits ISel, the expression will look like:
+// (X1 & C1) | ((X2 & C2) | (X3 & (~C1 | ~C3)))
+bool AMDGPUDAGToDAGISel::SelectV_BFI(SDNode *N) {
----------------
foad wrote:
> When you match this expression tree I think you need to check hasOneUse on every OR node - and possibly on the AND nodes too, but I'm not so sure about that.
Thanks.
================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp:2220-2237
+ SDNode *NewNode = nullptr;
+ {
+ auto Base = BFIOps.back();
+ auto Insert = BFIOps[BFIOps.size() - 2];
+ NewNode = CurDAG->getMachineNode(
+ AMDGPU::V_BFI_B32_e64, SDLoc(N), N->getValueType(0),
+ {Insert.X->getOperand(1), Insert.X->getOperand(0),
----------------
nhaehnle wrote:
> This whole code can be simplified by starting with `NewNode = BFIOps.back().X->getOperand(0)` and iterating over `reverse(makeArrayRef(BFIOps).drop_back())`
Thanks. Good pooint
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D136432/new/
https://reviews.llvm.org/D136432
More information about the llvm-commits
mailing list