[PATCH] D136448: [AMDGPU][GISel] Add llvm.amdgcn.icmp selection

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstructions.td:893
+//  out in the test.
+//   Skipped pattern: Dst MI def isn't a register class(COPY:{ *:[i64] } ?:{ *:[i1] }:$src)
 def : Pat <
----------------
Joe_Nash wrote:
> Pierre-vh wrote:
> > arsenm wrote:
> > > Pierre-vh wrote:
> > > > Help needed here, not sure how to get this one to work. I tried a lot of things, including COPY_TO_REGCLASS and nothing seems to do the trick.
> > > > Due to the simplicity of the pattern I'm wondering if it isn't better to just do it manually in the InstructionSelector rather than fight the GISel TableGen emitter?
> > > What's the error with COPY_TO_REGCLASS?
> > IIRC with COPY_TO_REGCLASS it's a type issue, or if I put some regclass that works then it just doesn't match in the instruction selector.
> > I think my question is more: What regclass do I need to use there?
> Just a guess, but maybe the patterns need to be copied, one for wave32 and one for wave64? So on wave32 you do COPY_TO_REGCLASS to SReg_32_XM0_XEXEC, and for wave64 SReg_64_XM0_XEXEC
The input pattern also needs a registerclass, that's the one I'm stuck on now
I tried `(COPY_TO_REGCLASS SReg_1_XEXEC:$src, SReg_64_XEXEC)` for Wave64 and it causes a "noreg" to be selected which crashes the backend
```
  $vgpr1 = V_MOV_B32_e32 $noreg, implicit $exec, implicit killed $sgpr2, implicit $exec
```
VReg_1 cannot be used either, it says it's not a recognized class. I think it's not available in TableGen?


================
Comment at: llvm/test/CodeGen/AMDGPU/llvm.amdgcn.icmp.ll:2
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX %s
-; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,VI %s
+; RUN: llc -march=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,GFX,DAG-GFX %s
+; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,VI,DAG-VI %s
----------------
Joe_Nash wrote:
> I would prefer a check-prefix other than DAG. I believe this could be confused with https://llvm.org/docs/CommandGuide/FileCheck.html#the-check-dag-directive.
> 
> Can you also add a runline for gfx1100?
For GFX11, is it fine if I just use that for the GFX run line (instead of no cpu) or is a third line needed?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D136448/new/

https://reviews.llvm.org/D136448